Merge branch 'master' into cr1901-msp430f5529

This commit is contained in:
hathach 2019-10-25 21:20:05 +07:00
commit 4e8c57171c
71 changed files with 1901 additions and 1259 deletions

6
.gitmodules vendored
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@ -13,3 +13,9 @@
[submodule "hw/mcu/st/st_driver"]
path = hw/mcu/st/st_driver
url = https://github.com/hathach/st_driver.git
[submodule "hw/mcu/sony/cxd56/spresense-exported-sdk"]
path = hw/mcu/sony/cxd56/spresense-exported-sdk
url = https://github.com/sonydevworld/spresense-exported-sdk.git
[submodule "hw/mcu/ti"]
path = hw/mcu/ti
url = https://github.com/hathach/ti_driver.git

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@ -4,7 +4,7 @@
[![Build Status](https://travis-ci.org/hathach/tinyusb.svg?branch=master)](https://travis-ci.org/hathach/tinyusb) [![License](https://img.shields.io/badge/license-MIT-brightgreen.svg)](https://opensource.org/licenses/MIT)
TinyUSB is an open-source cross-platform USB Host/Device stack for embedded system. It is designed to be memory-safe with no dynamic allocation and thread-safe with all interrupt events are deferred then handled in the stack's task function.
TinyUSB is an open-source cross-platform USB Host/Device stack for embedded system, designed to be memory-safe with no dynamic allocation and thread-safe with all interrupt events are deferred then handled in the non-ISR task function.
![tinyusb](https://user-images.githubusercontent.com/249515/49858616-f60c9700-fe27-11e8-8627-e76936352ff7.png)
@ -26,8 +26,9 @@ TinyUSB is an open-source cross-platform USB Host/Device stack for embedded syst
The stack supports the following MCUs
- **Nordic:** nRF52840
- **NXP:** LPC Series: 11Uxx, 13xx, 175x_6x, 177x_8x, 18xx, 40xx, 43xx, 51Uxx
- **NXP:** LPC Series: 11Uxx, 13xx, 175x_6x, 177x_8x, 18xx, 40xx, 43xx, 51Uxx, 54xxx, 55xx
- **MicroChip:** SAMD21, SAMD51 (device only)
- **Sony:** CXD56
- **ST:** STM32 series: L0, F0, F1, F2, F3, F4, F7, H7 (device only)
[Here is the list of supported Boards](docs/boards.md) that can be used with provided examples.
@ -53,7 +54,7 @@ Support multiple device configurations by dynamically changing usb descriptors.
## OS Abtraction layer
TinyUSB is completely thread-safe by pushing all ISR events into a central queue, then process it later in the non-ISR context. It also uses semphore/mutex to access shared resource such as CDC FIFO. Therefore the stack needs to use some of OS's basic APIs. Following OSes are already supported out of the box.
TinyUSB is completely thread-safe by pushing all ISR events into a central queue, then process it later in the non-ISR context task function. It also uses semphore/mutex to access shared resource such as CDC FIFO. Therefore the stack needs to use some of OS's basic APIs. Following OSes are already supported out of the box.
- **No OS** : Disabling USB IRQ is used as way to provide mutex
- **FreeRTOS**
@ -83,6 +84,7 @@ TinyUSB is currently used by these other projects:
* [Adafruit nRF52 Bootloader](https://github.com/adafruit/Adafruit_nRF52_Bootloader)
* [Adafruit SAMD Arduino](https://github.com/adafruit/ArduinoCore-samd)
* [CircuitPython](https://github.com/adafruit/circuitpython)
* [MicroPython](https://github.com/micropython/micropython)
* [TinyUSB Arduino Library](https://github.com/adafruit/Adafruit_TinyUSB_Arduino)
Let's me know if your project also uses TinyUSB and want to share.

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@ -1,9 +1,9 @@
# Boards
The board support code is only used for self-contained examples and testing. It is not used when TinyUSB is part of a larger project. It is responsible for getting the MCU started and the USB peripheral clocked with minimal of on-board devices
- One LED for status
- One Button to get input from user
- One UART optionally, mostly for host examples
- One LED : for status
- One Button : to get input from user
- One UART : optional for device, but required for host examples
## Supported Boards
@ -39,6 +39,10 @@ This code base already had supported for a handful of following boards
- [LPCXpresso 54114](https://www.nxp.com/design/microcontrollers-developer-resources/lpcxpresso-boards/lpcxpresso54114-board:OM13089)
- [LPCXpresso 55s69 EVK](https://www.nxp.com/products/processors-and-microcontrollers/arm-microcontrollers/general-purpose-mcus/lpc5500-cortex-m33/lpcxpresso55s69-development-board:LPC55S69-EVK)
### Sony
- [Sony Spresense CXD5602](https://developer.sony.com/develop/spresense)
### ST STM32
- Adafruit Feather STM32F405

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@ -42,6 +42,8 @@ enum {
BLINK_UNPRESSED = 1000
};
#define HELLO_STR "Hello from TinyUSB\n"
int main(void)
{
board_init();
@ -53,9 +55,15 @@ int main(void)
{
uint32_t interval_ms = board_button_read() ? BLINK_PRESSED : BLINK_UNPRESSED;
// uart echo
// uint8_t ch;
// if ( board_uart_read(&ch, 1) ) board_uart_write(&ch, 1);
// Blink every interval ms
if ( !(board_millis() - start_ms < interval_ms) )
{
board_uart_write(HELLO_STR, strlen(HELLO_STR));
start_ms = board_millis();
board_led_write(led_state);

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@ -19,7 +19,7 @@
arm_target_interface_type="SWD"
build_treat_warnings_as_errors="Yes"
c_preprocessor_definitions="__LPC1347FBD64__;__LPC1300_FAMILY;__LPC134x_SUBFAMILY;ARM_MATH_CM3;FLASH_PLACEMENT=1;CORE_M3;CFG_TUSB_MCU=OPT_MCU_LPC13XX;CFG_TUSB_MEM_SECTION= __attribute__((section(&quot;.bss3&quot;)));CFG_TUSB_MEM_ALIGN=__attribute__ ((aligned(64)))"
c_user_include_directories="../../src;$(rootDir)/hw;$(rootDir)/hw/mcu/nxp/lpc_driver/lpc_chip_13xx/inc;$(rootDir)/src"
c_user_include_directories="../../src;$(rootDir)/hw;$(rootDir)/hw/mcu/nxp/lpc_driver/lpc13xx/lpc_chip_13xx/inc;$(rootDir)/src"
debug_register_definition_file="$(ProjectDir)/LPC13Uxx_Registers.xml"
debug_target_connection="J-Link"
gcc_enable_all_warnings="Yes"

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@ -55,7 +55,6 @@ void cdc_task(void);
int main(void)
{
board_init();
tusb_init();
while (1)

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@ -50,6 +50,7 @@ BUILD = _build/build-$(BOARD)
include $(TOP)/hw/bsp/$(BOARD)/board.mk
# Include all source C in board folder
SRC_C += hw/bsp/board.c
SRC_C += $(subst $(TOP)/,,$(wildcard $(TOP)/hw/bsp/$(BOARD)/*.c))
# Compiler Flags
@ -85,7 +86,11 @@ endif
# Debugging/Optimization
ifeq ($(DEBUG), 1)
CFLAGS += -O0 -ggdb -DCFG_TUSB_DEBUG=1
CFLAGS += -Og -ggdb -DCFG_TUSB_DEBUG=2
else
ifneq ($(BOARD), spresense)
CFLAGS += -flto -Os
else
CFLAGS += -Os
endif
endif

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@ -3,7 +3,11 @@
#
# libc
LIBS += -lgcc -lc -lm -lnosys
LIBS += -lgcc -lm -lnosys
ifneq ($(BOARD), spresense)
LIBS += -lc
endif
# TinyUSB Stack source
SRC_C += \

58
hw/bsp/board.c Normal file
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@ -0,0 +1,58 @@
/*
* The MIT License (MIT)
*
* Copyright (c) 2018, hathach (tinyusb.org)
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*
* This file is part of the TinyUSB stack.
*/
#include "board.h"
//--------------------------------------------------------------------+
// MACRO TYPEDEF CONSTANT ENUM DECLARATION
//--------------------------------------------------------------------+
//#if CFG_PRINTF_TARGET == PRINTF_TARGET_UART
// #define retarget_getchar board_uart_getchar
// #define retarget_putchar board_uart_putchar
//#elif CFG_PRINTF_TARGET == PRINTF_TARGET_SWO
// volatile int32_t ITM_RxBuffer; // keil variable to read from SWO
// #define retarget_getchar ITM_ReceiveChar
// #define retarget_putchar ITM_SendChar
//#else
// #error Target is not implemented yet
//#endif
//------------- IMPLEMENTATION -------------//
// newlib read()/write() retarget
TU_ATTR_USED int _write (int fhdl, const void *buf, size_t count)
{
(void) fhdl;
return board_uart_write(buf, count);
}
TU_ATTR_USED int _read (int fhdl, char *buf, size_t count)
{
(void) fhdl;
return board_uart_read((uint8_t*) buf, count);
}

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@ -42,7 +42,7 @@
#include "tusb.h"
#define CFG_UART_BAUDRATE 115200
#define CFG_BOARD_UART_BAUDRATE 115200
//--------------------------------------------------------------------+
// Board Porting API
@ -107,10 +107,10 @@ static inline void board_delay(uint32_t ms)
}
}
static inline int8_t board_uart_getchar(void)
static inline int board_uart_getchar(void)
{
uint8_t c;
return board_uart_read(&c, 1) ? c : (-1);
return board_uart_read(&c, 1) ? (int) c : (-1);
}
static inline int board_uart_putchar(uint8_t c)

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@ -125,15 +125,13 @@ uint32_t board_button_read(void)
int board_uart_read(uint8_t* buf, int len)
{
(void) buf;
(void) len;
(void) buf; (void) len;
return 0;
}
int board_uart_write(void const * buf, int len)
{
(void) buf;
(void) len;
(void) buf; (void) len;
return 0;
}

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@ -116,6 +116,18 @@ uint32_t board_button_read(void)
return gpio_get_pin_level(BUTTON_PIN);
}
int board_uart_read(uint8_t* buf, int len)
{
(void) buf; (void) len;
return 0;
}
int board_uart_write(void const * buf, int len)
{
(void) buf; (void) len;
return 0;
}
#if CFG_TUSB_OS == OPT_OS_NONE
volatile uint32_t system_ticks = 0;
void SysTick_Handler (void)

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@ -131,16 +131,14 @@ uint32_t board_button_read(void)
int board_uart_read(uint8_t* buf, int len)
{
//return UART_ReceiveByte(BOARD_UART_PORT);
(void) buf;
(void) len;
(void) buf; (void) len;
return 0;
}
int board_uart_write(void const * buf, int len)
{
//UART_Send(BOARD_UART_PORT, &c, 1, BLOCKING);
(void) buf;
(void) len;
(void) buf; (void) len;
return 0;
}

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@ -134,7 +134,7 @@ void board_init(void)
UART_CFG_Type UARTConfigStruct;
UART_ConfigStructInit(&UARTConfigStruct);
UARTConfigStruct.Baud_rate = CFG_UART_BAUDRATE;
UARTConfigStruct.Baud_rate = CFG_BOARD_UART_BAUDRATE;
UARTConfigStruct.Clock_Speed = 0;
UART_Init(BOARD_UART_PORT, &UARTConfigStruct);
@ -254,16 +254,14 @@ uint32_t board_button_read(void)
int board_uart_read(uint8_t* buf, int len)
{
//return UART_ReceiveByte(BOARD_UART_PORT);
(void) buf;
(void) len;
(void) buf; (void) len;
return 0;
}
int board_uart_write(void const * buf, int len)
{
//UART_Send(BOARD_UART_PORT, &c, 1, BLOCKING);
(void) buf;
(void) len;
(void) buf; (void) len;
return 0;
}

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@ -116,6 +116,18 @@ uint32_t board_button_read(void)
return gpio_get_pin_level(BUTTON_PIN) ? 0 : 1;
}
int board_uart_read(uint8_t* buf, int len)
{
(void) buf; (void) len;
return 0;
}
int board_uart_write(void const * buf, int len)
{
(void) buf; (void) len;
return 0;
}
#if CFG_TUSB_OS == OPT_OS_NONE
volatile uint32_t system_ticks = 0;
void SysTick_Handler (void)

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@ -105,6 +105,18 @@ uint32_t board_button_read(void)
return gpio_get_pin_level(BUTTON_PIN) ? 0 : 1;
}
int board_uart_read(uint8_t* buf, int len)
{
(void) buf; (void) len;
return 0;
}
int board_uart_write(void const * buf, int len)
{
(void) buf; (void) len;
return 0;
}
#if CFG_TUSB_OS == OPT_OS_NONE
volatile uint32_t system_ticks = 0;

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@ -125,15 +125,13 @@ uint32_t board_button_read(void)
int board_uart_read(uint8_t* buf, int len)
{
(void) buf;
(void) len;
(void) buf; (void) len;
return 0;
}
int board_uart_write(void const * buf, int len)
{
(void) buf;
(void) len;
(void) buf; (void) len;
return 0;
}

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@ -172,6 +172,18 @@ uint32_t board_button_read(void)
return BUTTON_STATE_ACTIVE == HAL_GPIO_ReadPin(BUTTON_PORT, BUTTON_PIN);
}
int board_uart_read(uint8_t* buf, int len)
{
(void) buf; (void) len;
return 0;
}
int board_uart_write(void const * buf, int len)
{
(void) buf; (void) len;
return 0;
}
#if CFG_TUSB_OS == OPT_OS_NONE
volatile uint32_t system_ticks = 0;
void SysTick_Handler (void)

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@ -58,8 +58,6 @@ static const PINMUX_GRP_T pinmuxing[] =
{0, 19, (IOCON_FUNC1 | IOCON_MODE_INACT | IOCON_DIGMODE_EN)}, // UART0 TX
};
#if 1
/* Setup system clocking */
static void SystemSetupClocking(void)
{
@ -114,13 +112,11 @@ static void SystemSetupClocking(void)
/* Wait for PLL to lock */
while (!Chip_Clock_IsUSBPLLLocked()) {}
}
#endif
// Invoked by startup code
void SystemInit(void)
{
SystemSetupClocking();
// Chip_SystemInit();
Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_RAM1);
/* Enable IOCON clock */
@ -177,15 +173,13 @@ uint32_t board_button_read(void)
int board_uart_read(uint8_t* buf, int len)
{
(void) buf;
(void) len;
(void) buf; (void) len;
return 0;
}
int board_uart_write(void const * buf, int len)
{
(void) buf;
(void) len;
(void) buf; (void) len;
return 0;
}

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@ -100,15 +100,13 @@ uint32_t board_button_read(void)
int board_uart_read(uint8_t* buf, int len)
{
(void) buf;
(void) len;
(void) buf; (void) len;
return 0;
}
int board_uart_write(void const * buf, int len)
{
(void) buf;
(void) len;
(void) buf; (void) len;
return 0;
}

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@ -7,7 +7,7 @@ CFLAGS += \
-D__USE_LPCOPEN \
-DCFG_EXAMPLE_MSC_READONLY \
-DCFG_TUSB_MCU=OPT_MCU_LPC13XX \
-DCFG_TUSB_MEM_SECTION='__attribute__((section(".data.$$RAM3")))' \
-DCFG_TUSB_MEM_SECTION='__attribute__((section(".data.$$RAM2")))' \
-DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))'
# startup.c and lpc_types.h cause following errors

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@ -130,14 +130,12 @@ uint32_t board_button_read(void)
int board_uart_read(uint8_t* buf, int len)
{
(void) buf;
(void) len;
(void) buf; (void) len;
return 0;
}
int board_uart_write(void const * buf, int len)
{
(void) buf;
(void) len;
(void) buf; (void) len;
return 0;
}

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@ -0,0 +1,45 @@
CFLAGS += \
-mthumb \
-mabi=aapcs \
-mcpu=cortex-m3 \
-nostdlib \
-DCORE_M3 \
-D__USE_LPCOPEN \
-DCFG_EXAMPLE_MSC_READONLY \
-DCFG_TUSB_MCU=OPT_MCU_LPC15XX \
-DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))'
# mcu driver cause following warnings
CFLAGS += -Wno-error=strict-prototypes -Wno-error=unused-parameter -Wno-error=unused-variable
MCU_DIR = hw/mcu/nxp/lpc_driver/lpc15xx/lpc_chip_15xx
# All source paths should be relative to the top level.
LD_FILE = hw/bsp/$(BOARD)/lpc1549.ld
SRC_C += \
$(MCU_DIR)/../gcc/cr_startup_lpc15xx.c \
$(MCU_DIR)/src/chip_15xx.c \
$(MCU_DIR)/src/clock_15xx.c \
$(MCU_DIR)/src/gpio_15xx.c \
$(MCU_DIR)/src/iocon_15xx.c \
$(MCU_DIR)/src/swm_15xx.c \
$(MCU_DIR)/src/sysctl_15xx.c \
$(MCU_DIR)/src/sysinit_15xx.c
INC += \
$(TOP)/$(MCU_DIR)/inc
# For TinyUSB port source
VENDOR = nxp
CHIP_FAMILY = lpc_ip3511
# For freeRTOS port source
FREERTOS_PORT = ARM_CM3
# For flash-jlink target
JLINK_DEVICE = LPC1549
JLINK_IF = swd
# flash using jlink
flash: flash-jlink

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@ -0,0 +1,246 @@
/*
* GENERATED FILE - DO NOT EDIT
* Copyright (c) 2008-2013 Code Red Technologies Ltd,
* Copyright 2015, 2018-2019 NXP
* (c) NXP Semiconductors 2013-2019
* Generated linker script file for LPC1549
* Created from linkscript.ldt by FMCreateLinkLibraries
* Using Freemarker v2.3.23
* MCUXpresso IDE v11.0.0 [Build 2516] [2019-06-05] on Oct 3, 2019 2:55:18 PM
*/
MEMORY
{
/* Define each memory region */
MFlash256 (rx) : ORIGIN = 0x0, LENGTH = 0x40000 /* 256K bytes (alias Flash) */
Ram0_16 (rwx) : ORIGIN = 0x2000000, LENGTH = 0x4000 /* 16K bytes (alias RAM) */
Ram1_16 (rwx) : ORIGIN = 0x2004000, LENGTH = 0x4000 /* 16K bytes (alias RAM2) */
Ram2_4 (rwx) : ORIGIN = 0x2008000, LENGTH = 0x1000 /* 4K bytes (alias RAM3) */
}
/* Define a symbol for the top of each memory region */
__base_MFlash256 = 0x0 ; /* MFlash256 */
__base_Flash = 0x0 ; /* Flash */
__top_MFlash256 = 0x0 + 0x40000 ; /* 256K bytes */
__top_Flash = 0x0 + 0x40000 ; /* 256K bytes */
__base_Ram0_16 = 0x2000000 ; /* Ram0_16 */
__base_RAM = 0x2000000 ; /* RAM */
__top_Ram0_16 = 0x2000000 + 0x4000 ; /* 16K bytes */
__top_RAM = 0x2000000 + 0x4000 ; /* 16K bytes */
__base_Ram1_16 = 0x2004000 ; /* Ram1_16 */
__base_RAM2 = 0x2004000 ; /* RAM2 */
__top_Ram1_16 = 0x2004000 + 0x4000 ; /* 16K bytes */
__top_RAM2 = 0x2004000 + 0x4000 ; /* 16K bytes */
__base_Ram2_4 = 0x2008000 ; /* Ram2_4 */
__base_RAM3 = 0x2008000 ; /* RAM3 */
__top_Ram2_4 = 0x2008000 + 0x1000 ; /* 4K bytes */
__top_RAM3 = 0x2008000 + 0x1000 ; /* 4K bytes */
ENTRY(ResetISR)
SECTIONS
{
/* MAIN TEXT SECTION */
.text : ALIGN(4)
{
FILL(0xff)
__vectors_start__ = ABSOLUTE(.) ;
KEEP(*(.isr_vector))
/* Global Section Table */
. = ALIGN(4) ;
__section_table_start = .;
__data_section_table = .;
LONG(LOADADDR(.data));
LONG( ADDR(.data));
LONG( SIZEOF(.data));
LONG(LOADADDR(.data_RAM2));
LONG( ADDR(.data_RAM2));
LONG( SIZEOF(.data_RAM2));
LONG(LOADADDR(.data_RAM3));
LONG( ADDR(.data_RAM3));
LONG( SIZEOF(.data_RAM3));
__data_section_table_end = .;
__bss_section_table = .;
LONG( ADDR(.bss));
LONG( SIZEOF(.bss));
LONG( ADDR(.bss_RAM2));
LONG( SIZEOF(.bss_RAM2));
LONG( ADDR(.bss_RAM3));
LONG( SIZEOF(.bss_RAM3));
__bss_section_table_end = .;
__section_table_end = . ;
/* End of Global Section Table */
*(.after_vectors*)
} > MFlash256
.text : ALIGN(4)
{
*(.text*)
*(.rodata .rodata.* .constdata .constdata.*)
. = ALIGN(4);
} > MFlash256
/*
* for exception handling/unwind - some Newlib functions (in common
* with C++ and STDC++) use this.
*/
.ARM.extab : ALIGN(4)
{
*(.ARM.extab* .gnu.linkonce.armextab.*)
} > MFlash256
__exidx_start = .;
.ARM.exidx : ALIGN(4)
{
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
} > MFlash256
__exidx_end = .;
_etext = .;
/* DATA section for Ram1_16 */
.data_RAM2 : ALIGN(4)
{
FILL(0xff)
PROVIDE(__start_data_RAM2 = .) ;
*(.ramfunc.$RAM2)
*(.ramfunc.$Ram1_16)
*(.data.$RAM2)
*(.data.$Ram1_16)
*(.data.$RAM2.*)
*(.data.$Ram1_16.*)
. = ALIGN(4) ;
PROVIDE(__end_data_RAM2 = .) ;
} > Ram1_16 AT>MFlash256
/* DATA section for Ram2_4 */
.data_RAM3 : ALIGN(4)
{
FILL(0xff)
PROVIDE(__start_data_RAM3 = .) ;
*(.ramfunc.$RAM3)
*(.ramfunc.$Ram2_4)
*(.data.$RAM3)
*(.data.$Ram2_4)
*(.data.$RAM3.*)
*(.data.$Ram2_4.*)
. = ALIGN(4) ;
PROVIDE(__end_data_RAM3 = .) ;
} > Ram2_4 AT>MFlash256
/* MAIN DATA SECTION */
.uninit_RESERVED (NOLOAD) :
{
. = ALIGN(4) ;
KEEP(*(.bss.$RESERVED*))
. = ALIGN(4) ;
_end_uninit_RESERVED = .;
} > Ram0_16
/* Main DATA section (Ram0_16) */
.data : ALIGN(4)
{
FILL(0xff)
_data = . ;
*(vtable)
*(.ramfunc*)
*(.data*)
. = ALIGN(4) ;
_edata = . ;
} > Ram0_16 AT>MFlash256
/* BSS section for Ram1_16 */
.bss_RAM2 :
{
. = ALIGN(4) ;
PROVIDE(__start_bss_RAM2 = .) ;
*(.bss.$RAM2)
*(.bss.$Ram1_16)
*(.bss.$RAM2.*)
*(.bss.$Ram1_16.*)
. = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */
PROVIDE(__end_bss_RAM2 = .) ;
} > Ram1_16
/* BSS section for Ram2_4 */
.bss_RAM3 :
{
. = ALIGN(4) ;
PROVIDE(__start_bss_RAM3 = .) ;
*(.bss.$RAM3)
*(.bss.$Ram2_4)
*(.bss.$RAM3.*)
*(.bss.$Ram2_4.*)
. = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */
PROVIDE(__end_bss_RAM3 = .) ;
} > Ram2_4
/* MAIN BSS SECTION */
.bss :
{
. = ALIGN(4) ;
_bss = .;
*(.bss*)
*(COMMON)
. = ALIGN(4) ;
_ebss = .;
PROVIDE(end = .);
} > Ram0_16
/* NOINIT section for Ram1_16 */
.noinit_RAM2 (NOLOAD) :
{
. = ALIGN(4) ;
*(.noinit.$RAM2)
*(.noinit.$Ram1_16)
*(.noinit.$RAM2.*)
*(.noinit.$Ram1_16.*)
. = ALIGN(4) ;
} > Ram1_16
/* NOINIT section for Ram2_4 */
.noinit_RAM3 (NOLOAD) :
{
. = ALIGN(4) ;
*(.noinit.$RAM3)
*(.noinit.$Ram2_4)
*(.noinit.$RAM3.*)
*(.noinit.$Ram2_4.*)
. = ALIGN(4) ;
} > Ram2_4
/* DEFAULT NOINIT SECTION */
.noinit (NOLOAD):
{
. = ALIGN(4) ;
_noinit = .;
*(.noinit*)
. = ALIGN(4) ;
_end_noinit = .;
} > Ram0_16
PROVIDE(_pvHeapStart = DEFINED(__user_heap_base) ? __user_heap_base : .);
PROVIDE(_vStackTop = DEFINED(__user_stack_top) ? __user_stack_top : __top_Ram0_16 - 0);
/* ## Create checksum value (used in startup) ## */
PROVIDE(__valid_user_code_checksum = 0 -
(_vStackTop
+ (ResetISR + 1)
+ (NMI_Handler + 1)
+ (HardFault_Handler + 1)
+ (( DEFINED(MemManage_Handler) ? MemManage_Handler : 0 ) + 1) /* MemManage_Handler may not be defined */
+ (( DEFINED(BusFault_Handler) ? BusFault_Handler : 0 ) + 1) /* BusFault_Handler may not be defined */
+ (( DEFINED(UsageFault_Handler) ? UsageFault_Handler : 0 ) + 1) /* UsageFault_Handler may not be defined */
) );
/* Provide basic symbols giving location and size of main text
* block, including initial values of RW data sections. Note that
* these will need extending to give a complete picture with
* complex images (e.g multiple Flash banks).
*/
_image_start = LOADADDR(.text);
_image_end = LOADADDR(.data) + SIZEOF(.data);
_image_size = _image_end - _image_start;
}

View File

@ -0,0 +1,124 @@
/*
* The MIT License (MIT)
*
* Copyright (c) 2019 Ha Thach (tinyusb.org)
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*
* This file is part of the TinyUSB stack.
*/
#include "chip.h"
#include "../board.h"
#define LED_PORT 0
#define LED_PIN 25
// Wake Switch
#define BUTTON_PORT 0
#define BUTTON_PIN 17
/* System oscillator rate and RTC oscillator rate */
const uint32_t OscRateIn = 12000000;
const uint32_t RTCOscRateIn = 32768;
/* Pin muxing table, only items that need changing from their default pin
state are in this table. */
static const PINMUX_GRP_T pinmuxing[] =
{
{1, 11, (IOCON_MODE_PULLDOWN | IOCON_DIGMODE_EN)}, /* PIO1_11-ISP_1 (VBUS) */
};
// Invoked by startup code
void SystemInit(void)
{
Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_IOCON);
Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_SWM);
Chip_SYSCTL_PeriphReset(RESET_IOCON);
// Pin Mux
Chip_IOCON_SetPinMuxing(LPC_IOCON, pinmuxing, sizeof(pinmuxing) / sizeof(PINMUX_GRP_T));
Chip_SetupXtalClocking();
}
void board_init(void)
{
SystemCoreClockUpdate();
#if CFG_TUSB_OS == OPT_OS_NONE
// 1ms tick timer
SysTick_Config(SystemCoreClock / 1000);
#elif CFG_TUSB_OS == OPT_OS_FREERTOS
// If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY );
#endif
Chip_GPIO_Init(LPC_GPIO);
// LED
Chip_GPIO_SetPinDIROutput(LPC_GPIO, LED_PORT, LED_PIN);
// Button
Chip_GPIO_SetPinDIRInput(LPC_GPIO, BUTTON_PORT, BUTTON_PIN);
// USB: Setup PLL clock, and power
Chip_SWM_MovablePortPinAssign(SWM_USB_VBUS_I, 1, 11);
Chip_USB_Init();
}
//--------------------------------------------------------------------+
// Board porting API
//--------------------------------------------------------------------+
#if CFG_TUSB_OS == OPT_OS_NONE
volatile uint32_t system_ticks = 0;
void SysTick_Handler (void)
{
system_ticks++;
}
uint32_t board_millis(void)
{
return system_ticks;
}
#endif
void board_led_write(bool state)
{
Chip_GPIO_SetPinState(LPC_GPIO, LED_PORT, LED_PIN, state);
}
uint32_t board_button_read(void)
{
// active low
return Chip_GPIO_GetPinState(LPC_GPIO, BUTTON_PORT, BUTTON_PIN) ? 0 : 1;
}
int board_uart_read(uint8_t* buf, int len)
{
(void) buf; (void) len;
return 0;
}
int board_uart_write(void const * buf, int len)
{
(void) buf; (void) len;
return 0;
}

View File

@ -116,7 +116,7 @@ void board_init(void)
UART_CFG_Type UARTConfigStruct;
UART_ConfigStructInit(&UARTConfigStruct);
UARTConfigStruct.Baud_rate = CFG_UART_BAUDRATE;
UARTConfigStruct.Baud_rate = CFG_BOARD_UART_BAUDRATE;
UART_Init(BOARD_UART_PORT, &UARTConfigStruct);
UART_TxCmd(BOARD_UART_PORT, ENABLE); // Enable UART Transmit
@ -160,16 +160,14 @@ uint32_t board_button_read(void)
int board_uart_read(uint8_t* buf, int len)
{
// return UART_ReceiveByte(BOARD_UART_PORT);
(void) buf;
(void) len;
(void) buf; (void) len;
return 0;
}
int board_uart_write(void const * buf, int len)
{
// UART_Send(BOARD_UART_PORT, &c, 1, BLOCKING);
(void) buf;
(void) len;
(void) buf; (void) len;
return 0;
}

View File

@ -144,15 +144,13 @@ uint32_t board_button_read(void)
int board_uart_read(uint8_t* buf, int len)
{
(void) buf;
(void) len;
(void) buf; (void) len;
return 0;
}
int board_uart_write(void const * buf, int len)
{
(void) buf;
(void) len;
(void) buf; (void) len;
return 0;
}

View File

@ -145,15 +145,13 @@ uint32_t board_button_read(void)
int board_uart_read(uint8_t* buf, int len)
{
(void) buf;
(void) len;
(void) buf; (void) len;
return 0;
}
int board_uart_write(void const * buf, int len)
{
(void) buf;
(void) len;
(void) buf; (void) len;
return 0;
}

View File

@ -187,15 +187,13 @@ uint32_t board_button_read(void)
int board_uart_read(uint8_t* buf, int len)
{
(void) buf;
(void) len;
(void) buf; (void) len;
return 0;
}
int board_uart_write(void const * buf, int len)
{
(void) buf;
(void) len;
(void) buf; (void) len;
return 0;
}

View File

@ -108,7 +108,7 @@ void board_init(void)
UART_CFG_Type UARTConfigStruct;
UART_ConfigStructInit(&UARTConfigStruct);
UARTConfigStruct.Baud_rate = CFG_UART_BAUDRATE;
UARTConfigStruct.Baud_rate = CFG_BOARD_UART_BAUDRATE;
UART_Init(BOARD_UART_PORT, &UARTConfigStruct);
UART_TxCmd(BOARD_UART_PORT, ENABLE); // Enable UART Transmit
@ -152,16 +152,14 @@ uint32_t board_button_read(void)
int board_uart_read(uint8_t* buf, int len)
{
// return UART_ReceiveByte(BOARD_UART_PORT);
(void) buf;
(void) len;
(void) buf; (void) len;
return 0;
}
int board_uart_write(void const * buf, int len)
{
// UART_Send(BOARD_UART_PORT, &c, 1, BLOCKING);
(void) buf;
(void) len;
(void) buf; (void) len;
return 0;
}

View File

@ -28,14 +28,13 @@
#include "../board.h"
// PD_10
#define LED_PORT 6
#define LED_PIN 24
#define LED_PORT 6
#define LED_PIN 24
// P4_0
#define BUTTON_PORT 2
#define BUTTON_PIN 0
//--------------------------------------------------------------------+
// MACRO TYPEDEF CONSTANT ENUM DECLARATION
//--------------------------------------------------------------------+
@ -118,7 +117,7 @@ void board_init(void)
UART_CFG_Type UARTConfigStruct;
UART_ConfigStructInit(&UARTConfigStruct);
UARTConfigStruct.Baud_rate = CFG_UART_BAUDRATE;
UARTConfigStruct.Baud_rate = CFG_BOARD_UART_BAUDRATE;
UARTConfigStruct.Clock_Speed = 0;
UART_Init(BOARD_UART_PORT, &UARTConfigStruct);
@ -191,16 +190,14 @@ uint32_t board_button_read(void)
int board_uart_read(uint8_t* buf, int len)
{
//return UART_ReceiveByte(BOARD_UART_PORT);
(void) buf;
(void) len;
(void) buf; (void) len;
return 0;
}
int board_uart_write(void const * buf, int len)
{
//UART_Send(BOARD_UART_PORT, &c, 1, BLOCKING);
(void) buf;
(void) len;
(void) buf; (void) len;
return 0;
}

View File

@ -116,6 +116,18 @@ uint32_t board_button_read(void)
return gpio_get_pin_level(BUTTON_PIN) ? 0 : 1;
}
int board_uart_read(uint8_t* buf, int len)
{
(void) buf; (void) len;
return 0;
}
int board_uart_write(void const * buf, int len)
{
(void) buf; (void) len;
return 0;
}
#if CFG_TUSB_OS == OPT_OS_NONE
volatile uint32_t system_ticks = 0;
void SysTick_Handler (void)

View File

@ -105,6 +105,18 @@ uint32_t board_button_read(void)
return gpio_get_pin_level(BUTTON_PIN) ? 0 : 1;
}
int board_uart_read(uint8_t* buf, int len)
{
(void) buf; (void) len;
return 0;
}
int board_uart_write(void const * buf, int len)
{
(void) buf; (void) len;
return 0;
}
#if CFG_TUSB_OS == OPT_OS_NONE
volatile uint32_t system_ticks = 0;

View File

@ -132,7 +132,7 @@ void board_init(void)
UART_CFG_Type UARTConfigStruct;
UART_ConfigStructInit(&UARTConfigStruct);
UARTConfigStruct.Baud_rate = CFG_UART_BAUDRATE;
UARTConfigStruct.Baud_rate = CFG_BOARD_UART_BAUDRATE;
UARTConfigStruct.Clock_Speed = 0;
UART_Init(BOARD_UART_PORT, &UARTConfigStruct);
@ -236,16 +236,14 @@ uint32_t board_button_read(void)
int board_uart_read(uint8_t* buf, int len)
{
//return UART_ReceiveByte(BOARD_UART_PORT);
(void) buf;
(void) len;
(void) buf; (void) len;
return 0;
}
int board_uart_write(void const * buf, int len)
{
//UART_Send(BOARD_UART_PORT, &c, 1, BLOCKING);
(void) buf;
(void) len;
(void) buf; (void) len;
return 0;
}

View File

@ -24,6 +24,7 @@ LDFLAGS += -L$(TOP)/hw/mcu/nordic/nrfx/mdk
SRC_C += \
hw/mcu/nordic/nrfx/drivers/src/nrfx_power.c \
hw/mcu/nordic/nrfx/drivers/src/nrfx_uarte.c \
hw/mcu/nordic/nrfx/mdk/system_nrf52840.c \
INC += \

View File

@ -29,6 +29,7 @@
#include "nrfx.h"
#include "nrfx/hal/nrf_gpio.h"
#include "nrfx/drivers/include/nrfx_power.h"
#include "nrfx/drivers/include/nrfx_uarte.h"
#ifdef SOFTDEVICE_PRESENT
#include "nrf_sdm.h"
@ -44,6 +45,12 @@
#define BUTTON_PIN 11
#define BUTTON_STATE_ACTIVE 0
#define UART_RX_PIN 8
#define UART_TX_PIN 6
static nrfx_uarte_t _uart_id = NRFX_UARTE_INSTANCE(0);
//static void uart_handler(nrfx_uart_event_t const * p_event, void* p_context);
// tinyusb function that handles power event (detected, ready, removed)
// We must call it within SD's SOC event handler, or set it as power event handler if SD is not enabled.
extern void tusb_hal_nrf_power_event(uint32_t event);
@ -69,6 +76,22 @@ void board_init(void)
SysTick_Config(SystemCoreClock/1000);
#endif
// UART
nrfx_uarte_config_t uart_cfg =
{
.pseltxd = UART_TX_PIN,
.pselrxd = UART_RX_PIN,
.pselcts = NRF_UARTE_PSEL_DISCONNECTED,
.pselrts = NRF_UARTE_PSEL_DISCONNECTED,
.p_context = NULL,
.hwfc = NRF_UARTE_HWFC_DISABLED,
.parity = NRF_UARTE_PARITY_EXCLUDED,
.baudrate = NRF_UARTE_BAUDRATE_115200, // CFG_BOARD_UART_BAUDRATE
.interrupt_priority = 7
};
nrfx_uarte_init(&_uart_id, &uart_cfg, NULL); //uart_handler);
#if TUSB_OPT_DEVICE_ENABLED
// Priorities 0, 1, 4 (nRF52) are reserved for SoftDevice
// 2 is highest for application
@ -124,18 +147,21 @@ uint32_t board_button_read(void)
return BUTTON_STATE_ACTIVE == nrf_gpio_pin_read(BUTTON_PIN);
}
//static void uart_handler(nrfx_uart_event_t const * p_event, void* p_context)
//{
//
//}
int board_uart_read(uint8_t* buf, int len)
{
(void) buf;
(void) len;
(void) buf; (void) len;
return 0;
// return NRFX_SUCCESS == nrfx_uart_rx(&_uart_id, buf, (size_t) len) ? len : 0;
}
int board_uart_write(void const * buf, int len)
{
(void) buf;
(void) len;
return 0;
return (NRFX_SUCCESS == nrfx_uarte_tx(&_uart_id, (uint8_t const*) buf, (size_t) len)) ? len : 0;
}
#if CFG_TUSB_OS == OPT_OS_NONE

View File

@ -123,15 +123,13 @@ uint32_t board_button_read(void)
int board_uart_read(uint8_t* buf, int len)
{
(void) buf;
(void) len;
(void) buf; (void) len;
return 0;
}
int board_uart_write(void const * buf, int len)
{
(void) buf;
(void) len;
(void) buf; (void) len;
return 0;
}

View File

@ -1,183 +0,0 @@
/*
* The MIT License (MIT)
*
* Copyright (c) 2019 Ha Thach (tinyusb.org)
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*
* This file is part of the TinyUSB stack.
*/
#include "board.h"
#if CFG_PRINTF_TARGET != PRINTF_TARGET_SEMIHOST
#if CFG_PRINTF_TARGET == PRINTF_TARGET_UART
#define retarget_getchar() board_uart_getchar()
#define retarget_putchar(c) board_uart_putchar(c);
#elif CFG_PRINTF_TARGET == PRINTF_TARGET_SWO
volatile int32_t ITM_RxBuffer; // keil variable to read from SWO
#define retarget_getchar() ITM_ReceiveChar()
#define retarget_putchar(c) ITM_SendChar(c)
#else
#error Target is not implemented yet
#endif
//--------------------------------------------------------------------+
// LPCXPRESSO / RED SUITE
//--------------------------------------------------------------------+
#if defined __CODE_RED
#if CFG_PRINTF_TARGET == PRINTF_TARGET_SWO
#error author does not know how to retarget SWO with lpcxpresso/red-suite
#endif
// Called by bottom level of printf routine within RedLib C library to write
// a character. With the default semihosting stub, this would write the character
// to the debugger console window . But this version writes
// the character to the UART.
int __sys_write (int iFileHandle, char *buf, int length)
{
(void) iFileHandle;
for (int i=0; i<length; i++)
{
if (buf[i] == '\n') retarget_putchar('\r');
retarget_putchar( buf[i] );
}
return length;
}
// Called by bottom level of scanf routine within RedLib C library to read
// a character. With the default semihosting stub, this would read the character
// from the debugger console window (which acts as stdin). But this version reads
// the character from the UART.
int __sys_readc (void)
{
return (int) retarget_getchar();
}
#elif defined __SES_ARM && 0
#include <stdarg.h>
#include <stdio.h>
#include "__libc.h"
int printf(const char *fmt,...) {
char buffer[128];
va_list args;
va_start (args, fmt);
int n = vsnprintf(buffer, sizeof(buffer), fmt, args);
for(int i=0; i < n; i++)
{
retarget_putchar( buffer[i] );
}
va_end(args);
return n;
}
int __putchar(int ch, __printf_tag_ptr ctx)
{
(void)ctx;
retarget_putchar( (uint8_t) ch );
return 1;
}
int __getchar()
{
return retarget_getchar();
}
//--------------------------------------------------------------------+
// KEIL
//--------------------------------------------------------------------+
#elif defined __CC_ARM // keil
struct __FILE {
uint32_t handle;
};
void _ttywrch(int ch)
{
if ( ch == '\n' ) retarget_putchar('\r');
retarget_putchar(ch);
}
int fgetc(FILE *f)
{
return retarget_getchar();
}
int fputc(int ch, FILE *f)
{
_ttywrch(ch);
return ch;
}
//--------------------------------------------------------------------+
// IAR
//--------------------------------------------------------------------+
#elif defined __ICCARM__ // TODO could not able to retarget to UART with IAR
#if CFG_PRINTF_TARGET == PRINTF_TARGET_UART
#include <stddef.h>
size_t __write(int handle, const unsigned char *buf, size_t length)
{
/* Check for the command to flush all handles */
if (handle == -1) return 0;
/* Check for stdout and stderr (only necessary if FILE descriptors are enabled.) */
if (handle != 1 && handle != 2) return -1;
for (size_t i=0; i<length; i++)
{
if (buf[i] == '\n') retarget_putchar('\r');
retarget_putchar( buf[i] );
}
return length;
}
size_t __read(int handle, unsigned char *buf, size_t bufSize)
{
/* Check for stdin (only necessary if FILE descriptors are enabled) */
if (handle != 0) return -1;
size_t i;
for (i=0; i<bufSize; i++)
{
int8_t ch = board_uart_getchar();
if (ch == -1) break;
buf[i] = ch;
}
return i;
}
#endif
#endif
#endif // CFG_PRINTF_TARGET != PRINTF_TARGET_SEMIHOST

View File

@ -174,6 +174,18 @@ uint32_t board_button_read(void)
return BUTTON_STATE_ACTIVE == HAL_GPIO_ReadPin(BUTTON_PORT, BUTTON_PIN);
}
int board_uart_read(uint8_t* buf, int len)
{
(void) buf; (void) len;
return 0;
}
int board_uart_write(void const * buf, int len)
{
(void) buf; (void) len;
return 0;
}
#if CFG_TUSB_OS == OPT_OS_NONE
volatile uint32_t system_ticks = 0;
void SysTick_Handler (void)

47
hw/bsp/spresense/board.mk Normal file
View File

@ -0,0 +1,47 @@
SPRESENSE_SDK = $(TOP)/hw/mcu/sony/cxd56/spresense-exported-sdk
INC += \
$(SPRESENSE_SDK)/nuttx/include \
$(SPRESENSE_SDK)/nuttx/arch \
$(SPRESENSE_SDK)/nuttx/arch/chip \
$(SPRESENSE_SDK)/sdk/bsp/include \
$(SPRESENSE_SDK)/sdk/bsp/include/sdk \
CFLAGS += \
-DCONFIG_WCHAR_BUILTIN \
-DCONFIG_HAVE_DOUBLE \
-Dmain=spresense_main \
-pipe \
-std=gnu11 \
-mcpu=cortex-m4 \
-mthumb \
-mfpu=fpv4-sp-d16 \
-mfloat-abi=hard \
-mabi=aapcs \
-fno-builtin \
-fno-strength-reduce \
-fomit-frame-pointer \
-DCFG_TUSB_MCU=OPT_MCU_CXD56 \
LIBS += \
$(SPRESENSE_SDK)/sdk/libs/libapps.a \
$(SPRESENSE_SDK)/sdk/libs/libsdk.a \
LD_FILE = hw/mcu/sony/cxd56/spresense-exported-sdk/nuttx/build/ramconfig.ld
LDFLAGS += \
-Xlinker --entry=__start \
-nostartfiles \
-nodefaultlibs \
-Wl,--defsym,__stack=_vectors+786432 \
-Wl,--gc-sections \
-u spresense_main \
# For TinyUSB port source
VENDOR = sony
CHIP_FAMILY = cxd56
# flash
flash:
$(SPRESENSE_SDK)/sdk/tools/linux/mkspk -c 2 $(BUILD)/spresense-firmware.elf nuttx $(BUILD)/spresense-firmware.spk
$(SPRESENSE_SDK)/sdk/tools/flash.sh -c /dev/ttyUSB0 $(BUILD)/spresense-firmware.spk

View File

@ -0,0 +1,105 @@
/*
* The MIT License (MIT)
*
* Copyright 2019 Sony Semiconductor Solutions Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*
* This file is part of the TinyUSB stack.
*/
#include <sys/boardctl.h>
#include <nuttx/arch.h>
#include <arch/board/board.h>
#include <arch/chip/pin.h>
#include "bsp/board.h"
/*------------------------------------------------------------------*/
/* MACRO TYPEDEF CONSTANT ENUM
*------------------------------------------------------------------*/
#define LED_PIN PIN_I2S1_BCK
#define BUTTON_PIN PIN_HIF_IRQ_OUT
// Initialize on-board peripherals : led, button, uart and USB
void board_init(void)
{
boardctl(BOARDIOC_INIT, 0);
board_gpio_write(PIN_I2S1_BCK, -1);
board_gpio_config(PIN_I2S1_BCK, 0, false, true, PIN_FLOAT);
board_gpio_write(PIN_HIF_IRQ_OUT, -1);
board_gpio_config(PIN_HIF_IRQ_OUT, 0, true, true, PIN_FLOAT);
};
//--------------------------------------------------------------------+
// Board porting API
//--------------------------------------------------------------------+
// Turn LED on or off
void board_led_write(bool state)
{
board_gpio_write(LED_PIN, state);
}
// Get the current state of button
// a '1' means active (pressed), a '0' means inactive.
uint32_t board_button_read(void)
{
if (board_gpio_read(BUTTON_PIN))
{
return 0;
}
return 1;
}
// Get characters from UART
int board_uart_read(uint8_t *buf, int len)
{
int r = read(0, buf, len);
return r;
}
// Send characters to UART
int board_uart_write(void const *buf, int len)
{
int r = write(1, buf, len);
return r;
}
// Get current milliseconds
uint32_t board_millis(void)
{
struct timespec tp;
/* Wait until RTC is available */
while (g_rtc_enabled == false);
if (clock_gettime(CLOCK_MONOTONIC, &tp))
{
return 0;
}
return (((uint64_t)tp.tv_sec) * 1000 + tp.tv_nsec / 1000000);
}

View File

@ -109,6 +109,18 @@ uint32_t board_button_read(void)
return BUTTON_STATE_ACTIVE == HAL_GPIO_ReadPin(BUTTON_PORT, BUTTON_PIN);
}
int board_uart_read(uint8_t* buf, int len)
{
(void) buf; (void) len;
return 0;
}
int board_uart_write(void const * buf, int len)
{
(void) buf; (void) len;
return 0;
}
#if CFG_TUSB_OS == OPT_OS_NONE
volatile uint32_t system_ticks = 0;
void SysTick_Handler (void)

View File

@ -131,6 +131,18 @@ uint32_t board_button_read(void)
return BUTTON_STATE_ACTIVE == HAL_GPIO_ReadPin(BUTTON_PORT, BUTTON_PIN);
}
int board_uart_read(uint8_t* buf, int len)
{
(void) buf; (void) len;
return 0;
}
int board_uart_write(void const * buf, int len)
{
(void) buf; (void) len;
return 0;
}
#if CFG_TUSB_OS == OPT_OS_NONE
volatile uint32_t system_ticks = 0;
void SysTick_Handler (void)

View File

@ -0,0 +1,167 @@
/*
*****************************************************************************
**
** File : STM32F103XB_FLASH.ld
**
** Abstract : Linker script for STM32F103xB Device with
** 128KByte FLASH, 20KByte RAM
**
** Set heap size, stack size and stack location according
** to application requirements.
**
** Set memory bank area and size if external memory is used.
**
** Target : STMicroelectronics STM32
**
**
** Distribution: The file is distributed as is, without any warranty
** of any kind.
**
** (c)Copyright Ac6.
** You may use this file as-is or modify it according to the needs of your
** project. Distribution of this file (unmodified or modified) is not
** permitted. Ac6 permit registered System Workbench for MCU users the
** rights to distribute the assembled, compiled & linked contents of this
** file as part of an application binary file, provided that it is built
** using the System Workbench for MCU toolchain.
**
*****************************************************************************
*/
/* Entry Point */
ENTRY(Reset_Handler)
/* Highest address of the user mode stack */
_estack = 0x20004FFF; /* end of RAM */
/* Generate a link error if heap and stack don't fit into RAM */
_Min_Heap_Size = 0x200; /* required amount of heap */
_Min_Stack_Size = 0x400; /* required amount of stack */
/* Specify the memory areas */
MEMORY
{
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 128K
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 20K
}
/* Define output sections */
SECTIONS
{
/* The startup code goes first into FLASH */
.isr_vector :
{
. = ALIGN(4);
KEEP(*(.isr_vector)) /* Startup code */
. = ALIGN(4);
} >FLASH
/* The program code and other data goes into FLASH */
.text :
{
. = ALIGN(4);
*(.text) /* .text sections (code) */
*(.text*) /* .text* sections (code) */
*(.glue_7) /* glue arm to thumb code */
*(.glue_7t) /* glue thumb to arm code */
*(.eh_frame)
KEEP (*(.init))
KEEP (*(.fini))
. = ALIGN(4);
_etext = .; /* define a global symbols at end of code */
} >FLASH
/* Constant data goes into FLASH */
.rodata :
{
. = ALIGN(4);
*(.rodata) /* .rodata sections (constants, strings, etc.) */
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
. = ALIGN(4);
} >FLASH
.ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH
.ARM : {
__exidx_start = .;
*(.ARM.exidx*)
__exidx_end = .;
} >FLASH
.preinit_array :
{
PROVIDE_HIDDEN (__preinit_array_start = .);
KEEP (*(.preinit_array*))
PROVIDE_HIDDEN (__preinit_array_end = .);
} >FLASH
.init_array :
{
PROVIDE_HIDDEN (__init_array_start = .);
KEEP (*(SORT(.init_array.*)))
KEEP (*(.init_array*))
PROVIDE_HIDDEN (__init_array_end = .);
} >FLASH
.fini_array :
{
PROVIDE_HIDDEN (__fini_array_start = .);
KEEP (*(SORT(.fini_array.*)))
KEEP (*(.fini_array*))
PROVIDE_HIDDEN (__fini_array_end = .);
} >FLASH
/* used by the startup to initialize data */
_sidata = LOADADDR(.data);
/* Initialized data sections goes into RAM, load LMA copy after code */
.data :
{
. = ALIGN(4);
_sdata = .; /* create a global symbol at data start */
*(.data) /* .data sections */
*(.data*) /* .data* sections */
. = ALIGN(4);
_edata = .; /* define a global symbol at data end */
} >RAM AT> FLASH
/* Uninitialized data section */
. = ALIGN(4);
.bss :
{
/* This is used by the startup in order to initialize the .bss secion */
_sbss = .; /* define a global symbol at bss start */
__bss_start__ = _sbss;
*(.bss)
*(.bss*)
*(COMMON)
. = ALIGN(4);
_ebss = .; /* define a global symbol at bss end */
__bss_end__ = _ebss;
} >RAM
/* User_heap_stack section, used to check that there is enough RAM left */
._user_heap_stack :
{
. = ALIGN(8);
PROVIDE ( end = . );
PROVIDE ( _end = . );
. = . + _Min_Heap_Size;
. = . + _Min_Stack_Size;
. = ALIGN(8);
} >RAM
/* Remove information from the standard libraries */
/DISCARD/ :
{
libc.a ( * )
libm.a ( * )
libgcc.a ( * )
}
.ARM.attributes 0 : { *(.ARM.attributes) }
}

View File

@ -15,7 +15,7 @@ ST_HAL_DRIVER = hw/mcu/st/st_driver/STM32F1xx_HAL_Driver
ST_CMSIS = hw/mcu/st/st_driver/CMSIS/Device/ST/STM32F1xx
# All source paths should be relative to the top level.
LD_FILE = $(ST_CMSIS)/Source/Templates/gcc/linker/STM32F103XB_FLASH.ld
LD_FILE = hw/bsp/$(BOARD)/STM32F103XB_FLASH.ld
SRC_C += \
$(ST_CMSIS)/Source/Templates/system_stm32f1xx.c \

View File

@ -139,6 +139,18 @@ uint32_t board_button_read(void)
return BUTTON_STATE_ACTIVE == HAL_GPIO_ReadPin(BUTTON_PORT, BUTTON_PIN);
}
int board_uart_read(uint8_t* buf, int len)
{
(void) buf; (void) len;
return 0;
}
int board_uart_write(void const * buf, int len)
{
(void) buf; (void) len;
return 0;
}
#if CFG_TUSB_OS == OPT_OS_NONE
volatile uint32_t system_ticks = 0;
void SysTick_Handler (void)

View File

@ -152,6 +152,18 @@ uint32_t board_button_read(void)
return BUTTON_STATE_ACTIVE == HAL_GPIO_ReadPin(BUTTON_PORT, BUTTON_PIN);
}
int board_uart_read(uint8_t* buf, int len)
{
(void) buf; (void) len;
return 0;
}
int board_uart_write(void const * buf, int len)
{
(void) buf; (void) len;
return 0;
}
#if CFG_TUSB_OS == OPT_OS_NONE
volatile uint32_t system_ticks = 0;
void SysTick_Handler (void)

View File

@ -143,6 +143,18 @@ uint32_t board_button_read(void)
return BUTTON_STATE_ACTIVE == HAL_GPIO_ReadPin(BUTTON_PORT, BUTTON_PIN);
}
int board_uart_read(uint8_t* buf, int len)
{
(void) buf; (void) len;
return 0;
}
int board_uart_write(void const * buf, int len)
{
(void) buf; (void) len;
return 0;
}
#if CFG_TUSB_OS == OPT_OS_NONE
volatile uint32_t system_ticks = 0;
void SysTick_Handler (void)

View File

@ -169,6 +169,18 @@ uint32_t board_button_read(void)
return BUTTON_STATE_ACTIVE == HAL_GPIO_ReadPin(BUTTON_PORT, BUTTON_PIN);
}
int board_uart_read(uint8_t* buf, int len)
{
(void) buf; (void) len;
return 0;
}
int board_uart_write(void const * buf, int len)
{
(void) buf; (void) len;
return 0;
}
#if CFG_TUSB_OS == OPT_OS_NONE
volatile uint32_t system_ticks = 0;
void SysTick_Handler (void)

View File

@ -168,6 +168,18 @@ uint32_t board_button_read(void)
return BUTTON_STATE_ACTIVE == HAL_GPIO_ReadPin(BUTTON_PORT, BUTTON_PIN);
}
int board_uart_read(uint8_t* buf, int len)
{
(void) buf; (void) len;
return 0;
}
int board_uart_write(void const * buf, int len)
{
(void) buf; (void) len;
return 0;
}
#if CFG_TUSB_OS == OPT_OS_NONE
volatile uint32_t system_ticks = 0;
void SysTick_Handler (void)

View File

@ -195,6 +195,18 @@ uint32_t board_button_read(void)
return BUTTON_STATE_ACTIVE == HAL_GPIO_ReadPin(BUTTON_PORT, BUTTON_PIN);
}
int board_uart_read(uint8_t* buf, int len)
{
(void) buf; (void) len;
return 0;
}
int board_uart_write(void const * buf, int len)
{
(void) buf; (void) len;
return 0;
}
#if CFG_TUSB_OS == OPT_OS_NONE
volatile uint32_t system_ticks = 0;
void SysTick_Handler (void)

View File

@ -25,6 +25,7 @@ SRC_C += \
$(ST_HAL_DRIVER)/Src/stm32f7xx_hal_rcc.c \
$(ST_HAL_DRIVER)/Src/stm32f7xx_hal_rcc_ex.c \
$(ST_HAL_DRIVER)/Src/stm32f7xx_hal_gpio.c \
$(ST_HAL_DRIVER)/Src/stm32f7xx_hal_uart.c \
$(ST_HAL_DRIVER)/Src/stm32f7xx_hal_pwr_ex.c
SRC_S += \

View File

@ -38,6 +38,24 @@
#define BUTTON_PIN GPIO_PIN_13
#define BUTTON_STATE_ACTIVE 1
#define UARTx USART3
#define UART_GPIO_PORT GPIOD
#define UART_GPIO_AF GPIO_AF7_USART3
#define UART_TX_PIN GPIO_PIN_8
#define UART_RX_PIN GPIO_PIN_9
UART_HandleTypeDef UartHandle;
// enable all LED, Button, Uart, USB clock
static void all_rcc_clk_enable(void)
{
__HAL_RCC_GPIOA_CLK_ENABLE(); // USB D+, D-
__HAL_RCC_GPIOB_CLK_ENABLE(); // LED
__HAL_RCC_GPIOC_CLK_ENABLE(); // Button
__HAL_RCC_GPIOD_CLK_ENABLE(); // Uart tx, rx
__HAL_RCC_USART3_CLK_ENABLE(); // Uart module
}
/**
* @brief System Clock Configuration
* The system Clock is configured as follow :
@ -109,13 +127,13 @@ void board_init(void)
#endif
SystemClock_Config();
SystemCoreClockUpdate();
all_rcc_clk_enable();
GPIO_InitTypeDef GPIO_InitStruct;
// LED
__HAL_RCC_GPIOB_CLK_ENABLE();
GPIO_InitStruct.Pin = LED_PIN;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
GPIO_InitStruct.Pull = GPIO_PULLUP;
@ -123,16 +141,32 @@ void board_init(void)
HAL_GPIO_Init(LED_PORT, &GPIO_InitStruct);
// Button
__HAL_RCC_GPIOC_CLK_ENABLE();
GPIO_InitStruct.Pin = BUTTON_PIN;
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
HAL_GPIO_Init(BUTTON_PORT, &GPIO_InitStruct);
// Uart
GPIO_InitStruct.Pin = UART_TX_PIN | UART_RX_PIN;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_PULLUP;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
GPIO_InitStruct.Alternate = UART_GPIO_AF;
HAL_GPIO_Init(UART_GPIO_PORT, &GPIO_InitStruct);
UartHandle.Instance = UARTx;
UartHandle.Init.BaudRate = CFG_BOARD_UART_BAUDRATE;
UartHandle.Init.WordLength = UART_WORDLENGTH_8B;
UartHandle.Init.StopBits = UART_STOPBITS_1;
UartHandle.Init.Parity = UART_PARITY_NONE;
UartHandle.Init.HwFlowCtl = UART_HWCONTROL_NONE;
UartHandle.Init.Mode = UART_MODE_TX_RX;
UartHandle.Init.OverSampling = UART_OVERSAMPLING_16;
HAL_UART_Init(&UartHandle);
/* Configure USB FS GPIOs */
/* Configure DM DP Pins */
__HAL_RCC_GPIOA_CLK_ENABLE();
GPIO_InitStruct.Pin = (GPIO_PIN_11 | GPIO_PIN_12);
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
@ -155,7 +189,6 @@ void board_init(void)
/* Enable USB FS Clocks */
__HAL_RCC_USB_OTG_FS_CLK_ENABLE();
}
//--------------------------------------------------------------------+
@ -180,8 +213,8 @@ int board_uart_read(uint8_t* buf, int len)
int board_uart_write(void const * buf, int len)
{
(void) buf; (void) len;
return 0;
HAL_UART_Transmit(&UartHandle, (uint8_t*) buf, len, 0xffff);
return len;
}
#if CFG_TUSB_OS == OPT_OS_NONE

View File

@ -41,7 +41,7 @@
/* #define HAL_CRYP_MODULE_ENABLED */
/* #define HAL_DAC_MODULE_ENABLED */
/* #define HAL_DCMI_MODULE_ENABLED */
/* #define HAL_DMA_MODULE_ENABLED */
#define HAL_DMA_MODULE_ENABLED
/* #define HAL_DMA2D_MODULE_ENABLED */
/* #define HAL_ETH_MODULE_ENABLED */
#define HAL_FLASH_MODULE_ENABLED
@ -66,7 +66,7 @@
/* #define HAL_SPDIFRX_MODULE_ENABLED */
/* #define HAL_SPI_MODULE_ENABLED */
/* #define HAL_TIM_MODULE_ENABLED */
/* #define HAL_UART_MODULE_ENABLED */
#define HAL_UART_MODULE_ENABLED
/* #define HAL_USART_MODULE_ENABLED */
/* #define HAL_IRDA_MODULE_ENABLED */
/* #define HAL_SMARTCARD_MODULE_ENABLED */

View File

@ -161,6 +161,18 @@ uint32_t board_button_read(void)
return BUTTON_STATE_ACTIVE == HAL_GPIO_ReadPin(BUTTON_PORT, BUTTON_PIN);
}
int board_uart_read(uint8_t* buf, int len)
{
(void) buf; (void) len;
return 0;
}
int board_uart_write(void const * buf, int len)
{
(void) buf; (void) len;
return 0;
}
#if CFG_TUSB_OS == OPT_OS_NONE
volatile uint32_t system_ticks = 0;
void SysTick_Handler (void)

View File

@ -28,6 +28,7 @@
#include "stm32l4xx.h"
#include "stm32l4xx_hal_conf.h"
#include "stm32l4xx_hal.h"
#define LED_PORT GPIOB
#define LED_PIN GPIO_PIN_2
@ -117,8 +118,6 @@ void board_init(void)
SystemClock_Config();
HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_MSI, RCC_MCODIV_1);//RCC_MCO1SOURCE_SYSCLK
/* Enable Power Clock*/
__HAL_RCC_PWR_CLK_ENABLE();
@ -165,20 +164,12 @@ void board_init(void)
GPIO_InitStruct.Pull = GPIO_NOPULL;
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
/* This for ID line */
GPIO_InitStruct.Pin = GPIO_PIN_12;
GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
GPIO_InitStruct.Pull = GPIO_PULLUP;
GPIO_InitStruct.Speed = GPIO_SPEED_HIGH;
GPIO_InitStruct.Alternate = GPIO_AF10_OTG_FS;
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
/* Enable USB FS Clock */
__HAL_RCC_USB_OTG_FS_CLK_ENABLE();
}
//--------------------------------------------------------------------+
// Board porting API
// board porting API
//--------------------------------------------------------------------+
void board_led_write(bool state)
@ -191,6 +182,18 @@ uint32_t board_button_read(void)
return BUTTON_STATE_ACTIVE == HAL_GPIO_ReadPin(BUTTON_PORT, BUTTON_PIN);
}
int board_uart_read(uint8_t* buf, int len)
{
(void) buf; (void) len;
return 0;
}
int board_uart_write(void const * buf, int len)
{
(void) buf; (void) len;
return 0;
}
#if CFG_TUSB_OS == OPT_OS_NONE
volatile uint32_t system_ticks = 0;
void SysTick_Handler (void)

View File

@ -1,879 +1,10 @@
#ifndef NRFX_CONFIG_H__
#define NRFX_CONFIG_H__
#define NRFX_PRS_ENABLED 0
#define NRFX_CLOCK_ENABLED 0
#define NRFX_POWER_ENABLED 1
#define NRFX_POWER_CONFIG_IRQ_PRIORITY 7
// <e> NRFX_POWER_ENABLED - nrfx_power - POWER peripheral driver
//==========================================================
#ifndef NRFX_POWER_ENABLED
#define NRFX_POWER_ENABLED 1
#endif
// <o> NRFX_POWER_CONFIG_IRQ_PRIORITY - Interrupt priority
// <0=> 0 (highest)
// <1=> 1
// <2=> 2
// <3=> 3
// <4=> 4
// <5=> 5
// <6=> 6
// <7=> 7
#ifndef NRFX_POWER_CONFIG_IRQ_PRIORITY
#define NRFX_POWER_CONFIG_IRQ_PRIORITY 7
#endif
// <q> NRFX_POWER_CONFIG_DEFAULT_DCDCEN - The default configuration of main DCDC regulator
// <i> This settings means only that components for DCDC regulator are installed and it can be enabled.
#ifndef NRFX_POWER_CONFIG_DEFAULT_DCDCEN
#define NRFX_POWER_CONFIG_DEFAULT_DCDCEN 0
#endif
// <q> NRFX_POWER_CONFIG_DEFAULT_DCDCENHV - The default configuration of High Voltage DCDC regulator
// <i> This settings means only that components for DCDC regulator are installed and it can be enabled.
#ifndef NRFX_POWER_CONFIG_DEFAULT_DCDCENHV
#define NRFX_POWER_CONFIG_DEFAULT_DCDCENHV 0
#endif
// </e>
// <e> NRFX_QSPI_ENABLED - nrfx_qspi - QSPI peripheral driver
//==========================================================
#ifndef NRFX_QSPI_ENABLED
#define NRFX_QSPI_ENABLED 1
#endif
// <o> NRFX_QSPI_CONFIG_SCK_DELAY - tSHSL, tWHSL and tSHWL in number of 16 MHz periods (62.5 ns). <0-255>
#ifndef NRFX_QSPI_CONFIG_SCK_DELAY
#define NRFX_QSPI_CONFIG_SCK_DELAY 1
#endif
// <o> NRFX_QSPI_CONFIG_XIP_OFFSET - Address offset in the external memory for Execute in Place operation.
#ifndef NRFX_QSPI_CONFIG_XIP_OFFSET
#define NRFX_QSPI_CONFIG_XIP_OFFSET 0
#endif
// <o> NRFX_QSPI_CONFIG_READOC - Number of data lines and opcode used for reading.
// <0=> FastRead
// <1=> Read2O
// <2=> Read2IO
// <3=> Read4O
// <4=> Read4IO
#ifndef NRFX_QSPI_CONFIG_READOC
#define NRFX_QSPI_CONFIG_READOC 0
#endif
// <o> NRFX_QSPI_CONFIG_WRITEOC - Number of data lines and opcode used for writing.
// <0=> PP
// <1=> PP2O
// <2=> PP4O
// <3=> PP4IO
#ifndef NRFX_QSPI_CONFIG_WRITEOC
#define NRFX_QSPI_CONFIG_WRITEOC 0
#endif
// <o> NRFX_QSPI_CONFIG_ADDRMODE - Addressing mode.
// <0=> 24bit
// <1=> 32bit
#ifndef NRFX_QSPI_CONFIG_ADDRMODE
#define NRFX_QSPI_CONFIG_ADDRMODE 0
#endif
// <o> NRFX_QSPI_CONFIG_MODE - SPI mode.
// <0=> Mode 0
// <1=> Mode 1
#ifndef NRFX_QSPI_CONFIG_MODE
#define NRFX_QSPI_CONFIG_MODE 0
#endif
// <o> NRFX_QSPI_CONFIG_FREQUENCY - Frequency divider.
// <0=> 32MHz/1
// <1=> 32MHz/2
// <2=> 32MHz/3
// <3=> 32MHz/4
// <4=> 32MHz/5
// <5=> 32MHz/6
// <6=> 32MHz/7
// <7=> 32MHz/8
// <8=> 32MHz/9
// <9=> 32MHz/10
// <10=> 32MHz/11
// <11=> 32MHz/12
// <12=> 32MHz/13
// <13=> 32MHz/14
// <14=> 32MHz/15
// <15=> 32MHz/16
#ifndef NRFX_QSPI_CONFIG_FREQUENCY
#define NRFX_QSPI_CONFIG_FREQUENCY 15
#endif
// <s> NRFX_QSPI_PIN_SCK - SCK pin value.
#ifndef NRFX_QSPI_PIN_SCK
#define NRFX_QSPI_PIN_SCK NRF_QSPI_PIN_NOT_CONNECTED
#endif
// <s> NRFX_QSPI_PIN_CSN - CSN pin value.
#ifndef NRFX_QSPI_PIN_CSN
#define NRFX_QSPI_PIN_CSN NRF_QSPI_PIN_NOT_CONNECTED
#endif
// <s> NRFX_QSPI_PIN_IO0 - IO0 pin value.
#ifndef NRFX_QSPI_PIN_IO0
#define NRFX_QSPI_PIN_IO0 NRF_QSPI_PIN_NOT_CONNECTED
#endif
// <s> NRFX_QSPI_PIN_IO1 - IO1 pin value.
#ifndef NRFX_QSPI_PIN_IO1
#define NRFX_QSPI_PIN_IO1 NRF_QSPI_PIN_NOT_CONNECTED
#endif
// <s> NRFX_QSPI_PIN_IO2 - IO2 pin value.
#ifndef NRFX_QSPI_PIN_IO2
#define NRFX_QSPI_PIN_IO2 NRF_QSPI_PIN_NOT_CONNECTED
#endif
// <s> NRFX_QSPI_PIN_IO3 - IO3 pin value.
#ifndef NRFX_QSPI_PIN_IO3
#define NRFX_QSPI_PIN_IO3 NRF_QSPI_PIN_NOT_CONNECTED
#endif
// <o> NRFX_QSPI_CONFIG_IRQ_PRIORITY - Interrupt priority
// <0=> 0 (highest)
// <1=> 1
// <2=> 2
// <3=> 3
// <4=> 4
// <5=> 5
// <6=> 6
// <7=> 7
#ifndef NRFX_QSPI_CONFIG_IRQ_PRIORITY
#define NRFX_QSPI_CONFIG_IRQ_PRIORITY 7
#endif
// </e>
// <e> NRFX_RNG_ENABLED - nrfx_rng - RNG peripheral driver
//==========================================================
#ifndef NRFX_RNG_ENABLED
#define NRFX_RNG_ENABLED 1
#endif
// <q> NRFX_RNG_CONFIG_ERROR_CORRECTION - Error correction
#ifndef NRFX_RNG_CONFIG_ERROR_CORRECTION
#define NRFX_RNG_CONFIG_ERROR_CORRECTION 1
#endif
// <o> NRFX_RNG_CONFIG_IRQ_PRIORITY - Interrupt priority
// <0=> 0 (highest)
// <1=> 1
// <2=> 2
// <3=> 3
// <4=> 4
// <5=> 5
// <6=> 6
// <7=> 7
#ifndef NRFX_RNG_CONFIG_IRQ_PRIORITY
#define NRFX_RNG_CONFIG_IRQ_PRIORITY 7
#endif
// <e> NRFX_RNG_CONFIG_LOG_ENABLED - Enables logging in the module.
//==========================================================
#ifndef NRFX_RNG_CONFIG_LOG_ENABLED
#define NRFX_RNG_CONFIG_LOG_ENABLED 0
#endif
// <o> NRFX_RNG_CONFIG_LOG_LEVEL - Default Severity level
// <0=> Off
// <1=> Error
// <2=> Warning
// <3=> Info
// <4=> Debug
#ifndef NRFX_RNG_CONFIG_LOG_LEVEL
#define NRFX_RNG_CONFIG_LOG_LEVEL 3
#endif
// <o> NRFX_RNG_CONFIG_INFO_COLOR - ANSI escape code prefix.
// <0=> Default
// <1=> Black
// <2=> Red
// <3=> Green
// <4=> Yellow
// <5=> Blue
// <6=> Magenta
// <7=> Cyan
// <8=> White
#ifndef NRFX_RNG_CONFIG_INFO_COLOR
#define NRFX_RNG_CONFIG_INFO_COLOR 0
#endif
// <o> NRFX_RNG_CONFIG_DEBUG_COLOR - ANSI escape code prefix.
// <0=> Default
// <1=> Black
// <2=> Red
// <3=> Green
// <4=> Yellow
// <5=> Blue
// <6=> Magenta
// <7=> Cyan
// <8=> White
#ifndef NRFX_RNG_CONFIG_DEBUG_COLOR
#define NRFX_RNG_CONFIG_DEBUG_COLOR 0
#endif
// </e>
// </e>
// <e> NRFX_RTC_ENABLED - nrfx_rtc - RTC peripheral driver
//==========================================================
#ifndef NRFX_RTC_ENABLED
#define NRFX_RTC_ENABLED 1
#endif
// <q> NRFX_RTC0_ENABLED - Enable RTC0 instance
#ifndef NRFX_RTC0_ENABLED
#define NRFX_RTC0_ENABLED 1
#endif
// <q> NRFX_RTC1_ENABLED - Enable RTC1 instance
#ifndef NRFX_RTC1_ENABLED
#define NRFX_RTC1_ENABLED 1
#endif
// <q> NRFX_RTC2_ENABLED - Enable RTC2 instance
#ifndef NRFX_RTC2_ENABLED
#define NRFX_RTC2_ENABLED 1
#endif
// <o> NRFX_RTC_MAXIMUM_LATENCY_US - Maximum possible time[us] in highest priority interrupt
#ifndef NRFX_RTC_MAXIMUM_LATENCY_US
#define NRFX_RTC_MAXIMUM_LATENCY_US 2000
#endif
// <o> NRFX_RTC_DEFAULT_CONFIG_FREQUENCY - Frequency <16-32768>
#ifndef NRFX_RTC_DEFAULT_CONFIG_FREQUENCY
#define NRFX_RTC_DEFAULT_CONFIG_FREQUENCY 32768
#endif
// <q> NRFX_RTC_DEFAULT_CONFIG_RELIABLE - Ensures safe compare event triggering
#ifndef NRFX_RTC_DEFAULT_CONFIG_RELIABLE
#define NRFX_RTC_DEFAULT_CONFIG_RELIABLE 0
#endif
// <o> NRFX_RTC_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority
// <0=> 0 (highest)
// <1=> 1
// <2=> 2
// <3=> 3
// <4=> 4
// <5=> 5
// <6=> 6
// <7=> 7
#ifndef NRFX_RTC_DEFAULT_CONFIG_IRQ_PRIORITY
#define NRFX_RTC_DEFAULT_CONFIG_IRQ_PRIORITY 7
#endif
// <e> NRFX_RTC_CONFIG_LOG_ENABLED - Enables logging in the module.
//==========================================================
#ifndef NRFX_RTC_CONFIG_LOG_ENABLED
#define NRFX_RTC_CONFIG_LOG_ENABLED 0
#endif
// <o> NRFX_RTC_CONFIG_LOG_LEVEL - Default Severity level
// <0=> Off
// <1=> Error
// <2=> Warning
// <3=> Info
// <4=> Debug
#ifndef NRFX_RTC_CONFIG_LOG_LEVEL
#define NRFX_RTC_CONFIG_LOG_LEVEL 3
#endif
// <o> NRFX_RTC_CONFIG_INFO_COLOR - ANSI escape code prefix.
// <0=> Default
// <1=> Black
// <2=> Red
// <3=> Green
// <4=> Yellow
// <5=> Blue
// <6=> Magenta
// <7=> Cyan
// <8=> White
#ifndef NRFX_RTC_CONFIG_INFO_COLOR
#define NRFX_RTC_CONFIG_INFO_COLOR 0
#endif
// <o> NRFX_RTC_CONFIG_DEBUG_COLOR - ANSI escape code prefix.
// <0=> Default
// <1=> Black
// <2=> Red
// <3=> Green
// <4=> Yellow
// <5=> Blue
// <6=> Magenta
// <7=> Cyan
// <8=> White
#ifndef NRFX_RTC_CONFIG_DEBUG_COLOR
#define NRFX_RTC_CONFIG_DEBUG_COLOR 0
#endif
// </e>
// </e>
// <e> NRFX_SWI_ENABLED - nrfx_swi - SWI/EGU peripheral allocator
//==========================================================
#ifndef NRFX_SWI_ENABLED
#define NRFX_SWI_ENABLED 1
#endif
// <q> NRFX_EGU_ENABLED - Enable EGU support
#ifndef NRFX_EGU_ENABLED
#define NRFX_EGU_ENABLED 0
#endif
// <q> NRFX_SWI0_DISABLED - Exclude SWI0 from being utilized by the driver
#ifndef NRFX_SWI0_DISABLED
#define NRFX_SWI0_DISABLED 0
#endif
// <q> NRFX_SWI1_DISABLED - Exclude SWI1 from being utilized by the driver
#ifndef NRFX_SWI1_DISABLED
#define NRFX_SWI1_DISABLED 0
#endif
// <q> NRFX_SWI2_DISABLED - Exclude SWI2 from being utilized by the driver
#ifndef NRFX_SWI2_DISABLED
#define NRFX_SWI2_DISABLED 0
#endif
// <q> NRFX_SWI3_DISABLED - Exclude SWI3 from being utilized by the driver
#ifndef NRFX_SWI3_DISABLED
#define NRFX_SWI3_DISABLED 0
#endif
// <q> NRFX_SWI4_DISABLED - Exclude SWI4 from being utilized by the driver
#ifndef NRFX_SWI4_DISABLED
#define NRFX_SWI4_DISABLED 0
#endif
// <q> NRFX_SWI5_DISABLED - Exclude SWI5 from being utilized by the driver
#ifndef NRFX_SWI5_DISABLED
#define NRFX_SWI5_DISABLED 0
#endif
// <e> NRFX_SWI_CONFIG_LOG_ENABLED - Enables logging in the module.
//==========================================================
#ifndef NRFX_SWI_CONFIG_LOG_ENABLED
#define NRFX_SWI_CONFIG_LOG_ENABLED 0
#endif
// <o> NRFX_SWI_CONFIG_LOG_LEVEL - Default Severity level
// <0=> Off
// <1=> Error
// <2=> Warning
// <3=> Info
// <4=> Debug
#ifndef NRFX_SWI_CONFIG_LOG_LEVEL
#define NRFX_SWI_CONFIG_LOG_LEVEL 3
#endif
// <o> NRFX_SWI_CONFIG_INFO_COLOR - ANSI escape code prefix.
// <0=> Default
// <1=> Black
// <2=> Red
// <3=> Green
// <4=> Yellow
// <5=> Blue
// <6=> Magenta
// <7=> Cyan
// <8=> White
#ifndef NRFX_SWI_CONFIG_INFO_COLOR
#define NRFX_SWI_CONFIG_INFO_COLOR 0
#endif
// <o> NRFX_SWI_CONFIG_DEBUG_COLOR - ANSI escape code prefix.
// <0=> Default
// <1=> Black
// <2=> Red
// <3=> Green
// <4=> Yellow
// <5=> Blue
// <6=> Magenta
// <7=> Cyan
// <8=> White
#ifndef NRFX_SWI_CONFIG_DEBUG_COLOR
#define NRFX_SWI_CONFIG_DEBUG_COLOR 0
#endif
// </e>
// </e>
// <q> NRFX_SYSTICK_ENABLED - nrfx_systick - ARM(R) SysTick driver
#ifndef NRFX_SYSTICK_ENABLED
#define NRFX_SYSTICK_ENABLED 1
#endif
// <e> NRFX_TIMER_ENABLED - nrfx_timer - TIMER periperal driver
//==========================================================
#ifndef NRFX_TIMER_ENABLED
#define NRFX_TIMER_ENABLED 1
#endif
// <q> NRFX_TIMER0_ENABLED - Enable TIMER0 instance
#ifndef NRFX_TIMER0_ENABLED
#define NRFX_TIMER0_ENABLED 1
#endif
// <q> NRFX_TIMER1_ENABLED - Enable TIMER1 instance
#ifndef NRFX_TIMER1_ENABLED
#define NRFX_TIMER1_ENABLED 1
#endif
// <q> NRFX_TIMER2_ENABLED - Enable TIMER2 instance
#ifndef NRFX_TIMER2_ENABLED
#define NRFX_TIMER2_ENABLED 1
#endif
// <q> NRFX_TIMER3_ENABLED - Enable TIMER3 instance
#ifndef NRFX_TIMER3_ENABLED
#define NRFX_TIMER3_ENABLED 1
#endif
// <q> NRFX_TIMER4_ENABLED - Enable TIMER4 instance
#ifndef NRFX_TIMER4_ENABLED
#define NRFX_TIMER4_ENABLED 1
#endif
// <o> NRFX_TIMER_DEFAULT_CONFIG_FREQUENCY - Timer frequency if in Timer mode
// <0=> 16 MHz
// <1=> 8 MHz
// <2=> 4 MHz
// <3=> 2 MHz
// <4=> 1 MHz
// <5=> 500 kHz
// <6=> 250 kHz
// <7=> 125 kHz
// <8=> 62.5 kHz
// <9=> 31.25 kHz
#ifndef NRFX_TIMER_DEFAULT_CONFIG_FREQUENCY
#define NRFX_TIMER_DEFAULT_CONFIG_FREQUENCY 0
#endif
// <o> NRFX_TIMER_DEFAULT_CONFIG_MODE - Timer mode or operation
// <0=> Timer
// <1=> Counter
#ifndef NRFX_TIMER_DEFAULT_CONFIG_MODE
#define NRFX_TIMER_DEFAULT_CONFIG_MODE 0
#endif
// <o> NRFX_TIMER_DEFAULT_CONFIG_BIT_WIDTH - Timer counter bit width
// <0=> 16 bit
// <1=> 8 bit
// <2=> 24 bit
// <3=> 32 bit
#ifndef NRFX_TIMER_DEFAULT_CONFIG_BIT_WIDTH
#define NRFX_TIMER_DEFAULT_CONFIG_BIT_WIDTH 0
#endif
// <o> NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority
// <0=> 0 (highest)
// <1=> 1
// <2=> 2
// <3=> 3
// <4=> 4
// <5=> 5
// <6=> 6
// <7=> 7
#ifndef NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY
#define NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY 7
#endif
// <e> NRFX_TIMER_CONFIG_LOG_ENABLED - Enables logging in the module.
//==========================================================
#ifndef NRFX_TIMER_CONFIG_LOG_ENABLED
#define NRFX_TIMER_CONFIG_LOG_ENABLED 0
#endif
// <o> NRFX_TIMER_CONFIG_LOG_LEVEL - Default Severity level
// <0=> Off
// <1=> Error
// <2=> Warning
// <3=> Info
// <4=> Debug
#ifndef NRFX_TIMER_CONFIG_LOG_LEVEL
#define NRFX_TIMER_CONFIG_LOG_LEVEL 3
#endif
// <o> NRFX_TIMER_CONFIG_INFO_COLOR - ANSI escape code prefix.
// <0=> Default
// <1=> Black
// <2=> Red
// <3=> Green
// <4=> Yellow
// <5=> Blue
// <6=> Magenta
// <7=> Cyan
// <8=> White
#ifndef NRFX_TIMER_CONFIG_INFO_COLOR
#define NRFX_TIMER_CONFIG_INFO_COLOR 0
#endif
// <o> NRFX_TIMER_CONFIG_DEBUG_COLOR - ANSI escape code prefix.
// <0=> Default
// <1=> Black
// <2=> Red
// <3=> Green
// <4=> Yellow
// <5=> Blue
// <6=> Magenta
// <7=> Cyan
// <8=> White
#ifndef NRFX_TIMER_CONFIG_DEBUG_COLOR
#define NRFX_TIMER_CONFIG_DEBUG_COLOR 0
#endif
// </e>
// <e> NRFX_UARTE_ENABLED - nrfx_uarte - UARTE peripheral driver
//==========================================================
#ifndef NRFX_UARTE_ENABLED
#define NRFX_UARTE_ENABLED 1
#endif
// <o> NRFX_UARTE0_ENABLED - Enable UARTE0 instance
#ifndef NRFX_UARTE0_ENABLED
#define NRFX_UARTE0_ENABLED 1
#endif
// <o> NRFX_UARTE1_ENABLED - Enable UARTE1 instance
#ifndef NRFX_UARTE1_ENABLED
#define NRFX_UARTE1_ENABLED 1
#endif
// <o> NRFX_UARTE_DEFAULT_CONFIG_HWFC - Hardware Flow Control
// <0=> Disabled
// <1=> Enabled
#ifndef NRFX_UARTE_DEFAULT_CONFIG_HWFC
#define NRFX_UARTE_DEFAULT_CONFIG_HWFC 0
#endif
// <o> NRFX_UARTE_DEFAULT_CONFIG_PARITY - Parity
// <0=> Excluded
// <14=> Included
#ifndef NRFX_UARTE_DEFAULT_CONFIG_PARITY
#define NRFX_UARTE_DEFAULT_CONFIG_PARITY 0
#endif
// <o> NRFX_UARTE_DEFAULT_CONFIG_BAUDRATE - Default Baudrate
// <323584=> 1200 baud
// <643072=> 2400 baud
// <1290240=> 4800 baud
// <2576384=> 9600 baud
// <3862528=> 14400 baud
// <5152768=> 19200 baud
// <7716864=> 28800 baud
// <8388608=> 31250 baud
// <10289152=> 38400 baud
// <15007744=> 56000 baud
// <15400960=> 57600 baud
// <20615168=> 76800 baud
// <30801920=> 115200 baud
// <61865984=> 230400 baud
// <67108864=> 250000 baud
// <121634816=> 460800 baud
// <251658240=> 921600 baud
// <268435456=> 1000000 baud
#ifndef NRFX_UARTE_DEFAULT_CONFIG_BAUDRATE
#define NRFX_UARTE_DEFAULT_CONFIG_BAUDRATE 30801920
#endif
// <o> NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority
// <0=> 0 (highest)
// <1=> 1
// <2=> 2
// <3=> 3
// <4=> 4
// <5=> 5
// <6=> 6
// <7=> 7
#ifndef NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY
#define NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY 7
#endif
// <e> NRFX_UARTE_CONFIG_LOG_ENABLED - Enables logging in the module.
//==========================================================
#ifndef NRFX_UARTE_CONFIG_LOG_ENABLED
#define NRFX_UARTE_CONFIG_LOG_ENABLED 0
#endif
// <o> NRFX_UARTE_CONFIG_LOG_LEVEL - Default Severity level
// <0=> Off
// <1=> Error
// <2=> Warning
// <3=> Info
// <4=> Debug
#ifndef NRFX_UARTE_CONFIG_LOG_LEVEL
#define NRFX_UARTE_CONFIG_LOG_LEVEL 3
#endif
// <o> NRFX_UARTE_CONFIG_INFO_COLOR - ANSI escape code prefix.
// <0=> Default
// <1=> Black
// <2=> Red
// <3=> Green
// <4=> Yellow
// <5=> Blue
// <6=> Magenta
// <7=> Cyan
// <8=> White
#ifndef NRFX_UARTE_CONFIG_INFO_COLOR
#define NRFX_UARTE_CONFIG_INFO_COLOR 0
#endif
// <o> NRFX_UARTE_CONFIG_DEBUG_COLOR - ANSI escape code prefix.
// <0=> Default
// <1=> Black
// <2=> Red
// <3=> Green
// <4=> Yellow
// <5=> Blue
// <6=> Magenta
// <7=> Cyan
// <8=> White
#ifndef NRFX_UARTE_CONFIG_DEBUG_COLOR
#define NRFX_UARTE_CONFIG_DEBUG_COLOR 0
#endif
// </e>
// </e>
// <e> NRFX_UART_ENABLED - nrfx_uart - UART peripheral driver
//==========================================================
#ifndef NRFX_UART_ENABLED
#define NRFX_UART_ENABLED 1
#endif
// <o> NRFX_UART0_ENABLED - Enable UART0 instance
#ifndef NRFX_UART0_ENABLED
#define NRFX_UART0_ENABLED 1
#endif
// <o> NRFX_UART_DEFAULT_CONFIG_HWFC - Hardware Flow Control
// <0=> Disabled
// <1=> Enabled
#ifndef NRFX_UART_DEFAULT_CONFIG_HWFC
#define NRFX_UART_DEFAULT_CONFIG_HWFC 0
#endif
// <o> NRFX_UART_DEFAULT_CONFIG_PARITY - Parity
// <0=> Excluded
// <14=> Included
#ifndef NRFX_UART_DEFAULT_CONFIG_PARITY
#define NRFX_UART_DEFAULT_CONFIG_PARITY 0
#endif
// <o> NRFX_UART_DEFAULT_CONFIG_BAUDRATE - Default Baudrate
// <323584=> 1200 baud
// <643072=> 2400 baud
// <1290240=> 4800 baud
// <2576384=> 9600 baud
// <3866624=> 14400 baud
// <5152768=> 19200 baud
// <7729152=> 28800 baud
// <8388608=> 31250 baud
// <10309632=> 38400 baud
// <15007744=> 56000 baud
// <15462400=> 57600 baud
// <20615168=> 76800 baud
// <30924800=> 115200 baud
// <61845504=> 230400 baud
// <67108864=> 250000 baud
// <123695104=> 460800 baud
// <247386112=> 921600 baud
// <268435456=> 1000000 baud
#ifndef NRFX_UART_DEFAULT_CONFIG_BAUDRATE
#define NRFX_UART_DEFAULT_CONFIG_BAUDRATE 30924800
#endif
// <o> NRFX_UART_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority
// <0=> 0 (highest)
// <1=> 1
// <2=> 2
// <3=> 3
// <4=> 4
// <5=> 5
// <6=> 6
// <7=> 7
#ifndef NRFX_UART_DEFAULT_CONFIG_IRQ_PRIORITY
#define NRFX_UART_DEFAULT_CONFIG_IRQ_PRIORITY 7
#endif
// <e> NRFX_UART_CONFIG_LOG_ENABLED - Enables logging in the module.
//==========================================================
#ifndef NRFX_UART_CONFIG_LOG_ENABLED
#define NRFX_UART_CONFIG_LOG_ENABLED 0
#endif
// <o> NRFX_UART_CONFIG_LOG_LEVEL - Default Severity level
// <0=> Off
// <1=> Error
// <2=> Warning
// <3=> Info
// <4=> Debug
#ifndef NRFX_UART_CONFIG_LOG_LEVEL
#define NRFX_UART_CONFIG_LOG_LEVEL 3
#endif
// <o> NRFX_UART_CONFIG_INFO_COLOR - ANSI escape code prefix.
// <0=> Default
// <1=> Black
// <2=> Red
// <3=> Green
// <4=> Yellow
// <5=> Blue
// <6=> Magenta
// <7=> Cyan
// <8=> White
#ifndef NRFX_UART_CONFIG_INFO_COLOR
#define NRFX_UART_CONFIG_INFO_COLOR 0
#endif
// <o> NRFX_UART_CONFIG_DEBUG_COLOR - ANSI escape code prefix.
// <0=> Default
// <1=> Black
// <2=> Red
// <3=> Green
// <4=> Yellow
// <5=> Blue
// <6=> Magenta
// <7=> Cyan
// <8=> White
#ifndef NRFX_UART_CONFIG_DEBUG_COLOR
#define NRFX_UART_CONFIG_DEBUG_COLOR 0
#endif
// </e>
// </e>
// </e>
// </h>
#define NRFX_UARTE_ENABLED 1
#define NRFX_UARTE0_ENABLED 1
#endif // NRFX_CONFIG_H__

135
hw/mcu/nordic/nrfx_log.h Normal file
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@ -0,0 +1,135 @@
/*
* Copyright (c) 2017 - 2019, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef NRFX_LOG_H__
#define NRFX_LOG_H__
// THIS IS A TEMPLATE FILE.
// It should be copied to a suitable location within the host environment into
// which nrfx is integrated, and the following macros should be provided with
// appropriate implementations.
// And this comment should be removed from the customized file.
#ifdef __cplusplus
extern "C" {
#endif
/**
* @defgroup nrfx_log nrfx_log.h
* @{
* @ingroup nrfx
*
* @brief This file contains macros that should be implemented according to
* the needs of the host environment into which @em nrfx is integrated.
*/
/**
* @brief Macro for logging a message with the severity level ERROR.
*
* @param format printf-style format string, optionally followed by arguments
* to be formatted and inserted in the resulting string.
*/
#define NRFX_LOG_ERROR(format, ...)
/**
* @brief Macro for logging a message with the severity level WARNING.
*
* @param format printf-style format string, optionally followed by arguments
* to be formatted and inserted in the resulting string.
*/
#define NRFX_LOG_WARNING(format, ...)
/**
* @brief Macro for logging a message with the severity level INFO.
*
* @param format printf-style format string, optionally followed by arguments
* to be formatted and inserted in the resulting string.
*/
#define NRFX_LOG_INFO(format, ...)
/**
* @brief Macro for logging a message with the severity level DEBUG.
*
* @param format printf-style format string, optionally followed by arguments
* to be formatted and inserted in the resulting string.
*/
#define NRFX_LOG_DEBUG(format, ...)
/**
* @brief Macro for logging a memory dump with the severity level ERROR.
*
* @param[in] p_memory Pointer to the memory region to be dumped.
* @param[in] length Length of the memory region in bytes.
*/
#define NRFX_LOG_HEXDUMP_ERROR(p_memory, length)
/**
* @brief Macro for logging a memory dump with the severity level WARNING.
*
* @param[in] p_memory Pointer to the memory region to be dumped.
* @param[in] length Length of the memory region in bytes.
*/
#define NRFX_LOG_HEXDUMP_WARNING(p_memory, length)
/**
* @brief Macro for logging a memory dump with the severity level INFO.
*
* @param[in] p_memory Pointer to the memory region to be dumped.
* @param[in] length Length of the memory region in bytes.
*/
#define NRFX_LOG_HEXDUMP_INFO(p_memory, length)
/**
* @brief Macro for logging a memory dump with the severity level DEBUG.
*
* @param[in] p_memory Pointer to the memory region to be dumped.
* @param[in] length Length of the memory region in bytes.
*/
#define NRFX_LOG_HEXDUMP_DEBUG(p_memory, length)
/**
* @brief Macro for getting the textual representation of a given error code.
*
* @param[in] error_code Error code.
*
* @return String containing the textual representation of the error code.
*/
#define NRFX_LOG_ERROR_STRING_GET(error_code)
/** @} */
#ifdef __cplusplus
}
#endif
#endif // NRFX_LOG_H__

@ -1 +1 @@
Subproject commit 7d2ca4123ec4fe04c6ea0aa2662d7a6aebc0c4f7
Subproject commit fa206508e9ea289ceeb9c35442dd8002002f9316

@ -0,0 +1 @@
Subproject commit b473b28a14a03f3d416b6e2c071bcfd4fb92cb63

1
hw/mcu/ti Submodule

@ -0,0 +1 @@
Subproject commit ed52d354c99e25a5e9db2376eb5e7058c81c3ebd

View File

@ -35,7 +35,7 @@
extern "C" {
#endif
//--------------------------------------------------------------------+
//--------------------------------------------------------------------+
// Macros Helper
//--------------------------------------------------------------------+
#define TU_ARRAY_SIZE(_arr) ( sizeof(_arr) / sizeof(_arr[0]) )
@ -58,7 +58,7 @@
#define TU_BIT(n) (1U << (n))
//--------------------------------------------------------------------+
// INCLUDES
// Includes
//--------------------------------------------------------------------+
// Standard Headers
@ -77,7 +77,7 @@
#include "tusb_types.h"
//--------------------------------------------------------------------+
// INLINE FUNCTION
// Inline Functions
//--------------------------------------------------------------------+
#define tu_memclr(buffer, size) memset((buffer), 0, (size))
#define tu_varclr(_var) tu_memclr(_var, sizeof(*(_var)))
@ -203,6 +203,44 @@ static inline bool tu_bit_test (uint32_t value, uint8_t n) { return (value &
+ TU_BIN8(dlsb))
#endif
//--------------------------------------------------------------------+
// Debug Function
//--------------------------------------------------------------------+
// CFG_TUSB_DEBUG for debugging
// 0 : no debug
// 1 : print when there is error
// 2 : print out log
#if CFG_TUSB_DEBUG
void tu_print_mem(void const *buf, uint8_t size, uint16_t count);
#ifndef tu_printf
#define tu_printf printf
#endif
// Log with debug level 1
#define TU_LOG1 tu_printf
#define TU_LOG1_MEM tu_print_mem
// Log with debug level 2
#if CFG_TUSB_DEBUG > 1
#define TU_LOG2 TU_LOG1
#define TU_LOG2_MEM TU_LOG1_MEM
#endif
#endif // CFG_TUSB_DEBUG
#ifndef TU_LOG1
#define TU_LOG1(...)
#define TU_LOG1_MEM(...)
#endif
#ifndef TU_LOG2
#define TU_LOG2(...)
#define TU_LOG2_MEM(...)
#endif
#ifdef __cplusplus
}
#endif

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@ -67,6 +67,7 @@
#define TU_ATTR_WEAK __attribute__ ((weak))
#define TU_ATTR_DEPRECATED(mess) __attribute__ ((deprecated(mess))) // warn if function with this attribute is used
#define TU_ATTR_UNUSED __attribute__ ((unused)) // Function/Variable is meant to be possibly unused
#define TU_ATTR_USED __attribute__ ((used)) // Function/Variable is meant to be used
// Endian conversion use well-known host to network (big endian) naming
#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
@ -75,8 +76,8 @@
#define TU_BYTE_ORDER TU_BIG_ENDIAN
#endif
#define TU_BSWAP16(u16) (__builtin_bswap16(u16))
#define TU_BSWAP32(u32) (__builtin_bswap32(u32))
#define TU_BSWAP16(u16) (__builtin_bswap16(u16))
#define TU_BSWAP32(u32) (__builtin_bswap32(u32))
#elif defined(__TI_COMPILER_VERSION__)
#define TU_ATTR_ALIGNED(Bytes) __attribute__ ((aligned(Bytes)))
@ -86,6 +87,7 @@
#define TU_ATTR_WEAK __attribute__ ((weak))
#define TU_ATTR_DEPRECATED(mess) __attribute__ ((deprecated(mess))) // warn if function with this attribute is used
#define TU_ATTR_UNUSED __attribute__ ((unused)) // Function/Variable is meant to be possibly unused
#define TU_ATTR_USED __attribute__ ((used))
// __BYTE_ORDER is defined in the TI ARM compiler, but not MSP430 (which is little endian)
#if ((__BYTE_ORDER__) == (__ORDER_LITTLE_ENDIAN__)) || defined(__MSP430__)
@ -123,7 +125,6 @@
#define tu_htonl(u32) (u32)
#define tu_ntohl(u32) (u32)
#define tu_htole16(u16) (tu_bswap16(u16))
#define tu_le16toh(u16) (tu_bswap16(u16))

View File

@ -107,20 +107,6 @@
if ( !(_cond) ) { _handler; return _ret; } \
} while(0)
/*------------- Generator for TU_VERIFY_ERR and TU_VERIFY_ERR_HDLR -------------*/
#define TU_VERIFY_ERR_DEF2(_error, _handler) do \
{ \
uint32_t _err = (uint32_t)(_error); \
if ( 0 != _err ) { _MESS_ERR(_err); _handler; return _err; } \
} while(0)
#define TU_VERIFY_ERR_DEF3(_error, _handler, _ret) do \
{ \
uint32_t _err = (uint32_t)(_error); \
if ( 0 != _err ) { _MESS_ERR(_err); _handler; return _ret; } \
} while(0)
/*------------------------------------------------------------------*/
/* TU_VERIFY
* - TU_VERIFY_1ARGS : return false if failed
@ -142,28 +128,6 @@
#define TU_VERIFY_HDLR(...) GET_4TH_ARG(__VA_ARGS__, TU_VERIFY_HDLR_3ARGS, TU_VERIFY_HDLR_2ARGS,UNUSED)(__VA_ARGS__)
/*------------------------------------------------------------------*/
/* TU_VERIFY STATUS
* - TU_VERIFY_ERR_1ARGS : return status of condition if failed
* - TU_VERIFY_ERR_2ARGS : return provided status code if failed
*------------------------------------------------------------------*/
#define TU_VERIFY_ERR_1ARGS(_error) TU_VERIFY_ERR_DEF2(_error, )
#define TU_VERIFY_ERR_2ARGS(_error, _ret) TU_VERIFY_ERR_DEF3(_error, ,_ret)
#define TU_VERIFY_ERR(...) GET_3RD_ARG(__VA_ARGS__, TU_VERIFY_ERR_2ARGS, TU_VERIFY_ERR_1ARGS,UNUSED)(__VA_ARGS__)
/*------------------------------------------------------------------*/
/* TU_VERIFY STATUS WITH HANDLER
* - TU_VERIFY_ERR_HDLR_2ARGS : execute handler, return status if failed
* - TU_VERIFY_ERR_HDLR_3ARGS : execute handler, return provided error if failed
*------------------------------------------------------------------*/
#define TU_VERIFY_ERR_HDLR_2ARGS(_error, _handler) TU_VERIFY_ERR_DEF2(_error, _handler)
#define TU_VERIFY_ERR_HDLR_3ARGS(_error, _handler, _ret) TU_VERIFY_ERR_DEF3(_error, _handler, _ret)
#define TU_VERIFY_ERR_HDLR(...) GET_4TH_ARG(__VA_ARGS__, TU_VERIFY_ERR_HDLR_3ARGS, TU_VERIFY_ERR_HDLR_2ARGS,UNUSED)(__VA_ARGS__)
/*------------------------------------------------------------------*/
/* ASSERT
* basically TU_VERIFY with TU_BREAKPOINT() as handler
@ -175,6 +139,21 @@
#define TU_ASSERT(...) GET_3RD_ARG(__VA_ARGS__, ASSERT_2ARGS, ASSERT_1ARGS,UNUSED)(__VA_ARGS__)
// TODO remove TU_ASSERT_ERR() later
/*------------- Generator for TU_VERIFY_ERR and TU_VERIFY_ERR_HDLR -------------*/
#define TU_VERIFY_ERR_DEF2(_error, _handler) do \
{ \
uint32_t _err = (uint32_t)(_error); \
if ( 0 != _err ) { _MESS_ERR(_err); _handler; return _err; } \
} while(0)
#define TU_VERIFY_ERR_DEF3(_error, _handler, _ret) do \
{ \
uint32_t _err = (uint32_t)(_error); \
if ( 0 != _err ) { _MESS_ERR(_err); _handler; return _ret; } \
} while(0)
/*------------------------------------------------------------------*/
/* ASSERT Error
* basically TU_VERIFY Error with TU_BREAKPOINT() as handler

View File

@ -39,17 +39,20 @@
typedef enum
{
DCD_EVENT_BUS_RESET = 1,
DCD_EVENT_INVALID = 0,
DCD_EVENT_BUS_RESET,
DCD_EVENT_UNPLUGGED,
DCD_EVENT_SOF,
DCD_EVENT_SUSPEND,
DCD_EVENT_SUSPEND, // TODO LPM Sleep L1 support
DCD_EVENT_RESUME,
DCD_EVENT_SETUP_RECEIVED,
DCD_EVENT_XFER_COMPLETE,
// Not an DCD event, just a convenient way to defer ISR function
USBD_EVENT_FUNC_CALL
USBD_EVENT_FUNC_CALL,
DCD_EVENT_COUNT
} dcd_eventid_t;
typedef struct TU_ATTR_ALIGNED(4)

View File

@ -192,6 +192,66 @@ void usbd_control_reset (uint8_t rhport);
bool usbd_control_xfer_cb (uint8_t rhport, uint8_t ep_addr, xfer_result_t event, uint32_t xferred_bytes);
void usbd_control_set_complete_callback( bool (*fp) (uint8_t, tusb_control_request_t const * ) );
//--------------------------------------------------------------------+
// Debugging
//--------------------------------------------------------------------+
#if CFG_TUSB_DEBUG > 1
static char const* const _usbd_event_str[DCD_EVENT_COUNT] =
{
"INVALID" ,
"BUS_RESET" ,
"UNPLUGGED" ,
"SOF" ,
"SUSPEND" ,
"RESUME" ,
"SETUP_RECEIVED" ,
"XFER_COMPLETE" ,
"FUNC_CALL"
};
// must be same driver order as usbd_class_drivers[]
static char const* const _usbd_driver_str[USBD_CLASS_DRIVER_COUNT] =
{
#if CFG_TUD_CDC
"CDC",
#endif
#if CFG_TUD_MSC
"MSC",
#endif
#if CFG_TUD_HID
"HID",
#endif
#if CFG_TUD_MIDI
"MIDI",
#endif
#if CFG_TUD_VENDOR
"Vendor",
#endif
#if CFG_TUD_USBTMC
"USBTMC"
#endif
};
static char const* const _tusb_std_request_str[] =
{
"Get Status" ,
"Clear Feature" ,
"Reserved" ,
"Set Feature" ,
"Reserved" ,
"Set Address" ,
"Get Descriptor" ,
"Set Descriptor" ,
"Get Configuration" ,
"Set Configuration" ,
"Get Interface" ,
"Set Interface" ,
"Synch Frame"
};
#endif
//--------------------------------------------------------------------+
// Application API
//--------------------------------------------------------------------+
@ -218,6 +278,8 @@ bool tud_remote_wakeup(void)
//--------------------------------------------------------------------+
bool usbd_init (void)
{
TU_LOG2("USBD init\r\n");
tu_varclr(&_usbd_dev);
// Init device queue & task
@ -225,7 +287,11 @@ bool usbd_init (void)
TU_ASSERT(_usbd_q != NULL);
// Init class drivers
for (uint8_t i = 0; i < USBD_CLASS_DRIVER_COUNT; i++) usbd_class_drivers[i].init();
for (uint8_t i = 0; i < USBD_CLASS_DRIVER_COUNT; i++)
{
TU_LOG2("%s init\r\n", _usbd_driver_str[i]);
usbd_class_drivers[i].init();
}
// Init device controller driver
dcd_init(TUD_OPT_RHPORT);
@ -279,6 +345,8 @@ void tud_task (void)
if ( !osal_queue_receive(_usbd_q, &event) ) return;
TU_LOG2("USBD: event %s\r\n", event.event_id < DCD_EVENT_COUNT ? _usbd_event_str[event.event_id] : "CORRUPTED");
switch ( event.event_id )
{
case DCD_EVENT_BUS_RESET:
@ -293,6 +361,9 @@ void tud_task (void)
break;
case DCD_EVENT_SETUP_RECEIVED:
TU_LOG2(" ");
TU_LOG2_MEM(&event.setup_received, 1, 8);
// Mark as connected after receiving 1st setup packet.
// But it is easier to set it every time instead of wasting time to check then set
_usbd_dev.connected = 1;
@ -307,29 +378,30 @@ void tud_task (void)
break;
case DCD_EVENT_XFER_COMPLETE:
// Only handle xfer callback in ready state
// if (_usbd_dev.connected && !_usbd_dev.suspended)
{
// Invoke the class callback associated with the endpoint address
uint8_t const ep_addr = event.xfer_complete.ep_addr;
uint8_t const epnum = tu_edpt_number(ep_addr);
uint8_t const ep_dir = tu_edpt_dir(ep_addr);
TU_LOG2(" Endpoint: 0x%02X, Bytes: %ld\r\n", ep_addr, event.xfer_complete.len);
_usbd_dev.ep_status[epnum][ep_dir].busy = false;
if ( 0 == epnum )
{
// Invoke the class callback associated with the endpoint address
uint8_t const ep_addr = event.xfer_complete.ep_addr;
uint8_t const epnum = tu_edpt_number(ep_addr);
uint8_t const ep_dir = tu_edpt_dir(ep_addr);
_usbd_dev.ep_status[epnum][ep_dir].busy = false;
if ( 0 == epnum )
{
// control transfer DATA stage callback
usbd_control_xfer_cb(event.rhport, ep_addr, event.xfer_complete.result, event.xfer_complete.len);
}
else
{
uint8_t const drv_id = _usbd_dev.ep2drv[epnum][ep_dir];
TU_ASSERT(drv_id < USBD_CLASS_DRIVER_COUNT,);
usbd_class_drivers[drv_id].xfer_cb(event.rhport, ep_addr, event.xfer_complete.result, event.xfer_complete.len);
}
// control transfer DATA stage callback
usbd_control_xfer_cb(event.rhport, ep_addr, event.xfer_complete.result, event.xfer_complete.len);
}
else
{
uint8_t const drv_id = _usbd_dev.ep2drv[epnum][ep_dir];
TU_ASSERT(drv_id < USBD_CLASS_DRIVER_COUNT,);
TU_LOG2(" %s xfer callback\r\n", _usbd_driver_str[drv_id]);
usbd_class_drivers[drv_id].xfer_cb(event.rhport, ep_addr, event.xfer_complete.result, event.xfer_complete.len);
}
}
break;
case DCD_EVENT_SUSPEND:
@ -382,6 +454,13 @@ static bool process_control_request(uint8_t rhport, tusb_control_request_t const
return tud_vendor_control_request_cb(rhport, p_request);
}
#if CFG_TUSB_DEBUG > 1
if (TUSB_REQ_TYPE_STANDARD == p_request->bmRequestType_bit.type && p_request->bRequest <= TUSB_REQ_SYNCH_FRAME)
{
TU_LOG2(" %s\r\n", _tusb_std_request_str[p_request->bRequest]);
}
#endif
switch ( p_request->bmRequestType_bit.recipient )
{
//------------- Device Requests e.g in enumeration -------------//
@ -494,6 +573,7 @@ static bool process_control_request(uint8_t rhport, tusb_control_request_t const
// GET HID REPORT DESCRIPTOR falls into this case
// stall control endpoint if driver return false
usbd_control_set_complete_callback(usbd_class_drivers[drvid].control_complete);
TU_LOG2(" %s control request\r\n", _usbd_driver_str[drvid]);
TU_ASSERT(usbd_class_drivers[drvid].control_request != NULL &&
usbd_class_drivers[drvid].control_request(rhport, p_request));
break;
@ -503,6 +583,7 @@ static bool process_control_request(uint8_t rhport, tusb_control_request_t const
// forward to class driver: "non-STD request to Interface"
// stall control endpoint if driver return false
usbd_control_set_complete_callback(usbd_class_drivers[drvid].control_complete);
TU_LOG2(" %s control request\r\n", _usbd_driver_str[drvid]);
TU_ASSERT(usbd_class_drivers[drvid].control_request != NULL &&
usbd_class_drivers[drvid].control_request(rhport, p_request));
}
@ -570,7 +651,7 @@ static bool process_control_request(uint8_t rhport, tusb_control_request_t const
// For std-type requests: non-std request codes are already discarded.
// must not call tud_control_status(), and return value will have no effect
// class driver is invoked last, so that EP already has EP stall cleared (in event of clear feature EP halt)
TU_LOG2(" %s control request\r\n", _usbd_driver_str[drv_id]);
if ( usbd_class_drivers[drv_id].control_request &&
usbd_class_drivers[drv_id].control_request(rhport, p_request))
{
@ -627,6 +708,7 @@ static bool process_set_config(uint8_t rhport, uint8_t cfg_num)
_usbd_dev.itf2drv[desc_itf->bInterfaceNumber] = drv_id;
uint16_t itf_len=0;
TU_LOG2(" %s open\r\n", _usbd_driver_str[drv_id]);
TU_ASSERT( usbd_class_drivers[drv_id].open(rhport, desc_itf, &itf_len) );
TU_ASSERT( itf_len >= sizeof(tusb_desc_interface_t) );

View File

@ -86,9 +86,6 @@ static inline bool osal_queue_send(osal_queue_t const qhdl, void const * data, b
#define STASK_RETURN(_error) return _error;
#define STASK_INVOKE(_subtask, _status) (_status) = _subtask
// Sub Task Assert
#define STASK_ASSERT_ERR(_err) TU_VERIFY_ERR(_err)
#define STASK_ASSERT(_cond) TU_VERIFY(_cond, TUSB_ERROR_OSAL_TASK_FAILED)
#endif

View File

@ -28,9 +28,11 @@
/* Since 2012 starting with LPC11uxx, NXP start to use common USB Device Controller with code name LPC IP3511
* for almost their new MCUs. Currently supported and tested families are
* - LPC11Uxx
* - LPC13xx
* - LPC51Uxx
* - LPC11U68, LPC11U37
* - LPC1347
* - LPC51U68
* - LPC54114
* - LPC55s69
*
* For similar controller of other families, this file may require some minimal changes to work with.
* Previous MCUs such as LPC17xx, LPC40xx, LPC18xx, LPC43xx have their own driver implementation.
@ -38,20 +40,23 @@
#if TUSB_OPT_DEVICE_ENABLED && ( CFG_TUSB_MCU == OPT_MCU_LPC11UXX || \
CFG_TUSB_MCU == OPT_MCU_LPC13XX || \
CFG_TUSB_MCU == OPT_MCU_LPC15XX || \
CFG_TUSB_MCU == OPT_MCU_LPC51UXX || \
CFG_TUSB_MCU == OPT_MCU_LPC54XXX || \
CFG_TUSB_MCU == OPT_MCU_LPC55XX)
#if CFG_TUSB_MCU == OPT_MCU_LPC11UXX || CFG_TUSB_MCU == OPT_MCU_LPC13XX
// LPC11Uxx and LPC13xx use lpcopen
#if CFG_TUSB_MCU == OPT_MCU_LPC11UXX || CFG_TUSB_MCU == OPT_MCU_LPC13XX || CFG_TUSB_MCU == OPT_MCU_LPC15XX
// LPC 11Uxx, 13xx, 15xx use lpcopen
#include "chip.h"
#define DCD_REGS LPC_USB
#define DCD_IRQHandler USB_IRQHandler
#elif CFG_TUSB_MCU == OPT_MCU_LPC51UXX || CFG_TUSB_MCU == OPT_MCU_LPC54XXX || \
CFG_TUSB_MCU == OPT_MCU_LPC55XX // TODO 55xx has dual usb controllers
#include "fsl_device_registers.h"
#define DCD_REGS USB0
#define DCD_IRQHandler USB0_IRQHandler
#endif
#include "device/dcd.h"
@ -61,6 +66,9 @@
//--------------------------------------------------------------------+
// Number of endpoints
// - 11 13 15 51 54 has 5x2 endpoints
// - 18/43 usb0 & 55s usb1 (HS) has 6x2 endpoints
// - 18/43 usb1 & 55s usb0 (FS) has 4x2 endpoints
#define EP_COUNT 10
// only SRAM1 & USB RAM can be used for transfer.
@ -166,7 +174,7 @@ void dcd_init(uint8_t rhport)
DCD_REGS->INTSTAT = DCD_REGS->INTSTAT; // clear all pending interrupt
DCD_REGS->INTEN = INT_DEVICE_STATUS_MASK;
DCD_REGS->DEVCMDSTAT |= CMDSTAT_DEVICE_ENABLE_MASK | CMDSTAT_DEVICE_CONNECT_MASK |
CMDSTAT_RESET_CHANGE_MASK | CMDSTAT_CONNECT_CHANGE_MASK | CMDSTAT_SUSPEND_CHANGE_MASK;
CMDSTAT_RESET_CHANGE_MASK | CMDSTAT_CONNECT_CHANGE_MASK | CMDSTAT_SUSPEND_CHANGE_MASK;
NVIC_ClearPendingIRQ(USB0_IRQn);
}
@ -270,7 +278,7 @@ bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t* buffer, uint16_t to
prepare_ep_xfer(ep_id, get_buf_offset(buffer), total_bytes);
return true;
return true;
}
//--------------------------------------------------------------------+
@ -329,7 +337,7 @@ static void process_xfer_isr(uint32_t int_status)
void DCD_IRQHandler(void)
{
uint32_t const dev_cmd_stat = DCD_REGS->DEVCMDSTAT;
uint32_t const cmd_stat = DCD_REGS->DEVCMDSTAT;
uint32_t int_status = DCD_REGS->INTSTAT & DCD_REGS->INTEN;
DCD_REGS->INTSTAT = int_status; // Acknowledge handled interrupt
@ -340,16 +348,16 @@ void DCD_IRQHandler(void)
if ( int_status & INT_DEVICE_STATUS_MASK )
{
DCD_REGS->DEVCMDSTAT |= CMDSTAT_RESET_CHANGE_MASK | CMDSTAT_CONNECT_CHANGE_MASK | CMDSTAT_SUSPEND_CHANGE_MASK;
if ( dev_cmd_stat & CMDSTAT_RESET_CHANGE_MASK) // bus reset
if ( cmd_stat & CMDSTAT_RESET_CHANGE_MASK) // bus reset
{
bus_reset();
dcd_event_bus_signal(0, DCD_EVENT_BUS_RESET, true);
}
if (dev_cmd_stat & CMDSTAT_CONNECT_CHANGE_MASK)
if (cmd_stat & CMDSTAT_CONNECT_CHANGE_MASK)
{
// device disconnect
if (dev_cmd_stat & CMDSTAT_DEVICE_ADDR_MASK)
if (cmd_stat & CMDSTAT_DEVICE_ADDR_MASK)
{
// debouncing as this can be set when device is powering
dcd_event_bus_signal(0, DCD_EVENT_UNPLUGGED, true);
@ -357,12 +365,12 @@ void DCD_IRQHandler(void)
}
// TODO support suspend & resume
if (dev_cmd_stat & CMDSTAT_SUSPEND_CHANGE_MASK)
if (cmd_stat & CMDSTAT_SUSPEND_CHANGE_MASK)
{
if (dev_cmd_stat & CMDSTAT_DEVICE_SUSPEND_MASK)
if (cmd_stat & CMDSTAT_DEVICE_SUSPEND_MASK)
{ // suspend signal, bus idle for more than 3ms
// Note: Host may delay more than 3 ms before and/or after bus reset before doing enumeration.
if (dev_cmd_stat & CMDSTAT_DEVICE_ADDR_MASK)
if (cmd_stat & CMDSTAT_DEVICE_ADDR_MASK)
{
dcd_event_bus_signal(0, DCD_EVENT_SUSPEND, true);
}
@ -376,7 +384,7 @@ void DCD_IRQHandler(void)
}
// Setup Receive
if ( tu_bit_test(int_status, 0) && (dev_cmd_stat & CMDSTAT_SETUP_RECEIVED_MASK) )
if ( tu_bit_test(int_status, 0) && (cmd_stat & CMDSTAT_SETUP_RECEIVED_MASK) )
{
// Follow UM flowchart to clear Active & Stall on both Control IN/OUT endpoints
_dcd.ep[0][0].active = _dcd.ep[1][0].active = 0;

View File

@ -0,0 +1,330 @@
/*
* The MIT License (MIT)
*
* Copyright 2019 Sony Semiconductor Solutions Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*
* This file is part of the TinyUSB stack.
*/
#include "tusb_option.h"
#if TUSB_OPT_DEVICE_ENABLED && CFG_TUSB_MCU == OPT_MCU_CXD56
#include <errno.h>
#include <nuttx/usb/usbdev.h>
#include <nuttx/arch.h>
#include "device/dcd.h"
#define CXD56_EPNUM (7)
struct usbdcd_driver_s
{
struct usbdevclass_driver_s usbdevclass_driver;
FAR struct usbdev_ep_s *ep[CXD56_EPNUM];
FAR struct usbdev_req_s *req[CXD56_EPNUM];
};
static struct usbdcd_driver_s usbdcd_driver;
static struct usbdev_s *usbdev;
static int dcd_bind(FAR struct usbdevclass_driver_s *driver, FAR struct usbdev_s *dev);
static void dcd_unbind(FAR struct usbdevclass_driver_s *driver, FAR struct usbdev_s *dev);
static int dcd_setup(FAR struct usbdevclass_driver_s *driver, FAR struct usbdev_s *dev,
FAR const struct usb_ctrlreq_s *ctrl, FAR uint8_t *dataout, size_t outlen);
static void dcd_disconnect(FAR struct usbdevclass_driver_s *driver, FAR struct usbdev_s *dev);
static void dcd_suspend(FAR struct usbdevclass_driver_s *driver, FAR struct usbdev_s *dev);
static void dcd_resume(FAR struct usbdevclass_driver_s *driver, FAR struct usbdev_s *dev);
static const struct usbdevclass_driverops_s g_driverops =
{
dcd_bind, /* bind */
dcd_unbind, /* unbind */
dcd_setup, /* setup */
dcd_disconnect, /* disconnect */
dcd_suspend, /* suspend */
dcd_resume, /* resume */
};
static void usbdcd_ep0incomplete(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *req)
{
(void) ep;
uint8_t ep_addr = (uint32_t)req->priv;
if (req->result || req->xfrd != req->len)
{
if (req->len)
{
dcd_event_xfer_complete(0, ep_addr, req->xfrd, XFER_RESULT_SUCCESS, true);
}
}
else
{
if (req->xfrd)
{
dcd_event_xfer_complete(0, ep_addr, req->xfrd, XFER_RESULT_SUCCESS, true);
}
}
}
static int dcd_bind(FAR struct usbdevclass_driver_s *driver, FAR struct usbdev_s *dev)
{
(void) driver;
usbdev = dev;
usbdcd_driver.ep[0] = dev->ep0;
usbdcd_driver.req[0] = EP_ALLOCREQ(usbdcd_driver.ep[0]);
if (usbdcd_driver.req[0] != NULL)
{
usbdcd_driver.req[0]->len = 64;
usbdcd_driver.req[0]->buf = EP_ALLOCBUFFER(usbdcd_driver.ep[0], 64);
if (!usbdcd_driver.req[0]->buf)
{
EP_FREEREQ(usbdcd_driver.ep[0], usbdcd_driver.req[0]);
usbdcd_driver.req[0] = NULL;
}
}
usbdcd_driver.req[0]->callback = usbdcd_ep0incomplete;
DEV_CONNECT(dev);
return 0;
}
static void dcd_unbind(FAR struct usbdevclass_driver_s *driver, FAR struct usbdev_s *dev)
{
(void) driver;
(void) dev;
}
static int dcd_setup(FAR struct usbdevclass_driver_s *driver, FAR struct usbdev_s *dev,
FAR const struct usb_ctrlreq_s *ctrl, FAR uint8_t *dataout, size_t outlen)
{
(void) driver;
(void) dev;
(void) dataout;
(void) outlen;
dcd_event_setup_received(0, (uint8_t *)ctrl, true);
return 0;
}
static void dcd_disconnect(FAR struct usbdevclass_driver_s *driver, FAR struct usbdev_s *dev)
{
(void) driver;
dcd_event_bus_signal(0, DCD_EVENT_BUS_RESET, true);
DEV_CONNECT(dev);
}
static void dcd_suspend(FAR struct usbdevclass_driver_s *driver, FAR struct usbdev_s *dev)
{
(void) driver;
(void) dev;
dcd_event_bus_signal(0, DCD_EVENT_SUSPEND, true);
}
static void dcd_resume(FAR struct usbdevclass_driver_s *driver, FAR struct usbdev_s *dev)
{
(void) driver;
(void) dev;
dcd_event_bus_signal(0, DCD_EVENT_RESUME, true);
}
void dcd_init(uint8_t rhport)
{
(void) rhport;
usbdcd_driver.usbdevclass_driver.speed = USB_SPEED_HIGH;
usbdcd_driver.usbdevclass_driver.ops = &g_driverops;
usbdev_register(&usbdcd_driver.usbdevclass_driver);
}
// Enable device interrupt
void dcd_int_enable(uint8_t rhport)
{
(void) rhport;
up_enable_irq(CXD56_IRQ_USB_INT);
}
// Disable device interrupt
void dcd_int_disable(uint8_t rhport)
{
(void) rhport;
up_disable_irq(CXD56_IRQ_USB_INT);
}
// Receive Set Address request, mcu port must also include status IN response
void dcd_set_address(uint8_t rhport, uint8_t dev_addr)
{
(void) rhport;
(void) dev_addr;
}
// Receive Set Config request
void dcd_set_config(uint8_t rhport, uint8_t config_num)
{
(void) rhport;
(void) config_num;
}
void dcd_remote_wakeup(uint8_t rhport)
{
(void) rhport;
DEV_WAKEUP(usbdev);
}
//--------------------------------------------------------------------+
// Endpoint API
//--------------------------------------------------------------------+
bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const *p_endpoint_desc)
{
(void) rhport;
uint8_t epnum = tu_edpt_number(p_endpoint_desc->bEndpointAddress);
uint8_t const dir = tu_edpt_dir(p_endpoint_desc->bEndpointAddress);
uint8_t xfrtype = 0;
struct usb_epdesc_s epdesc;
if (epnum >= CXD56_EPNUM)
{
return false;
}
switch (p_endpoint_desc->bmAttributes.xfer)
{
case 1:
xfrtype = USB_EP_ATTR_XFER_ISOC;
break;
case 2:
xfrtype = USB_EP_ATTR_XFER_BULK;
break;
case 3:
xfrtype = USB_EP_ATTR_XFER_INT;
break;
}
usbdcd_driver.ep[epnum] = DEV_ALLOCEP(usbdev, epnum, dir == TUSB_DIR_IN, xfrtype);
if (usbdcd_driver.ep[epnum] == NULL)
{
return false;
}
usbdcd_driver.req[epnum] = NULL;
usbdcd_driver.req[epnum] = EP_ALLOCREQ(usbdcd_driver.ep[epnum]);
if (usbdcd_driver.req[epnum] != NULL)
{
usbdcd_driver.req[epnum]->len = p_endpoint_desc->wMaxPacketSize.size;
}
else
{
return false;
}
usbdcd_driver.req[epnum]->callback = usbdcd_ep0incomplete;
epdesc.len = p_endpoint_desc->bLength;
epdesc.type = p_endpoint_desc->bDescriptorType;
epdesc.addr = p_endpoint_desc->bEndpointAddress;
epdesc.attr = xfrtype;
epdesc.mxpacketsize[0] = LSBYTE(p_endpoint_desc->wMaxPacketSize.size);
epdesc.mxpacketsize[1] = MSBYTE(p_endpoint_desc->wMaxPacketSize.size);
epdesc.interval = p_endpoint_desc->bInterval;
if (EP_CONFIGURE(usbdcd_driver.ep[epnum], &epdesc, false) < 0)
{
return false;
}
return true;
}
bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, uint16_t total_bytes)
{
(void) rhport;
uint8_t epnum = tu_edpt_number(ep_addr);
if (epnum >= CXD56_EPNUM)
{
return false;
}
usbdcd_driver.req[epnum]->len = total_bytes;
usbdcd_driver.req[epnum]->priv = (void *)((uint32_t)ep_addr);
usbdcd_driver.req[epnum]->flags = 0;
if (total_bytes)
{
usbdcd_driver.req[epnum]->buf = buffer;
}
else
{
return true;
}
if (EP_SUBMIT(usbdcd_driver.ep[epnum], usbdcd_driver.req[epnum]) < 0)
{
return false;
}
return true;
}
void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr)
{
(void) rhport;
uint8_t epnum = tu_edpt_number(ep_addr);
if (epnum >= CXD56_EPNUM)
{
return;
}
EP_STALL(usbdcd_driver.ep[epnum]);
}
void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr)
{
(void) rhport;
uint8_t epnum = tu_edpt_number(ep_addr);
if (epnum >= CXD56_EPNUM)
{
return;
}
EP_RESUME(usbdcd_driver.ep[epnum]);
}
#endif

View File

@ -43,11 +43,11 @@ bool tusb_init(void)
if (_initialized) return true;
#if TUSB_OPT_HOST_ENABLED
TU_VERIFY( usbh_init() ); // init host stack
TU_ASSERT( usbh_init() ); // init host stack
#endif
#if TUSB_OPT_DEVICE_ENABLED
TU_VERIFY ( usbd_init() ); // init device stack
TU_ASSERT ( usbd_init() ); // init device stack
#endif
_initialized = true;
@ -64,7 +64,81 @@ bool tusb_inited(void)
/* Debug
*------------------------------------------------------------------*/
#if CFG_TUSB_DEBUG
#include <ctype.h>
char const* const tusb_strerr[TUSB_ERROR_COUNT] = { ERROR_TABLE(ERROR_STRING) };
static void dump_str_line(uint8_t const* buf, uint16_t count)
{
// each line is 16 bytes
for(int i=0; i<count; i++)
{
const char ch = buf[i];
tu_printf("%c", isprint(ch) ? ch : '.');
}
}
// size : item size in bytes
// count : number of item
// print offet or not (handfy for dumping large memory)
void tu_print_mem(void const *buf, uint8_t size, uint16_t count)
{
if ( !buf || !count )
{
tu_printf("NULL\r\n");
return;
}
uint8_t const *buf8 = (uint8_t const *) buf;
char format[] = "%00lX";
format[2] += 2*size;
const uint8_t item_per_line = 16 / size;
for(uint32_t i=0; i<count; i++)
{
uint32_t value=0;
if ( i%item_per_line == 0 )
{
// Print Ascii
if ( i != 0 )
{
tu_printf(" | ");
dump_str_line(buf8-16, 16);
tu_printf("\r\n");
}
// print offset or absolute address
tu_printf("%03lX: ", 16*i/item_per_line);
}
memcpy(&value, buf8, size);
buf8 += size;
tu_printf(" ");
tu_printf(format, value);
}
// fill up last row to 16 for printing ascii
const uint16_t remain = count%16;
uint8_t nback = (remain ? remain : 16);
if ( remain )
{
for(int i=0; i< 16-remain; i++)
{
tu_printf(" ");
for(int j=0; j<2*size; j++) tu_printf(" ");
}
}
tu_printf(" | ");
dump_str_line(buf8-nback, nback);
tu_printf("\r\n");
}
#endif
#endif // host or device enabled

View File

@ -38,7 +38,8 @@
// LPC
#define OPT_MCU_LPC11UXX 1 ///< NXP LPC11Uxx
#define OPT_MCU_LPC13XX 3 ///< NXP LPC13xx
#define OPT_MCU_LPC13XX 2 ///< NXP LPC13xx
#define OPT_MCU_LPC15XX 3 ///< NXP LPC15xx
#define OPT_MCU_LPC175X_6X 4 ///< NXP LPC175x, LPC176x
#define OPT_MCU_LPC177X_8X 5 ///< NXP LPC177x, LPC178x
#define OPT_MCU_LPC18XX 6 ///< NXP LPC18xx
@ -67,8 +68,11 @@
#define OPT_MCU_STM32L1 308 ///< ST STM32L1
#define OPT_MCU_STM32L4 309 ///< ST STM32L4
#define OPT_MCU_MSP430x5xx 400 ///< TI MSP430x5xx
// Sony
#define OPT_MCU_CXD56 400 ///< SONY CXD56
// TI MSP430
#define OPT_MCU_MSP430x5xx 400 ///< TI MSP430x5xx
/** @} */