correct waklaround with only status IN

correct usb descriptor msc dual example to work with samg
This commit is contained in:
hathach 2020-02-07 22:13:38 +07:00
parent 02b2c60231
commit 46f22860fb
3 changed files with 48 additions and 45 deletions

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@ -95,7 +95,7 @@ enum
#define EPNUM_MSC_IN 0x85 #define EPNUM_MSC_IN 0x85
#elif CFG_TUSB_MCU == OPT_MCU_SAMG #elif CFG_TUSB_MCU == OPT_MCU_SAMG
// SAMG doesn't support a same endpoint number with IN and OUT // SAMG doesn't support a same endpoint number with different direction IN and OUT
// e.g EP1 OUT & EP1 IN cannot exist together // e.g EP1 OUT & EP1 IN cannot exist together
#define EPNUM_CDC_NOTIF 0x81 #define EPNUM_CDC_NOTIF 0x81
#define EPNUM_CDC_OUT 0x02 #define EPNUM_CDC_OUT 0x02

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@ -80,10 +80,20 @@ enum
#if CFG_TUSB_MCU == OPT_MCU_LPC175X_6X || CFG_TUSB_MCU == OPT_MCU_LPC177X_8X || CFG_TUSB_MCU == OPT_MCU_LPC40XX #if CFG_TUSB_MCU == OPT_MCU_LPC175X_6X || CFG_TUSB_MCU == OPT_MCU_LPC177X_8X || CFG_TUSB_MCU == OPT_MCU_LPC40XX
// LPC 17xx and 40xx endpoint type (bulk/interrupt/iso) are fixed by its number // LPC 17xx and 40xx endpoint type (bulk/interrupt/iso) are fixed by its number
// 0 control, 1 In, 2 Bulk, 3 Iso, 4 In etc ... // 0 control, 1 In, 2 Bulk, 3 Iso, 4 In, 5 Bulk etc ...
#define EPNUM_MSC 0x02 #define EPNUM_MSC_OUT 0x02
#define EPNUM_MSC_IN 0x82
#elif CFG_TUSB_MCU == OPT_MCU_SAMG
// SAMG doesn't support a same endpoint number with different direction IN and OUT
// e.g EP1 OUT & EP1 IN cannot exist together
#define EPNUM_MSC_OUT 0x01
#define EPNUM_MSC_IN 0x82
#else #else
#define EPNUM_MSC 0x01 #define EPNUM_MSC_OUT 0x01
#define EPNUM_MSC_IN 0x81
#endif #endif
uint8_t const desc_configuration[] = uint8_t const desc_configuration[] =
@ -92,7 +102,7 @@ uint8_t const desc_configuration[] =
TUD_CONFIG_DESCRIPTOR(ITF_NUM_TOTAL, 0, CONFIG_TOTAL_LEN, TUSB_DESC_CONFIG_ATT_REMOTE_WAKEUP, 100), TUD_CONFIG_DESCRIPTOR(ITF_NUM_TOTAL, 0, CONFIG_TOTAL_LEN, TUSB_DESC_CONFIG_ATT_REMOTE_WAKEUP, 100),
// Interface number, string index, EP Out & EP In address, EP size // Interface number, string index, EP Out & EP In address, EP size
TUD_MSC_DESCRIPTOR(ITF_NUM_MSC, 0, EPNUM_MSC, 0x80 | EPNUM_MSC, (CFG_TUSB_RHPORT0_MODE & OPT_MODE_HIGH_SPEED) ? 512 : 64), TUD_MSC_DESCRIPTOR(ITF_NUM_MSC, 0, EPNUM_MSC_OUT, EPNUM_MSC_IN, (CFG_TUSB_RHPORT0_MODE & OPT_MODE_HIGH_SPEED) ? 512 : 64),
}; };
// Invoked when received GET CONFIGURATION DESCRIPTOR // Invoked when received GET CONFIGURATION DESCRIPTOR

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@ -54,6 +54,7 @@ xfer_desc_t _dcd_xfer[EP_COUNT];
// Indicate that DATA Toggle for Control Status is incorrect, which must always be DATA1 by USB Specs. // Indicate that DATA Toggle for Control Status is incorrect, which must always be DATA1 by USB Specs.
// However SAMG DToggle is read-only, therefore we must duplicate the status phase ( D0 then D1 ) // However SAMG DToggle is read-only, therefore we must duplicate the status phase ( D0 then D1 )
// as walk-around to resolve this. The D0 status packet is likely to be discarded by USB Host safely. // as walk-around to resolve this. The D0 status packet is likely to be discarded by USB Host safely.
// Note: Only needed for IN Status e.g CDC_SET_LINE_CODING, since out data is sent by host
volatile bool _walkaround_incorrect_dtoggle_control_status; volatile bool _walkaround_incorrect_dtoggle_control_status;
void xfer_epsize_set(xfer_desc_t* xfer, uint16_t epsize) void xfer_epsize_set(xfer_desc_t* xfer, uint16_t epsize)
@ -255,46 +256,43 @@ bool dcd_edpt_xfer (uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t
xfer_desc_t* xfer = &_dcd_xfer[epnum]; xfer_desc_t* xfer = &_dcd_xfer[epnum];
xfer_begin(xfer, buffer, total_bytes); xfer_begin(xfer, buffer, total_bytes);
// Control Endpoint direction and data toggle if (dir == TUSB_DIR_OUT)
if (epnum == 0)
{ {
// Transfer direction is opposite to one previously set on EP0 // Clear EP0 direction bit
// This transfer is Control Status Stage if (epnum == 0) UDP->UDP_CSR[epnum] &= ~UDP_CSR_DIR_Msk;
if ( dir != tu_bit_test(UDP->UDP_CSR[epnum], UDP_CSR_DIR_Pos) )
{
// Set/Clear DIR bit accordingly
if (dir)
{
UDP->UDP_CSR[epnum] |= UDP_CSR_DIR_Msk;
}else
{
UDP->UDP_CSR[epnum] &= ~UDP_CSR_DIR_Msk;
}
// DATA Toggle is 0, USB Specs requires Status Stage must be DATA1 // Enable interrupt when starting OUT transfer
// Since SAMG DToggle is read-only, we mark this and implement a walk-around if (epnum != 0) UDP->UDP_IER |= (1 << epnum);
if ( !(UDP->UDP_CSR[epnum] & UDP_CSR_DTGLE_Msk) )
{
TU_LOG2("Incorrect DATA TOGGLE, Control Status must be DATA1\n");
// DTGLE is read-only on SAMG, this statement has no effect
UDP->UDP_CSR[epnum] |= UDP_CSR_DTGLE_Msk;
_walkaround_incorrect_dtoggle_control_status = true;
}
}
} }
else
if (dir == TUSB_DIR_IN)
{ {
// WALKROUND: duplicate IN transfer to send DATA1 status packet if (epnum == 0)
if (_walkaround_incorrect_dtoggle_control_status)
{ {
UDP->UDP_CSR[epnum] |= UDP_CSR_TXPKTRDY_Msk; // Previous EP0 direction is OUT --> This transfer is ZLP control status.
while ( UDP->UDP_CSR[epnum] & UDP_CSR_TXPKTRDY_Msk ) {} if ( !(UDP->UDP_CSR[epnum] & UDP_CSR_DIR_Msk) )
{
// Set EP0 dir bit
UDP->UDP_CSR[epnum] |= UDP_CSR_DIR_Msk;
_walkaround_incorrect_dtoggle_control_status = false; // DATA Toggle is 0, USB Specs requires Status Stage must be DATA1
// Since SAMG DToggle is read-only, we mark this and implement the walk-around
if ( !(UDP->UDP_CSR[epnum] & UDP_CSR_DTGLE_Msk) )
{
TU_LOG2("Incorrect DATA TOGGLE, Control Status must be DATA1\n");
// DTGLE is read-only on SAMG, this statement has no effect
UDP->UDP_CSR[epnum] |= UDP_CSR_DTGLE_Msk;
// WALKROUND: duplicate IN transfer to send DATA1 status packet
// set flag for irq to skip reporting first incorrect packet
_walkaround_incorrect_dtoggle_control_status = true;
UDP->UDP_CSR[epnum] |= UDP_CSR_TXPKTRDY_Msk;
while ( UDP->UDP_CSR[epnum] & UDP_CSR_TXPKTRDY_Msk ) {}
_walkaround_incorrect_dtoggle_control_status = false;
}
}
} }
xact_ep_write(epnum, xfer->buffer, xfer_packet_len(xfer)); xact_ep_write(epnum, xfer->buffer, xfer_packet_len(xfer));
@ -302,11 +300,6 @@ bool dcd_edpt_xfer (uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t
// TX ready for transfer // TX ready for transfer
UDP->UDP_CSR[epnum] |= UDP_CSR_TXPKTRDY_Msk; UDP->UDP_CSR[epnum] |= UDP_CSR_TXPKTRDY_Msk;
} }
else
{
// Enable interrupt when starting OUT transfer
if (epnum != 0) UDP->UDP_IER |= (1 << epnum);
}
return true; return true;
} }
@ -422,7 +415,7 @@ void dcd_isr(uint8_t rhport)
UDP->UDP_CSR[epnum] |= UDP_CSR_TXPKTRDY_Msk; UDP->UDP_CSR[epnum] |= UDP_CSR_TXPKTRDY_Msk;
}else }else
{ {
// WALKAROUND: Skip reporting this incorrect DATA Toggle status transfer // WALKAROUND: Skip reporting this incorrect DATA Toggle status IN transfer
if ( !(_walkaround_incorrect_dtoggle_control_status && (epnum == 0) && (xfer->actual_len == 0)) ) if ( !(_walkaround_incorrect_dtoggle_control_status && (epnum == 0) && (xfer->actual_len == 0)) )
{ {
// xfer is complete // xfer is complete