board_test run with lpc54114

This commit is contained in:
hathach 2019-09-01 15:58:42 +07:00
parent fb1ca24b02
commit 403662a1d6
3 changed files with 17 additions and 13 deletions

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@ -40,8 +40,9 @@ CHIP_FAMILY = lpc_usbd
FREERTOS_PORT = ARM_CM4
# For flash-jlink target
JLINK_DEVICE = LPC54114
JLINK_DEVICE = LPC54114J256_M4
JLINK_IF = swd
# flash using jlink
#flash: flash-jlink
# flash using pyocd
flash: $(BUILD)/$(BOARD)-firmware.elf
pyocd flash -v -e auto -t LPC54114 $<

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@ -30,8 +30,8 @@
#include "fsl_power.h"
#include "fsl_iocon.h"
#define LED_PORT 1
#define LED_PIN 10
#define LED_PORT 0
#define LED_PIN 29
#define LED_STATE_ON 0
// WAKE button
@ -39,14 +39,16 @@
#define BUTTON_PIN 24
// IOCON pin mux
#define IOCON_PIO_DIGITAL_EN 0x80u /*!< Enables digital function */
#define IOCON_PIO_FUNC1 0x01u /*!< Selects pin function 1 */
#define IOCON_PIO_FUNC7 0x07u /*!< Selects pin function 7 */
#define IOCON_PIO_INPFILT_OFF 0x0100u /*!< Input filter disabled */
#define IOCON_PIO_INV_DI 0x00u /*!< Input function is not inverted */
#define IOCON_PIO_MODE_INACT 0x00u /*!< No addition pin function */
#define IOCON_PIO_OPENDRAIN_DI 0x00u /*!< Open drain is disabled */
#define IOCON_PIO_SLEW_STANDARD 0x00u /*!< Standard mode, output slew rate control is enabled */
#define IOCON_PIO_DIGITAL_EN 0x80u /*!<@brief Enables digital function */
#define IOCON_PIO_FUNC0 0x00u
#define IOCON_PIO_FUNC1 0x01u /*!<@brief Selects pin function 1 */
#define IOCON_PIO_FUNC7 0x07u /*!<@brief Selects pin function 7 */
#define IOCON_PIO_INPFILT_OFF 0x0100u /*!<@brief Input filter disabled */
#define IOCON_PIO_INV_DI 0x00u /*!<@brief Input function is not inverted */
#define IOCON_PIO_MODE_INACT 0x00u /*!<@brief No addition pin function */
#define IOCON_PIO_MODE_PULLUP 0x10u
#define IOCON_PIO_OPENDRAIN_DI 0x00u /*!<@brief Open drain is disabled */
#define IOCON_PIO_SLEW_STANDARD 0x00u /*!<@brief Standard mode, output slew rate control is enabled */
/****************************************************************
name: BOARD_BootClockFROHF96M

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@ -43,6 +43,7 @@
#define OPT_MCU_LPC40XX 7 ///< NXP LPC40xx
#define OPT_MCU_LPC43XX 8 ///< NXP LPC43xx
#define OPT_MCU_LPC51UXX 9 ///< NXP LPC51U6x
#define OPT_MCU_LPC54XXX 10 ///< NXP LPC54xxx
#define OPT_MCU_NRF5X 100 ///< Nordic nRF5x series