This commit is contained in:
hathach 2019-09-11 11:55:16 +07:00
parent 34b76898da
commit 3f02c35983
7 changed files with 17 additions and 22 deletions

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@ -29,11 +29,8 @@
#if CFG_TUD_MSC #if CFG_TUD_MSC
// Some MCU doesn't have enough 8KB SRAM to store the whole disk // Some MCU doesn't have enough 8KB SRAM to store the whole disk
// We will use Flash as read-only disk // We will use Flash as read-only disk with board that has
// - LPC1347, LPC11uxx // CFG_EXAMPLE_MSC_READONLY defined
#if (CFG_TUSB_MCU == OPT_MCU_LPC13XX) || (CFG_TUSB_MCU == OPT_MCU_LPC11UXX)
#define DISK_READONLY
#endif
#define README_CONTENTS \ #define README_CONTENTS \
"This is tinyusb's MassStorage Class demo.\r\n\r\n\ "This is tinyusb's MassStorage Class demo.\r\n\r\n\
@ -46,7 +43,7 @@ enum
DISK_BLOCK_SIZE = 512 DISK_BLOCK_SIZE = 512
}; };
#ifdef DISK_READONLY #ifdef CFG_EXAMPLE_MSC_READONLY
const const
#endif #endif
uint8_t msc_disk[DISK_BLOCK_NUM][DISK_BLOCK_SIZE] = uint8_t msc_disk[DISK_BLOCK_NUM][DISK_BLOCK_SIZE] =
@ -193,7 +190,7 @@ int32_t tud_msc_write10_cb(uint8_t lun, uint32_t lba, uint32_t offset, uint8_t*
{ {
(void) lun; (void) lun;
#ifndef DISK_READONLY #ifndef CFG_EXAMPLE_MSC_READONLY
uint8_t* addr = msc_disk[lba] + offset; uint8_t* addr = msc_disk[lba] + offset;
memcpy(addr, buffer, bufsize); memcpy(addr, buffer, bufsize);
#else #else

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@ -29,11 +29,8 @@
#if CFG_TUD_MSC #if CFG_TUD_MSC
// Some MCU doesn't have enough 8KB SRAM to store the whole disk // Some MCU doesn't have enough 8KB SRAM to store the whole disk
// We will use Flash as read-only disk // We will use Flash as read-only disk with board that has
// - LPC1347, LPC11uxx // CFG_EXAMPLE_MSC_READONLY defined
#if (CFG_TUSB_MCU == OPT_MCU_LPC13XX) || (CFG_TUSB_MCU == OPT_MCU_LPC11UXX)
#define DISK_READONLY
#endif
#define README_CONTENTS \ #define README_CONTENTS \
"This is tinyusb's MassStorage Class demo.\r\n\r\n\ "This is tinyusb's MassStorage Class demo.\r\n\r\n\
@ -46,7 +43,7 @@ enum
DISK_BLOCK_SIZE = 512 DISK_BLOCK_SIZE = 512
}; };
#ifdef DISK_READONLY #ifdef CFG_EXAMPLE_MSC_READONLY
const const
#endif #endif
uint8_t msc_disk[DISK_BLOCK_NUM][DISK_BLOCK_SIZE] = uint8_t msc_disk[DISK_BLOCK_NUM][DISK_BLOCK_SIZE] =
@ -193,7 +190,7 @@ int32_t tud_msc_write10_cb(uint8_t lun, uint32_t lba, uint32_t offset, uint8_t*
{ {
(void) lun; (void) lun;
#ifndef DISK_READONLY #ifndef CFG_EXAMPLE_MSC_READONLY
uint8_t* addr = msc_disk[lba] + offset; uint8_t* addr = msc_disk[lba] + offset;
memcpy(addr, buffer, bufsize); memcpy(addr, buffer, bufsize);
#else #else

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@ -29,11 +29,8 @@
#if CFG_TUD_MSC #if CFG_TUD_MSC
// Some MCU doesn't have enough 8KB SRAM to store the whole disk // Some MCU doesn't have enough 8KB SRAM to store the whole disk
// We will use Flash as read-only disk // We will use Flash as read-only disk with board that has
// - LPC1347, LPC11uxx // CFG_EXAMPLE_MSC_READONLY defined
#if (CFG_TUSB_MCU == OPT_MCU_LPC13XX) || (CFG_TUSB_MCU == OPT_MCU_LPC11UXX) || defined(STM32F070xB)
#define DISK_READONLY
#endif
enum enum
{ {
@ -51,7 +48,7 @@ If you find any bugs or get any questions, feel free to file an\r\n\
issue at github.com/hathach/tinyusb" issue at github.com/hathach/tinyusb"
#ifdef DISK_READONLY #ifdef CFG_EXAMPLE_MSC_READONLY
const const
#endif #endif
uint8_t msc_disk0[DISK_BLOCK_NUM][DISK_BLOCK_SIZE] = uint8_t msc_disk0[DISK_BLOCK_NUM][DISK_BLOCK_SIZE] =
@ -132,7 +129,7 @@ uint8_t msc_disk0[DISK_BLOCK_NUM][DISK_BLOCK_SIZE] =
If you find any bugs or get any questions, feel free to file an\r\n\ If you find any bugs or get any questions, feel free to file an\r\n\
issue at github.com/hathach/tinyusb" issue at github.com/hathach/tinyusb"
#ifdef DISK_READONLY #ifdef CFG_EXAMPLE_MSC_READONLY
const const
#endif #endif
uint8_t msc_disk1[DISK_BLOCK_NUM][DISK_BLOCK_SIZE] = uint8_t msc_disk1[DISK_BLOCK_NUM][DISK_BLOCK_SIZE] =
@ -281,7 +278,7 @@ int32_t tud_msc_read10_cb(uint8_t lun, uint32_t lba, uint32_t offset, void* buff
// Process data in buffer to disk's storage and return number of written bytes // Process data in buffer to disk's storage and return number of written bytes
int32_t tud_msc_write10_cb(uint8_t lun, uint32_t lba, uint32_t offset, uint8_t* buffer, uint32_t bufsize) int32_t tud_msc_write10_cb(uint8_t lun, uint32_t lba, uint32_t offset, uint8_t* buffer, uint32_t bufsize)
{ {
#ifndef DISK_READONLY #ifndef CFG_EXAMPLE_MSC_READONLY
uint8_t* addr = (lun ? msc_disk1[lba] : msc_disk0[lba]) + offset; uint8_t* addr = (lun ? msc_disk1[lba] : msc_disk0[lba]) + offset;
memcpy(addr, buffer, bufsize); memcpy(addr, buffer, bufsize);
#else #else

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@ -5,6 +5,7 @@ CFLAGS += \
-nostdlib \ -nostdlib \
-DCORE_M0 \ -DCORE_M0 \
-D__USE_LPCOPEN \ -D__USE_LPCOPEN \
-DCFG_EXAMPLE_MSC_READONLY \
-DCFG_TUSB_MCU=OPT_MCU_LPC11UXX \ -DCFG_TUSB_MCU=OPT_MCU_LPC11UXX \
-DCFG_TUSB_MEM_SECTION='__attribute__((section(".data.$$RAM2")))' \ -DCFG_TUSB_MEM_SECTION='__attribute__((section(".data.$$RAM2")))' \
-DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))' -DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))'

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@ -5,6 +5,7 @@ CFLAGS += \
-nostdlib \ -nostdlib \
-DCORE_M3 \ -DCORE_M3 \
-D__USE_LPCOPEN \ -D__USE_LPCOPEN \
-DCFG_EXAMPLE_MSC_READONLY \
-DCFG_TUSB_MCU=OPT_MCU_LPC13XX \ -DCFG_TUSB_MCU=OPT_MCU_LPC13XX \
-DCFG_TUSB_MEM_SECTION='__attribute__((section(".data.$$RAM3")))' \ -DCFG_TUSB_MEM_SECTION='__attribute__((section(".data.$$RAM3")))' \
-DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))' -DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))'

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@ -6,6 +6,7 @@ CFLAGS += \
-mcpu=cortex-m0 \ -mcpu=cortex-m0 \
-mfloat-abi=soft \ -mfloat-abi=soft \
-nostdlib -nostartfiles \ -nostdlib -nostartfiles \
-DCFG_EXAMPLE_MSC_READONLY \
-DCFG_TUSB_MCU=OPT_MCU_STM32F0 -DCFG_TUSB_MCU=OPT_MCU_STM32F0
ST_HAL_DRIVER = hw/mcu/st/st_driver/STM32F0xx_HAL_Driver ST_HAL_DRIVER = hw/mcu/st/st_driver/STM32F0xx_HAL_Driver

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@ -6,6 +6,7 @@ CFLAGS += \
-mcpu=cortex-m0 \ -mcpu=cortex-m0 \
-mfloat-abi=soft \ -mfloat-abi=soft \
-nostdlib -nostartfiles \ -nostdlib -nostartfiles \
-DCFG_EXAMPLE_MSC_READONLY \
-DCFG_TUSB_MCU=OPT_MCU_STM32F0 -DCFG_TUSB_MCU=OPT_MCU_STM32F0
ST_HAL_DRIVER = hw/mcu/st/st_driver/STM32F0xx_HAL_Driver ST_HAL_DRIVER = hw/mcu/st/st_driver/STM32F0xx_HAL_Driver