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esp32-s2_dfu
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Code Issues Releases Activity

add int_on_complete parameter to hcd_pipe_xfer for TD chain class request 

fix control transfer request: remove get_control_request_ptr()
This commit is contained in:
hathach 2013-03-09 14:19:40 +07:00
parent b1db85dedf
commit 2364b09f80
5 changed files with 12 additions and 23 deletions
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6
tests/test/host/ehci/test_ehci_pipe_bulk_xfer.c
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@ -146,7 +146,7 @@ void test_bulk_xfer(void)
{
//------------- Code Under Test -------------//
hcd_pipe_xfer(pipe_hdl_bulk, xfer_data, sizeof(xfer_data));
hcd_pipe_xfer(pipe_hdl_bulk, xfer_data, sizeof(xfer_data), true);
ehci_qtd_t* p_qtd = p_qhd_bulk->p_qtd_list_head;
TEST_ASSERT_NOT_NULL(p_qtd);
@ -162,8 +162,8 @@ void test_bulk_xfer_double(void)
{
//------------- Code Under Test -------------//
hcd_pipe_xfer(pipe_hdl_bulk, xfer_data, sizeof(xfer_data));
hcd_pipe_xfer(pipe_hdl_bulk, data2, sizeof(data2));
hcd_pipe_xfer(pipe_hdl_bulk, xfer_data, sizeof(xfer_data), false);
hcd_pipe_xfer(pipe_hdl_bulk, data2, sizeof(data2), true);
ehci_qtd_t* p_head = p_qhd_bulk->p_qtd_list_head;
ehci_qtd_t* p_tail = p_qhd_bulk->p_qtd_list_head;

7
tests/test/host/ehci/test_ehci_pipe_xfer.c
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@ -162,7 +162,7 @@ void test_control_addr0_xfer_get_check_qhd_qtd_mapping(void)
TEST_ASSERT_EQUAL_HEX( p_status , p_data->next.address );
TEST_ASSERT_TRUE( p_status->next.terminate );
verify_qtd(p_setup, &usbh_device_info_pool[0].control_request, 8);
verify_qtd(p_setup, &request_get_dev_desc, 8);
}
@ -181,10 +181,7 @@ void test_control_xfer_get(void)
TEST_ASSERT_TRUE( p_status->next.terminate );
//------------- SETUP -------------//
uint8_t* p_request = (uint8_t *) &usbh_device_info_pool[dev_addr].control_request;
verify_qtd(p_setup, p_request, 8);
TEST_ASSERT_EQUAL_MEMORY(&request_get_dev_desc, p_request, sizeof(tusb_std_request_t));
verify_qtd(p_setup, &request_get_dev_desc, 8);
TEST_ASSERT_FALSE(p_setup->int_on_complete);
TEST_ASSERT_FALSE(p_setup->data_toggle);

18
tinyusb/host/ehci/ehci.c
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@ -252,7 +252,6 @@ static void queue_head_init(ehci_qhd_t *p_qhd, uint8_t dev_addr, uint16_t max_pa
static inline ehci_qhd_t* const get_control_qhd(uint8_t dev_addr) ATTR_ALWAYS_INLINE ATTR_PURE ATTR_WARN_UNUSED_RESULT;
static inline ehci_qtd_t* get_control_qtds(uint8_t dev_addr) ATTR_ALWAYS_INLINE ATTR_PURE ATTR_WARN_UNUSED_RESULT;
static inline tusb_std_request_t* const get_control_request_ptr(uint8_t dev_addr) ATTR_ALWAYS_INLINE ATTR_PURE ATTR_WARN_UNUSED_RESULT;
//--------------------------------------------------------------------+
// CONTROL PIPE API
@ -316,10 +315,8 @@ tusb_error_t hcd_pipe_control_xfer(uint8_t dev_addr, tusb_std_request_t const *
ehci_qtd_t *p_status = p_setup + 2;
//------------- SETUP Phase -------------//
*(get_control_request_ptr(dev_addr)) = *p_request; // copy request
queue_td_init(p_setup, (uint32_t) get_control_request_ptr(dev_addr), 8);
p_setup->pid = EHCI_PID_SETUP;
queue_td_init(p_setup, (uint32_t) p_request, 8);
p_setup->pid = EHCI_PID_SETUP;
p_setup->next.address = (uint32_t) p_data;
//------------- DATA Phase -------------//
@ -343,7 +340,7 @@ tusb_error_t hcd_pipe_control_xfer(uint8_t dev_addr, tusb_std_request_t const *
p_status->next.terminate = 1;
//------------- hook TD List to Queue Head -------------//
p_qhd->p_qtd_list_head = p_setup;
p_qhd->p_qtd_list_head = p_setup;
p_qhd->qtd_overlay.next.address = (uint32_t) p_setup;
return TUSB_ERROR_NONE;
@ -416,7 +413,7 @@ static inline void insert_qtd_to_qhd(ehci_qhd_t *p_qhd, ehci_qtd_t *p_qtd_new)
}
tusb_error_t hcd_pipe_xfer(pipe_handle_t pipe_hdl, uint8_t buffer[], uint16_t total_bytes)
tusb_error_t hcd_pipe_xfer(pipe_handle_t pipe_hdl, uint8_t buffer[], uint16_t total_bytes, bool int_on_complete)
{
//------------- TODO pipe handle validate -------------//
@ -434,7 +431,7 @@ tusb_error_t hcd_pipe_xfer(pipe_handle_t pipe_hdl, uint8_t buffer[], uint16_t t
queue_td_init(p_qtd, (uint32_t) buffer, total_bytes);
p_qtd->pid = p_qhd->pid_non_control;
p_qtd->int_on_complete = 1;
p_qtd->int_on_complete = int_on_complete ? 1 : 0;
//------------- insert TD to TD list -------------//
insert_qtd_to_qhd(p_qhd, p_qtd);
@ -458,11 +455,6 @@ static inline ehci_qtd_t* get_control_qtds(uint8_t dev_addr)
}
static inline tusb_std_request_t* const get_control_request_ptr(uint8_t dev_addr)
{
return &usbh_device_info_pool[dev_addr].control_request;
}
// TODO subject to pure function
static void queue_head_init(ehci_qhd_t *p_qhd, uint8_t dev_addr, uint16_t max_packet_size, uint8_t endpoint_addr, uint8_t xfer_type)
{

2
tinyusb/host/hcd.h
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@ -80,7 +80,7 @@ tusb_error_t hcd_pipe_control_xfer(uint8_t dev_addr, tusb_std_request_t const *
tusb_error_t hcd_pipe_control_close(uint8_t dev_addr) ATTR_WARN_UNUSED_RESULT;
pipe_handle_t hcd_pipe_open(uint8_t dev_addr, tusb_descriptor_endpoint_t const * endpoint_desc) ATTR_WARN_UNUSED_RESULT;
tusb_error_t hcd_pipe_xfer(pipe_handle_t pipe_hdl, uint8_t buffer[], uint16_t total_bytes) ATTR_WARN_UNUSED_RESULT;
tusb_error_t hcd_pipe_xfer(pipe_handle_t pipe_hdl, uint8_t buffer[], uint16_t total_bytes, bool int_on_complete) ATTR_WARN_UNUSED_RESULT;
tusb_error_t hcd_pipe_close(pipe_handle_t pipe_hdl) ATTR_WARN_UNUSED_RESULT;
#if 0

2
tinyusb/host/usbh.c
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@ -124,7 +124,7 @@ tusb_error_t usbh_control_xfer_subtask(uint8_t dev_addr, tusb_std_request_t cons
OSAL_SUBTASK_BEGIN
usbh_device_info_pool[dev_addr].control_request = *p_request;
(void) hcd_pipe_control_xfer(dev_addr, p_request, data);
(void) hcd_pipe_control_xfer(dev_addr, &usbh_device_info_pool[dev_addr].control_request, data);
osal_semaphore_wait(usbh_device_info_pool[dev_addr].sem_hdl, OSAL_TIMEOUT_NORMAL, &error); // careful of local variable without static
SUBTASK_ASSERT_STATUS_WITH_HANDLER(error, tusbh_device_mount_failed_cb(TUSB_ERROR_USBH_MOUNT_DEVICE_NOT_RESPOND, NULL) );