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esp32-s2_dfu
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add hal init for USB1 and trying to get USB1 working 

add hack delay 100 ms after a port reset (huge) for correct speed detection
This commit is contained in:
hathach 2013-04-07 03:40:24 +07:00
parent b5f7e48ad4
commit 1776bb53f6
9 changed files with 166 additions and 27 deletions
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8
demos/bsp/boards/board_ea4357.c
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@ -55,12 +55,10 @@ void board_init(void)
SysTick_Config(CGU_GetPCLKFrequency(CGU_PERIPHERAL_M4CORE) / CFG_TICKS_PER_SECOND); // 1 msec tick timer
// USB Host Power Enable
// USB0
// channel B U20 GPIO26 active low (base board), P2_3 on LPC4357
scu_pinmux(0x2, 3, MD_PUP | MD_EZI, FUNC7); // USB0 VBus function
// USB0 Power: EA4357 channel B U20 GPIO26 active low (base board), P2_3 on LPC4357
scu_pinmux(0x2, 3, MD_PUP | MD_EZI, FUNC7); // USB0 VBus Power
// TODO USB1
// USB1 Power: EA4357 channel A U20 is enabled by SJ5 connected to pad 1-2, no more action required
#if 0
// Leds Init

2
demos/host/tusb_config.h
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@ -59,7 +59,7 @@
// CONTROLLER CONFIGURATION
//--------------------------------------------------------------------+
#define TUSB_CFG_CONTROLLER0_MODE (TUSB_MODE_HOST)
#define TUSB_CFG_CONTROLLER1_MODE (TUSB_MODE_NONE)
#define TUSB_CFG_CONTROLLER1_MODE (TUSB_MODE_HOST)
//--------------------------------------------------------------------+
// HOST CONFIGURATION

2
tests/test/host/ehci/test_ehci_isr.c
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@ -51,6 +51,7 @@ usbh_device_info_t usbh_devices[TUSB_CFG_HOST_DEVICE_MAX+1];
uint8_t hostid;
ehci_registers_t * regs;
void setUp(void)
{
ehci_controller_init();
@ -59,7 +60,6 @@ void setUp(void)
regs = get_operational_register(hostid);
hcd_init();
regs->usb_sts = 0; // hcd_init clear usb_sts by writing 1s
}
void tearDown(void)

48
tests/test/host/hid/test_hidh_mouse.c Normal file
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@ -0,0 +1,48 @@
/*
* test_hidh_mouse.c
*
* Created on: Apr 6, 2013
* Author: hathach
*/
/*
* Software License Agreement (BSD License)
* Copyright (c) 2012, hathach (tinyusb.org)
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
* SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
* OF SUCH DAMAGE.
*
* This file is part of the tiny usb stack.
*/
#include "stdlib.h"
#include "unity.h"
#include "type_helper.h"
#include "errors.h"
#include "hid_host.h"
#include "mock_osal.h"
#include "mock_usbh.h"
#include "mock_hcd.h"
#include "descriptor_test.h"

75
tests/test/host/integration/test_hidh_keyboard.c
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@ -34,7 +34,6 @@
*
* This file is part of the tiny usb stack.
*/
#define _TINY_USB_SOURCE_FILE_
#include "stdlib.h"
#include "unity.h"
@ -42,7 +41,7 @@
#include "tusb_option.h"
#include "errors.h"
#include "osal_none.h"
#include "mock_osal.h"
#include "hcd.h"
#include "usbh.h"
#include "tusb.h"
@ -58,16 +57,74 @@ void setUp(void)
dev_addr = RANDOM(TUSB_CFG_HOST_DEVICE_MAX)+1;
hostid = RANDOM(CONTROLLER_HOST_NUMBER) + TEST_CONTROLLER_HOST_START_INDEX;
ehci_controller_init();
tusb_init();
}
void tearDown(void)
{
}
void test_(void)
{
ehci_controller_device_plug(hostid, TUSB_SPEED_HIGH);
}
//
//osal_semaphore_handle_t sem_create_stub(osal_semaphore_t * const sem, int num_call)
//{
// (*p_sem) = 0;
// return (osal_semaphore_handle_t) p_sem;
//}
//void sem_wait_stub(osal_semaphore_handle_t const sem_hdl, uint32_t msec, tusb_error_t *p_error, int num_call)
//{
//
//}
//tusb_error_t sem_post_stub(osal_semaphore_handle_t const sem_hdl, int num_call)
//{
// (*sem_hdl)++;
//
// return TUSB_ERROR_NONE;
//}
//void sem_reset_stub(osal_semaphore_handle_t const sem_hdl, int num_call)
//{
// (*sem_hdl) = 0;
//}
//
//osal_queue_handle_t queue_create_stub (osal_queue_t *p_queue, int num_call)
//{
// p_queue->count = p_queue->wr_idx = p_queue->rd_idx = 0;
// return (osal_queue_handle_t) p_queue;
//}
//void queue_receive_stub (osal_queue_handle_t const queue_hdl, uint32_t *p_data, uint32_t msec, tusb_error_t *p_error, int num_call)
//{
//
//}
//tusb_error_t queue_send_stub (osal_queue_handle_t const queue_hdl, uint32_t data, int num_call)
//{
// //TODO mutex lock hal_interrupt_disable
//
// queue_hdl->buffer[queue_hdl->wr_idx] = data;
// queue_hdl->wr_idx = (queue_hdl->wr_idx + 1) % queue_hdl->depth;
//
// if (queue_hdl->depth == queue_hdl->count) // queue is full, 1st rd is overwritten
// {
// queue_hdl->rd_idx = queue_hdl->wr_idx; // keep full state
// }else
// {
// queue_hdl->count++;
// }
//
// //TODO mutex unlock hal_interrupt_enable
//
// return TUSB_ERROR_NONE;
//}
//void queue_flush_stub(osal_queue_handle_t const queue_hdl, int num_call)
//{
// queue_hdl->count = queue_hdl->rd_idx = queue_hdl->wr_idx = 0;
//}
//
//void test_(void)
//{
// ehci_controller_device_plug(hostid, TUSB_SPEED_HIGH);
//
// tusb_task_runner(); // get 8-byte descriptor
// ehci_controller_control_xfer_proceed(0, &desc_device);
//
// tusb_task_runner(); // get 8-byte descriptor
//}

33
tinyusb/hal/hal_lpc43xx.c
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@ -55,19 +55,42 @@ enum {
tusb_error_t hal_init(void)
{
/* Set up USB0 clock */
//------------- USB0 Clock -------------//
#if TUSB_CFG_CONTROLLER0_MODE
CGU_EnableEntity(CGU_CLKSRC_PLL0, DISABLE); /* Disable PLL first */
ASSERT_INT( CGU_ERROR_SUCCESS, CGU_SetPLL0(), TUSB_ERROR_FAILED); /* the usb core require output clock = 480MHz */
CGU_EntityConnect(CGU_CLKSRC_XTAL_OSC, CGU_CLKSRC_PLL0);
CGU_EnableEntity(CGU_CLKSRC_PLL0, ENABLE); /* Enable PLL after all setting is done */
LPC_CREG->CREG0 &= ~(1<<5); /* Turn on the phy */
//------------- reset controller & set role -------------//
hcd_controller_reset(0); // TODO where to place prototype, USB1
// reset controller & set role
#if TUSB_CFG_CONTROLLER0_MODE & TUSB_MODE_HOST
hcd_controller_reset(0); // TODO where to place prototype
LPC_USB0->USBMODE_H = LPC43XX_USBMODE_HOST | (LPC43XX_USBMODE_VBUS_HIGH << 5);
#else // TODO OTG
#error device mode is not supported
#endif
hal_interrupt_enable(0); // TODO USB1
hal_interrupt_enable(0);
#endif
//------------- USB1 Clock, only use on-chip FS PHY -------------//
#if TUSB_CFG_CONTROLLER1_MODE
/* connect CLK_USB1 to 60 MHz clock */
CGU_EntityConnect(CGU_CLKSRC_PLL1, CGU_BASE_USB1); /* FIXME Run base BASE_USB1_CLK clock from PLL1 (assume PLL1 is 60 MHz, no division required) */
LPC_SCU->SFSUSB = (TUSB_CFG_CONTROLLER1_MODE & TUSB_MODE_HOST) ? 0x16 : 0x12; // enable USB1 with on-chip FS PHY
#if TUSB_CFG_CONTROLLER1_MODE & TUSB_MODE_HOST
hcd_controller_reset(1); // TODO where to place prototype
LPC_USB1->USBMODE_H = LPC43XX_USBMODE_HOST | (LPC43XX_USBMODE_VBUS_HIGH << 5);
#else
#endif
LPC_USB1->PORTSC1_D |= (1<<24); // TODO abtract, force port to fullspeed
hal_interrupt_enable(1);
#endif
return TUSB_ERROR_NONE;
}

6
tinyusb/host/ehci/ehci.c
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@ -136,6 +136,10 @@ void hcd_port_reset(uint8_t hostid)
// there is chance device is unplugged while reset sequence is not complete
while( regs->portsc_bit.port_reset) {}
#endif
// TODO finalize delay after reset, hack delay 100 ms, otherwise speed is detected as LOW in most cases
volatile uint32_t delay_us = 100000;
delay_us *= (SystemCoreClock / 1000000) / 3;
while(delay_us--);
}
bool hcd_port_connect_status(uint8_t hostid)
@ -153,7 +157,9 @@ static tusb_error_t hcd_controller_init(uint8_t hostid)
//------------- CTRLDSSEGMENT Register (skip) -------------//
//------------- USB INT Register -------------//
regs->usb_int_enable = 0; // 1. disable all the interrupt
#ifndef _TEST_ // the fake controller does not have write-to-clear behavior
regs->usb_sts = EHCI_INT_MASK_ALL; // 2. clear all status
#endif
regs->usb_int_enable = EHCI_INT_MASK_ERROR | EHCI_INT_MASK_PORT_CHANGE |
#if EHCI_PERIODIC_LIST
EHCI_INT_MASK_NXP_PERIODIC |

15
tinyusb/osal/osal.h
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@ -141,8 +141,8 @@ tusb_error_t osal_task_create(osal_task_t *task);
//--------------------------------------------------------------------+
// Semaphore API
//--------------------------------------------------------------------+
typedef volatile uint32_t osal_semaphore_t;
typedef void* osal_semaphore_handle_t;
typedef volatile uint8_t osal_semaphore_t;
typedef osal_semaphore_t * osal_semaphore_handle_t;
#define OSAL_SEM_DEF(name)\
osal_semaphore_t name
@ -158,8 +158,15 @@ void osal_semaphore_reset(osal_semaphore_handle_t const sem_hdl);
//--------------------------------------------------------------------+
// QUEUE API
//--------------------------------------------------------------------+
typedef uint32_t osal_queue_t;
typedef void* osal_queue_handle_t;
typedef struct{
uint32_t * const buffer ; ///< buffer pointer
uint8_t const depth ; ///< buffer size
volatile uint8_t count ; ///< bytes in fifo
volatile uint8_t wr_idx ; ///< write pointer
volatile uint8_t rd_idx ; ///< read pointer
} osal_queue_t;
typedef osal_queue_t * osal_queue_handle_t;
#define OSAL_QUEUE_DEF(name, queue_depth, type) \
osal_queue_t name

4
tinyusb/osal/osal_none.h
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@ -67,8 +67,8 @@ static inline void osal_tick_tock(void)
osal_tick_current++;
}
static inline uint32_t osal_tick_get(void) ATTR_ALWAYS_INLINE;
static inline uint32_t osal_tick_get(void)
static inline volatile uint32_t osal_tick_get(void) ATTR_ALWAYS_INLINE;
static inline volatile uint32_t osal_tick_get(void)
{
return osal_tick_current;
}