Merge branch 'master' into rp2040-logger-enumfix

This commit is contained in:
hathach 2021-02-01 13:41:20 +07:00
commit 0799a91073
7 changed files with 24 additions and 19 deletions

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@ -15,6 +15,8 @@ jobs:
steps:
- name: Setup Ruby
uses: actions/setup-ruby@v1
with:
ruby-version: '2.7'
- name: Checkout TinyUSB
uses: actions/checkout@v2

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@ -80,10 +80,11 @@ uint8_t const * tud_descriptor_device_cb(void)
TUD_USBTMC_BULK_DESCRIPTORS(/* OUT = */0x01, /* IN = */ 0x81, /* packet size = */USBTMCD_MAX_PACKET_SIZE)
#if CFG_TUD_USBTMC_ENABLE_INT_EP
// Interrupt endpoint should be 2 bytes on a FS USB link
// USBTMC Interrupt xfer always has length of 2, but we use epMaxSize=8 for
// compatibility with mcus that only allow 8, 16, 32 or 64 for FS endpoints
# define TUD_USBTMC_DESC(_itfnum) \
TUD_USBTMC_DESC_MAIN(_itfnum, /* _epCount = */ 3), \
TUD_USBTMC_INT_DESCRIPTOR(/* INT ep # */ 0x82, /* epMaxSize = */ 2, /* bInterval = */16u )
TUD_USBTMC_INT_DESCRIPTOR(/* INT ep # */ 0x82, /* epMaxSize = */ 8, /* bInterval = */16u )
# define TUD_USBTMC_DESC_LEN (TUD_USBTMC_IF_DESCRIPTOR_LEN + TUD_USBTMC_BULK_DESCRIPTORS_LEN + TUD_USBTMC_INT_DESCRIPTOR_LEN)
#else

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@ -192,6 +192,7 @@ uint32_t tud_midi_n_write(uint8_t itf, uint8_t jack_id, uint8_t const* buffer, u
if (midi->write_buffer[0] == 0x4) {
if (data == 0xf7) {
midi->write_buffer[0] = 0x5;
midi->write_target_length = 2;
} else {
midi->write_target_length = 4;
}

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@ -38,8 +38,6 @@
#include "device/dcd.h"
#include "pico/stdlib.h"
/*------------------------------------------------------------------*/
/* Low level controller
*------------------------------------------------------------------*/
@ -66,11 +64,7 @@ static struct hw_endpoint *hw_endpoint_get_by_addr(uint8_t ep_addr)
}
static void _hw_endpoint_alloc(struct hw_endpoint *ep)
{
uint size = 64;
if (ep->wMaxPacketSize > 64)
{
size = ep->wMaxPacketSize;
}
uint size = TU_MIN(64, ep->wMaxPacketSize);
// Assumes single buffered for now
ep->hw_data_buf = next_buffer_ptr;
@ -243,7 +237,7 @@ static void reset_ep0(void)
// If we have finished this transfer on EP0 set pid back to 1 for next
// setup transfer. Also clear a stall in case
uint8_t addrs[] = {0x0, 0x80};
for (uint i = 0 ; i < count_of(addrs); i++)
for (uint i = 0 ; i < TU_ARRAY_SIZE(addrs); i++)
{
struct hw_endpoint *ep = hw_endpoint_get_by_addr(addrs[i]);
ep->next_pid = 1u;
@ -474,4 +468,10 @@ void dcd_edpt_close (uint8_t rhport, uint8_t ep_addr)
}
void dcd_int_handler(uint8_t rhport)
{
(void) rhport;
dcd_rp2040_irq();
}
#endif

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@ -86,7 +86,7 @@ static void set_dev_ep(uint8_t dev_addr, uint8_t ep_addr, struct hw_endpoint *ep
uint8_t num = tu_edpt_number(ep_addr);
uint8_t in = (ep_addr & TUSB_DIR_IN_MASK) ? 1 : 0;
uint32_t index = ep - eps;
hard_assert(index < count_of(eps));
hard_assert(index < TU_ARRAY_SIZE(eps));
// todo revisit why dev_addr can be 0 here
if (dev_addr) {
dev_ep_map[dev_addr-1][num][in] = 128u | index;
@ -245,7 +245,7 @@ static void hcd_rp2040_irq(void)
static struct hw_endpoint *_next_free_interrupt_ep(void)
{
struct hw_endpoint *ep = NULL;
for (uint i = 1; i < count_of(eps); i++)
for (uint i = 1; i < TU_ARRAY_SIZE(eps); i++)
{
ep = &eps[i];
if (!ep->configured)
@ -444,6 +444,7 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t *
// Get appropriate ep. Either EPX or interrupt endpoint
struct hw_endpoint *ep = get_dev_ep(dev_addr, ep_addr);
assert(ep);
if (ep_addr != ep->ep_addr)
{

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@ -209,10 +209,10 @@ void test_usbd_control_in_zlp(void)
{
// 128 byte total len, with EP0 size = 64, and request length = 256
// ZLP must be return
uint8_t zlp_desc_configuration[CFG_TUD_ENDOINT0_SIZE*2] =
uint8_t zlp_desc_configuration[CFG_TUD_ENDPOINT0_SIZE*2] =
{
// Config number, interface count, string index, total length, attribute, power in mA
TUD_CONFIG_DESCRIPTOR(1, 0, 0, CFG_TUD_ENDOINT0_SIZE*2, TUSB_DESC_CONFIG_ATT_REMOTE_WAKEUP, 100),
TUD_CONFIG_DESCRIPTOR(1, 0, 0, CFG_TUD_ENDPOINT0_SIZE*2, TUSB_DESC_CONFIG_ATT_REMOTE_WAKEUP, 100),
};
desc_configuration = zlp_desc_configuration;
@ -222,13 +222,13 @@ void test_usbd_control_in_zlp(void)
// 1st transaction
dcd_edpt_xfer_ExpectWithArrayAndReturn(rhport, EDPT_CTRL_IN,
zlp_desc_configuration, CFG_TUD_ENDOINT0_SIZE, CFG_TUD_ENDOINT0_SIZE, true);
dcd_event_xfer_complete(rhport, EDPT_CTRL_IN, CFG_TUD_ENDOINT0_SIZE, 0, false);
zlp_desc_configuration, CFG_TUD_ENDPOINT0_SIZE, CFG_TUD_ENDPOINT0_SIZE, true);
dcd_event_xfer_complete(rhport, EDPT_CTRL_IN, CFG_TUD_ENDPOINT0_SIZE, 0, false);
// 2nd transaction
dcd_edpt_xfer_ExpectWithArrayAndReturn(rhport, EDPT_CTRL_IN,
zlp_desc_configuration + CFG_TUD_ENDOINT0_SIZE, CFG_TUD_ENDOINT0_SIZE, CFG_TUD_ENDOINT0_SIZE, true);
dcd_event_xfer_complete(rhport, EDPT_CTRL_IN, CFG_TUD_ENDOINT0_SIZE, 0, false);
zlp_desc_configuration + CFG_TUD_ENDPOINT0_SIZE, CFG_TUD_ENDPOINT0_SIZE, CFG_TUD_ENDPOINT0_SIZE, true);
dcd_event_xfer_complete(rhport, EDPT_CTRL_IN, CFG_TUD_ENDPOINT0_SIZE, 0, false);
// Expect Zero length Packet
dcd_edpt_xfer_ExpectAndReturn(rhport, EDPT_CTRL_IN, NULL, 0, true);

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@ -74,7 +74,7 @@
//--------------------------------------------------------------------
#define CFG_TUD_TASK_QUEUE_SZ 100
#define CFG_TUD_ENDOINT0_SIZE 64
#define CFG_TUD_ENDPOINT0_SIZE 64
//------------- CLASS -------------//
//#define CFG_TUD_CDC 0