change usbh class driver open signature

This commit is contained in:
hathach 2018-12-09 12:34:05 +07:00
parent 637285e9ae
commit 05913a7350
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GPG Key ID: 2FA891220FBFD581
13 changed files with 112 additions and 91 deletions

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@ -134,7 +134,7 @@ void cdch_init(void)
tu_memclr(cdch_data, sizeof(cdch_data_t)*CFG_TUSB_HOST_DEVICE_MAX);
}
bool cdch_open_subtask(uint8_t dev_addr, tusb_desc_interface_t const *p_interface_desc, uint16_t *p_length)
bool cdch_open_subtask(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *p_interface_desc, uint16_t *p_length)
{
// TODO change following assert to subtask_assert
if ( CDC_COMM_SUBCLASS_ABSTRACT_CONTROL_MODEL != p_interface_desc->bInterfaceSubClass) return TUSB_ERROR_CDC_UNSUPPORTED_SUBCLASS;
@ -170,7 +170,7 @@ bool cdch_open_subtask(uint8_t dev_addr, tusb_desc_interface_t const *p_interfac
if ( TUSB_DESC_ENDPOINT == p_desc[DESC_OFFSET_TYPE])
{ // notification endpoint if any
p_cdc->pipe_notification = hcd_pipe_open(dev_addr, (tusb_desc_endpoint_t const *) p_desc, TUSB_CLASS_CDC);
p_cdc->pipe_notification = hcd_pipe_open(rhport, dev_addr, (tusb_desc_endpoint_t const *) p_desc, TUSB_CLASS_CDC);
(*p_length) += p_desc[DESC_OFFSET_LEN];
p_desc = descriptor_next(p_desc);
@ -195,7 +195,7 @@ bool cdch_open_subtask(uint8_t dev_addr, tusb_desc_interface_t const *p_interfac
pipe_handle_t * p_pipe_hdl = ( p_endpoint->bEndpointAddress & TUSB_DIR_IN_MASK ) ?
&p_cdc->pipe_in : &p_cdc->pipe_out;
(*p_pipe_hdl) = hcd_pipe_open(dev_addr, p_endpoint, TUSB_CLASS_CDC);
(*p_pipe_hdl) = hcd_pipe_open(rhport, dev_addr, p_endpoint, TUSB_CLASS_CDC);
TU_ASSERT ( pipehandle_is_valid(*p_pipe_hdl) );
(*p_length) += p_desc[DESC_OFFSET_LEN];

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@ -150,7 +150,7 @@ typedef struct {
extern cdch_data_t cdch_data[CFG_TUSB_HOST_DEVICE_MAX]; // TODO consider to move to cdch internal header file
void cdch_init(void);
bool cdch_open_subtask(uint8_t dev_addr, tusb_desc_interface_t const *p_interface_desc, uint16_t *p_length) ATTR_WARN_UNUSED_RESULT;
bool cdch_open_subtask(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *p_interface_desc, uint16_t *p_length) ATTR_WARN_UNUSED_RESULT;
void cdch_isr(pipe_handle_t pipe_hdl, xfer_result_t event, uint32_t xferred_bytes);
void cdch_close(uint8_t dev_addr);

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@ -100,15 +100,15 @@ static inline ehci_qhd_t* qhd_find_free (uint8_t dev_addr) ATTR_PURE ATTR_ALW
static inline tusb_xfer_type_t qhd_get_xfer_type(ehci_qhd_t const * p_qhd) ATTR_ALWAYS_INLINE ATTR_PURE;
static inline ehci_qhd_t* qhd_get_from_pipe_handle(pipe_handle_t pipe_hdl) ATTR_PURE ATTR_ALWAYS_INLINE;
static inline pipe_handle_t qhd_create_pipe_handle(ehci_qhd_t const * p_qhd, tusb_xfer_type_t xfer_type) ATTR_PURE ATTR_ALWAYS_INLINE;
// determine if a queue head has bus-related error
static inline bool qhd_has_xact_error(ehci_qhd_t * p_qhd) ATTR_ALWAYS_INLINE ATTR_PURE;
static inline bool qhd_has_xact_error(ehci_qhd_t * p_qhd)
{
return ( p_qhd->qtd_overlay.buffer_err ||p_qhd->qtd_overlay.babble_err || p_qhd->qtd_overlay.xact_err );
//p_qhd->qtd_overlay.non_hs_period_missed_uframe || p_qhd->qtd_overlay.pingstate_err TODO split transaction error
}
static void qhd_init(ehci_qhd_t *p_qhd, uint8_t dev_addr, uint16_t max_packet_size, uint8_t endpoint_addr, uint8_t xfer_type, uint8_t interval);
static void qhd_init(ehci_qhd_t *p_qhd, uint8_t dev_addr, tusb_desc_endpoint_t const * ep_desc);
static inline ehci_qtd_t* qtd_find_free(uint8_t dev_addr) ATTR_PURE ATTR_ALWAYS_INLINE;
@ -123,7 +123,6 @@ static ehci_link_t* list_find_previous_item(ehci_link_t* p_head, ehci_link_t* p
static tusb_error_t list_remove_qhd(ehci_link_t* p_head, ehci_link_t* p_remove);
static bool ehci_init(uint8_t hostid);
static tusb_error_t hcd_controller_stop(uint8_t hostid) ATTR_WARN_UNUSED_RESULT ATTR_UNUSED;
//--------------------------------------------------------------------+
// USBH-HCD API
@ -279,21 +278,21 @@ static tusb_error_t hcd_controller_stop(uint8_t hostid)
//--------------------------------------------------------------------+
// CONTROL PIPE API
//--------------------------------------------------------------------+
bool hcd_pipe_control_open(uint8_t dev_addr, uint8_t max_packet_size)
{
ehci_qhd_t * const p_qhd = get_control_qhd(dev_addr);
qhd_init(p_qhd, dev_addr, max_packet_size, 0, TUSB_XFER_CONTROL, 1); // TODO binterval of control is ignored
if (dev_addr != 0)
{
//------------- insert to async list -------------//
list_insert( (ehci_link_t*) get_async_head(_usbh_devices[dev_addr].core_id),
(ehci_link_t*) p_qhd, EHCI_QUEUE_ELEMENT_QHD);
}
return true;
}
//bool hcd_pipe_control_open(uint8_t dev_addr, uint8_t max_packet_size)
//{
// ehci_qhd_t * const p_qhd = get_control_qhd(dev_addr);
//
// qhd_init(p_qhd, dev_addr, max_packet_size, 0, TUSB_XFER_CONTROL, 1); // TODO binterval of control is ignored
//
// if (dev_addr != 0)
// {
// //------------- insert to async list -------------//
// list_insert( (ehci_link_t*) get_async_head(_usbh_devices[dev_addr].core_id),
// (ehci_link_t*) p_qhd, EHCI_QUEUE_ELEMENT_QHD);
// }
//
// return true;
//}
//bool hcd_pipe_control_xfer(uint8_t dev_addr, tusb_control_request_t const * p_request, uint8_t data[])
//{
@ -345,7 +344,7 @@ bool hcd_pipe_control_close(uint8_t dev_addr)
if (dev_addr != 0)
{
TU_ASSERT_ERR( list_remove_qhd( (ehci_link_t*) get_async_head( _usbh_devices[dev_addr].core_id ),
TU_ASSERT_ERR( list_remove_qhd( (ehci_link_t*) get_async_head( _usbh_devices[dev_addr].rhport ),
(ehci_link_t*) p_qhd) );
}
@ -356,7 +355,9 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const*
{
// FIXME control only for now
(void) rhport;
return hcd_pipe_control_open(dev_addr, ep_desc->wMaxPacketSize.size);
hcd_pipe_open(rhport, dev_addr, ep_desc, 0);
return true;
}
bool hcd_edpt_close(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr)
@ -418,42 +419,59 @@ bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet
//--------------------------------------------------------------------+
// BULK/INT/ISO PIPE API
//--------------------------------------------------------------------+
pipe_handle_t hcd_pipe_open(uint8_t dev_addr, tusb_desc_endpoint_t const * p_endpoint_desc, uint8_t class_code)
pipe_handle_t hcd_pipe_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const * ep_desc, uint8_t class_code)
{
pipe_handle_t const null_handle = { .dev_addr = 0, .xfer_type = 0, .index = 0 };
TU_ASSERT(dev_addr > 0, null_handle);
if (p_endpoint_desc->bmAttributes.xfer == TUSB_XFER_ISOCHRONOUS)
return null_handle; // TODO not support ISO yet
// TODO not support ISO yet
if (ep_desc->bmAttributes.xfer == TUSB_XFER_ISOCHRONOUS) return null_handle;
//------------- Prepare Queue Head -------------//
ehci_qhd_t * const p_qhd = qhd_find_free(dev_addr);
ehci_qhd_t * p_qhd;
if ( ep_desc->bEndpointAddress == 0 )
{
p_qhd = get_control_qhd(dev_addr);
}else
{
p_qhd = qhd_find_free(dev_addr);
}
TU_ASSERT(p_qhd, null_handle);
qhd_init( p_qhd, dev_addr, p_endpoint_desc->wMaxPacketSize.size, p_endpoint_desc->bEndpointAddress,
p_endpoint_desc->bmAttributes.xfer, p_endpoint_desc->bInterval );
qhd_init( p_qhd, dev_addr, ep_desc);
p_qhd->class_code = class_code;
//------------- Insert to Async List -------------//
ehci_link_t * list_head;
if (p_endpoint_desc->bmAttributes.xfer == TUSB_XFER_BULK)
switch (ep_desc->bmAttributes.xfer)
{
list_head = (ehci_link_t*) get_async_head(_usbh_devices[dev_addr].core_id);
}
#if EHCI_PERIODIC_LIST // TODO refractor/group this together
else if (p_endpoint_desc->bmAttributes.xfer == TUSB_XFER_INTERRUPT)
{
list_head = get_period_head(_usbh_devices[dev_addr].core_id, p_qhd->interval_ms);
}
#endif
case TUSB_XFER_CONTROL:
list_head = (ehci_link_t*) get_async_head(_usbh_devices[dev_addr].rhport);
break;
//------------- insert to async/period list TODO might need to disable async/period list -------------//
list_insert( list_head,
(ehci_link_t*) p_qhd, EHCI_QUEUE_ELEMENT_QHD);
case TUSB_XFER_BULK:
list_head = (ehci_link_t*) get_async_head(_usbh_devices[dev_addr].rhport);
break;
return (pipe_handle_t) { .dev_addr = dev_addr, .xfer_type = p_endpoint_desc->bmAttributes.xfer, .index = qhd_get_index(p_qhd) };
#if EHCI_PERIODIC_LIST // TODO refractor/group this together
case TUSB_XFER_INTERRUPT:
list_head = get_period_head(_usbh_devices[dev_addr].rhport, p_qhd->interval_ms);
break;
#endif
case TUSB_XFER_ISOCHRONOUS:
// TODO iso is not supported
break;
default: break;
}
//------------- insert to async/period list -------------//
// TODO might need to disable async/period list
list_insert( list_head, (ehci_link_t*) p_qhd, EHCI_QUEUE_ELEMENT_QHD);
return (pipe_handle_t) { .dev_addr = dev_addr, .xfer_type = ep_desc->bmAttributes.xfer, .index = qhd_get_index(p_qhd) };
}
tusb_error_t hcd_pipe_queue_xfer(pipe_handle_t pipe_hdl, uint8_t buffer[], uint16_t total_bytes)
@ -507,14 +525,14 @@ tusb_error_t hcd_pipe_close(pipe_handle_t pipe_hdl)
if ( pipe_hdl.xfer_type == TUSB_XFER_BULK )
{
TU_ASSERT_ERR( list_remove_qhd(
(ehci_link_t*) get_async_head( _usbh_devices[pipe_hdl.dev_addr].core_id ),
(ehci_link_t*) get_async_head( _usbh_devices[pipe_hdl.dev_addr].rhport ),
(ehci_link_t*) p_qhd) );
}
#if EHCI_PERIODIC_LIST // TODO refractor/group this together
else
{
TU_ASSERT_ERR( list_remove_qhd(
get_period_head( _usbh_devices[pipe_hdl.dev_addr].core_id, p_qhd->interval_ms ),
get_period_head( _usbh_devices[pipe_hdl.dev_addr].rhport, p_qhd->interval_ms ),
(ehci_link_t*) p_qhd) );
}
#endif
@ -882,7 +900,7 @@ static inline ehci_link_t* get_period_head(uint8_t hostid, uint8_t interval_ms)
static inline ehci_qhd_t* get_control_qhd(uint8_t dev_addr)
{
return (dev_addr == 0) ?
get_async_head( _usbh_devices[dev_addr].core_id ) :
get_async_head( _usbh_devices[dev_addr].rhport ) :
&ehci_data.device[dev_addr-1].control.qhd;
}
static inline ehci_qtd_t* get_control_qtds(uint8_t dev_addr)
@ -978,7 +996,7 @@ static inline void qtd_insert_to_qhd(ehci_qhd_t *p_qhd, ehci_qtd_t *p_qtd_new)
}
}
static void qhd_init(ehci_qhd_t *p_qhd, uint8_t dev_addr, uint16_t max_packet_size, uint8_t endpoint_addr, uint8_t xfer_type, uint8_t interval)
static void qhd_init(ehci_qhd_t *p_qhd, uint8_t dev_addr, tusb_desc_endpoint_t const * ep_desc)
{
// address 0 is used as async head, which always on the list --> cannot be cleared (ehci halted otherwise)
if (dev_addr != 0)
@ -986,14 +1004,17 @@ static void qhd_init(ehci_qhd_t *p_qhd, uint8_t dev_addr, uint16_t max_packet_si
tu_memclr(p_qhd, sizeof(ehci_qhd_t));
}
uint8_t const xfer_type = ep_desc->bmAttributes.xfer;
uint8_t const interval = ep_desc->bInterval;
p_qhd->device_address = dev_addr;
p_qhd->non_hs_period_inactive_next_xact = 0;
p_qhd->endpoint_number = endpoint_addr & 0x0F;
p_qhd->endpoint_number = edpt_number(ep_desc->bEndpointAddress);
p_qhd->endpoint_speed = _usbh_devices[dev_addr].speed;
p_qhd->data_toggle_control = (xfer_type == TUSB_XFER_CONTROL) ? 1 : 0;
p_qhd->head_list_flag = (dev_addr == 0) ? 1 : 0; // addr0's endpoint is the static asyn list head
p_qhd->max_package_size = max_packet_size;
p_qhd->non_hs_control_endpoint = ((TUSB_XFER_CONTROL == xfer_type) && (p_qhd->endpoint_speed != TUSB_SPEED_HIGH)) ? 1 : 0;
p_qhd->max_package_size = ep_desc->wMaxPacketSize.size;
p_qhd->non_hs_control_endpoint = ((xfer_type == TUSB_XFER_CONTROL) && (p_qhd->endpoint_speed != TUSB_SPEED_HIGH)) ? 1 : 0;
p_qhd->nak_count_reload = 0;
// Bulk/Control -> smask = cmask = 0
@ -1035,7 +1056,7 @@ static void qhd_init(ehci_qhd_t *p_qhd, uint8_t dev_addr, uint16_t max_packet_si
p_qhd->is_removing = 0;
p_qhd->p_qtd_list_head = NULL;
p_qhd->p_qtd_list_tail = NULL;
p_qhd->pid_non_control = (endpoint_addr & 0x80) ? EHCI_PID_IN : EHCI_PID_OUT; // PID for TD under this endpoint
p_qhd->pid_non_control = edpt_dir(ep_desc->bEndpointAddress) ? EHCI_PID_IN : EHCI_PID_OUT; // PID for TD under this endpoint
//------------- active, but no TD list -------------//
p_qhd->qtd_overlay.halted = 0;

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@ -467,7 +467,7 @@ typedef struct
ehci_qtd_t qtd;
}control;
ehci_qhd_t qhd[HCD_MAX_ENDPOINT] ; ///< Queue Head Pool
ehci_qhd_t qhd[HCD_MAX_ENDPOINT] ; ///< Queue Head Pool
ehci_qtd_t qtd[HCD_MAX_XFER] ATTR_ALIGNED(32) ; ///< Queue Element Transfer Pool
// ehci_itd_t itd[EHCI_MAX_ITD] ; ///< Iso Transfer Pool
// ehci_sitd_t sitd[EHCI_MAX_SITD] ; ///< Split (FS) Isochronous Transfer Pool

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@ -140,7 +140,7 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t *
//--------------------------------------------------------------------+
// TODO control xfer should be used via usbh layer
pipe_handle_t hcd_pipe_open(uint8_t dev_addr, tusb_desc_endpoint_t const * endpoint_desc, uint8_t class_code) ATTR_WARN_UNUSED_RESULT;
pipe_handle_t hcd_pipe_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const * endpoint_desc, uint8_t class_code) ATTR_WARN_UNUSED_RESULT;
tusb_error_t hcd_pipe_queue_xfer(pipe_handle_t pipe_hdl, uint8_t buffer[], uint16_t total_bytes) ATTR_WARN_UNUSED_RESULT; // only queue, not transferring yet
tusb_error_t hcd_pipe_xfer(pipe_handle_t pipe_hdl, uint8_t buffer[], uint16_t total_bytes, bool int_on_complete) ATTR_WARN_UNUSED_RESULT;
tusb_error_t hcd_pipe_close(pipe_handle_t pipe_hdl) /*ATTR_WARN_UNUSED_RESULT*/;

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@ -155,7 +155,7 @@ void hub_init(void)
// hub_enum_sem_hdl = osal_semaphore_create( OSAL_SEM_REF(hub_enum_semaphore) );
}
bool hub_open_subtask(uint8_t dev_addr, tusb_desc_interface_t const *p_interface_desc, uint16_t *p_length)
bool hub_open_subtask(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *p_interface_desc, uint16_t *p_length)
{
// not support multiple TT yet
if ( p_interface_desc->bInterfaceProtocol > 1 ) return false;
@ -167,7 +167,7 @@ bool hub_open_subtask(uint8_t dev_addr, tusb_desc_interface_t const *p_interface
TU_ASSERT(TUSB_DESC_ENDPOINT == p_endpoint->bDescriptorType);
TU_ASSERT(TUSB_XFER_INTERRUPT == p_endpoint->bmAttributes.xfer);
hub_data[dev_addr-1].pipe_status = hcd_pipe_open(dev_addr, p_endpoint, TUSB_CLASS_HUB);
hub_data[dev_addr-1].pipe_status = hcd_pipe_open(rhport, dev_addr, p_endpoint, TUSB_CLASS_HUB);
TU_ASSERT( pipehandle_is_valid(hub_data[dev_addr-1].pipe_status) );
hub_data[dev_addr-1].interface_number = p_interface_desc->bInterfaceNumber;
@ -226,7 +226,7 @@ void hub_isr(pipe_handle_t pipe_hdl, xfer_result_t event, uint32_t xferred_bytes
{
hcd_event_t event =
{
.rhport = _usbh_devices[pipe_hdl.dev_addr].core_id,
.rhport = _usbh_devices[pipe_hdl.dev_addr].rhport,
.event_id = HCD_EVENT_DEVICE_ATTACH
};

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@ -195,7 +195,7 @@ tusb_error_t hub_status_pipe_queue(uint8_t dev_addr);
#ifdef _TINY_USB_SOURCE_FILE_
void hub_init(void);
bool hub_open_subtask(uint8_t dev_addr, tusb_desc_interface_t const *p_interface_desc, uint16_t *p_length) ATTR_WARN_UNUSED_RESULT;
bool hub_open_subtask(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *p_interface_desc, uint16_t *p_length) ATTR_WARN_UNUSED_RESULT;
void hub_isr(pipe_handle_t pipe_hdl, xfer_result_t event, uint32_t xferred_bytes);
void hub_close(uint8_t dev_addr);

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@ -193,7 +193,7 @@ bool usbh_init(void)
bool usbh_control_xfer (uint8_t dev_addr, tusb_control_request_t* request, uint8_t* data)
{
usbh_device_t* dev = &_usbh_devices[dev_addr];
const uint8_t rhport = dev->core_id;
const uint8_t rhport = dev->rhport;
TU_ASSERT(osal_mutex_lock(dev->control.mutex_hdl, OSAL_TIMEOUT_NORMAL));
@ -242,14 +242,14 @@ tusb_error_t usbh_pipe_control_open(uint8_t dev_addr, uint8_t max_packet_size)
.bInterval = 0
};
hcd_edpt_open(_usbh_devices[dev_addr].core_id, dev_addr, &ep0_desc);
hcd_edpt_open(_usbh_devices[dev_addr].rhport, dev_addr, &ep0_desc);
return TUSB_ERROR_NONE;
}
static inline tusb_error_t usbh_pipe_control_close(uint8_t dev_addr)
{
hcd_edpt_close(_usbh_devices[dev_addr].core_id, dev_addr, 0);
hcd_edpt_close(_usbh_devices[dev_addr].rhport, dev_addr, 0);
return TUSB_ERROR_NONE;
}
@ -338,7 +338,7 @@ static void usbh_device_unplugged(uint8_t hostid, uint8_t hub_addr, uint8_t hub_
//------------- find the all devices (star-network) under port that is unplugged -------------//
for (uint8_t dev_addr = 0; dev_addr <= CFG_TUSB_HOST_DEVICE_MAX; dev_addr ++)
{
if (_usbh_devices[dev_addr].core_id == hostid &&
if (_usbh_devices[dev_addr].rhport == hostid &&
(hub_addr == 0 || _usbh_devices[dev_addr].hub_addr == hub_addr) && // hub_addr == 0 & hub_port == 0 means roothub
(hub_port == 0 || _usbh_devices[dev_addr].hub_port == hub_port) &&
_usbh_devices[dev_addr].state != TUSB_DEVICE_STATE_UNPLUG)
@ -365,7 +365,7 @@ static void usbh_device_unplugged(uint8_t hostid, uint8_t hub_addr, uint8_t hub_
}
}
if (is_found) hcd_port_unplug(_usbh_devices[0].core_id); // TODO hack
if (is_found) hcd_port_unplug(_usbh_devices[0].rhport); // TODO hack
}
@ -393,7 +393,7 @@ bool enum_task(hcd_event_t* event)
usbh_device_t* dev0 = &_usbh_devices[0];
tusb_control_request_t request;
dev0->core_id = event->rhport; // TODO refractor integrate to device_pool
dev0->rhport = event->rhport; // TODO refractor integrate to device_pool
dev0->hub_addr = event->attach.hub_addr;
dev0->hub_port = event->attach.hub_port;
dev0->state = TUSB_DEVICE_STATE_UNPLUG;
@ -401,23 +401,23 @@ bool enum_task(hcd_event_t* event)
//------------- connected/disconnected directly with roothub -------------//
if ( dev0->hub_addr == 0)
{
if( hcd_port_connect_status(dev0->core_id) )
if( hcd_port_connect_status(dev0->rhport) )
{
// connection event
osal_task_delay(POWER_STABLE_DELAY); // wait until device is stable. Increase this if the first 8 bytes is failed to get
// exit if device unplugged while delaying
if ( !hcd_port_connect_status(dev0->core_id) ) return true;
if ( !hcd_port_connect_status(dev0->rhport) ) return true;
hcd_port_reset( dev0->core_id ); // port must be reset to have correct speed operation
hcd_port_reset( dev0->rhport ); // port must be reset to have correct speed operation
osal_task_delay(RESET_DELAY);
dev0->speed = hcd_port_speed_get( dev0->core_id );
dev0->speed = hcd_port_speed_get( dev0->rhport );
}
else
{
// disconnection event
usbh_device_unplugged(dev0->core_id, 0, 0);
usbh_device_unplugged(dev0->rhport, 0, 0);
return true; // restart task
}
}
@ -447,7 +447,7 @@ bool enum_task(hcd_event_t* event)
if ( ! p_port_status->status_current.connect_status )
{
// Disconnection event
usbh_device_unplugged(dev0->core_id, dev0->hub_addr, dev0->hub_port);
usbh_device_unplugged(dev0->rhport, dev0->hub_addr, dev0->hub_port);
(void) hub_status_pipe_queue( dev0->hub_addr ); // done with hub, waiting for next data on status pipe
return true; // restart task
@ -484,7 +484,7 @@ bool enum_task(hcd_event_t* event)
{
// connected directly to roothub
TU_ASSERT(is_ok); // TODO some slow device is observed to fail the very fist controller xfer, can try more times
hcd_port_reset( dev0->core_id ); // reset port after 8 byte descriptor
hcd_port_reset( dev0->rhport ); // reset port after 8 byte descriptor
osal_task_delay(RESET_DELAY);
}
#if CFG_TUH_HUB
@ -518,7 +518,7 @@ bool enum_task(hcd_event_t* event)
//------------- update port info & close control pipe of addr0 -------------//
usbh_device_t* new_dev = &_usbh_devices[new_addr];
new_dev->core_id = dev0->core_id;
new_dev->rhport = dev0->rhport;
new_dev->hub_addr = dev0->hub_addr;
new_dev->hub_port = dev0->hub_port;
new_dev->speed = dev0->speed;
@ -606,7 +606,7 @@ bool enum_task(hcd_event_t* event)
static uint16_t length;
length = 0;
if ( usbh_class_drivers[class_index].open_subtask(new_addr, (tusb_desc_interface_t*) p_desc, &length) )
if ( usbh_class_drivers[class_index].open_subtask(new_dev->rhport, new_addr, (tusb_desc_interface_t*) p_desc, &length) )
{
TU_ASSERT( length >= sizeof(tusb_desc_interface_t) );
new_dev->flag_supported_class |= BIT_(class_index);

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@ -65,7 +65,7 @@ typedef enum tusb_interface_status_{
typedef struct {
void (* const init) (void);
bool (* const open_subtask)(uint8_t, tusb_desc_interface_t const *, uint16_t*);
bool (* const open_subtask)(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *, uint16_t* outlen);
void (* const isr) (pipe_handle_t, xfer_result_t, uint32_t);
void (* const close) (uint8_t);
} host_class_driver_t;

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@ -57,7 +57,7 @@
//--------------------------------------------------------------------+
typedef struct {
//------------- port -------------//
uint8_t core_id;
uint8_t rhport;
uint8_t hub_addr;
uint8_t hub_port;
uint8_t speed;

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@ -69,7 +69,7 @@ static inline void helper_usbh_init_expect(void)
static inline void helper_usbh_device_emulate(uint8_t dev_addr, uint8_t hub_addr, uint8_t hub_port, uint8_t hostid, tusb_speed_t speed)
{
_usbh_devices[dev_addr].core_id = hostid;
_usbh_devices[dev_addr].rhport = hostid;
_usbh_devices[dev_addr].hub_addr = hub_addr;
_usbh_devices[dev_addr].hub_port = hub_port;
_usbh_devices[dev_addr].speed = speed;

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@ -55,7 +55,7 @@ extern usbh_device_t _usbh_devices[CFG_TUSB_HOST_DEVICE_MAX+1];
extern uint8_t enum_data_buffer[CFG_TUSB_HOST_ENUM_BUFFER_SIZE];
usbh_enumerate_t const enum_connect = {
.core_id = 0,
.rhport = 0,
.hub_addr = 0,
.hub_port = 0,
};
@ -82,12 +82,12 @@ void setUp(void)
osal_mutex_release_IgnoreAndReturn(TUSB_ERROR_NONE);
hcd_pipe_control_xfer_StubWithCallback(control_xfer_stub);
hcd_port_connect_status_ExpectAndReturn(enum_connect.core_id, true);
hcd_port_connect_status_ExpectAndReturn(enum_connect.rhport, true);
osal_task_delay_Expect(POWER_STABLE_DELAY);
hcd_port_connect_status_ExpectAndReturn(enum_connect.core_id, true);
hcd_port_reset_Expect(enum_connect.core_id);
hcd_port_connect_status_ExpectAndReturn(enum_connect.rhport, true);
hcd_port_reset_Expect(enum_connect.rhport);
osal_task_delay_Expect(RESET_DELAY);
hcd_port_speed_get_ExpectAndReturn(enum_connect.core_id, device_speed);
hcd_port_speed_get_ExpectAndReturn(enum_connect.rhport, device_speed);
osal_semaphore_reset_Expect( _usbh_devices[0].control.sem_hdl );
osal_mutex_reset_Expect( _usbh_devices[0].control.mutex_hdl );
@ -229,7 +229,7 @@ void test_addr0_failed_dev_desc(void)
void test_addr0_failed_set_address(void)
{
osal_semaphore_wait_StubWithCallback(semaphore_wait_timeout_stub(1));
hcd_port_reset_Expect( _usbh_devices[0].core_id );
hcd_port_reset_Expect( _usbh_devices[0].rhport );
osal_task_delay_Expect(RESET_DELAY);
// tusbh_device_mount_failed_cb_Expect(TUSB_ERROR_USBH_MOUNT_DEVICE_NOT_RESPOND, NULL);
@ -242,7 +242,7 @@ void test_addr0_failed_set_address(void)
void test_enum_failed_get_full_dev_desc(void)
{
osal_semaphore_wait_StubWithCallback(semaphore_wait_timeout_stub(2));
hcd_port_reset_Expect( _usbh_devices[0].core_id );
hcd_port_reset_Expect( _usbh_devices[0].rhport );
osal_task_delay_Expect(RESET_DELAY);
hcd_pipe_control_close_ExpectAndReturn(0, TUSB_ERROR_NONE);
@ -256,7 +256,7 @@ void test_enum_failed_get_full_dev_desc(void)
TEST_ASSERT_EQUAL(TUSB_DEVICE_STATE_UNPLUG, _usbh_devices[0].state);
TEST_ASSERT_EQUAL(TUSB_DEVICE_STATE_ADDRESSED, _usbh_devices[1].state);
TEST_ASSERT_EQUAL(TUSB_SPEED_FULL, _usbh_devices[1].speed);
TEST_ASSERT_EQUAL(enum_connect.core_id, _usbh_devices[1].core_id);
TEST_ASSERT_EQUAL(enum_connect.rhport, _usbh_devices[1].rhport);
TEST_ASSERT_EQUAL(enum_connect.hub_addr, _usbh_devices[1].hub_addr);
TEST_ASSERT_EQUAL(enum_connect.hub_port, _usbh_devices[1].hub_port);
}
@ -264,7 +264,7 @@ void test_enum_failed_get_full_dev_desc(void)
void test_enum_failed_get_9byte_config_desc(void)
{
osal_semaphore_wait_StubWithCallback(semaphore_wait_timeout_stub(3));
hcd_port_reset_Expect( _usbh_devices[0].core_id );
hcd_port_reset_Expect( _usbh_devices[0].rhport );
osal_task_delay_Expect(RESET_DELAY);
hcd_pipe_control_close_ExpectAndReturn(0, TUSB_ERROR_NONE);
osal_semaphore_reset_Expect( _usbh_devices[0].control.sem_hdl );
@ -284,7 +284,7 @@ void test_enum_failed_get_9byte_config_desc(void)
void test_enum_failed_get_full_config_desc(void)
{
osal_semaphore_wait_StubWithCallback(semaphore_wait_timeout_stub(4));
hcd_port_reset_Expect( _usbh_devices[0].core_id );
hcd_port_reset_Expect( _usbh_devices[0].rhport );
osal_task_delay_Expect(RESET_DELAY);
hcd_pipe_control_close_ExpectAndReturn(0, TUSB_ERROR_NONE);
osal_semaphore_reset_Expect( _usbh_devices[0].control.sem_hdl );
@ -299,7 +299,7 @@ void test_enum_failed_get_full_config_desc(void)
void test_enum_parse_config_desc(void)
{
osal_semaphore_wait_StubWithCallback(semaphore_wait_timeout_stub(5));
hcd_port_reset_Expect( _usbh_devices[0].core_id );
hcd_port_reset_Expect( _usbh_devices[0].rhport );
osal_task_delay_Expect(RESET_DELAY);
hcd_pipe_control_close_ExpectAndReturn(0, TUSB_ERROR_NONE);
osal_semaphore_reset_Expect( _usbh_devices[0].control.sem_hdl );
@ -317,7 +317,7 @@ void test_enum_parse_config_desc(void)
void test_enum_set_configure(void)
{
osal_semaphore_wait_StubWithCallback(semaphore_wait_timeout_stub(6));
hcd_port_reset_Expect( _usbh_devices[0].core_id );
hcd_port_reset_Expect( _usbh_devices[0].rhport );
osal_task_delay_Expect(RESET_DELAY);
hcd_pipe_control_close_ExpectAndReturn(0, TUSB_ERROR_NONE);
osal_semaphore_reset_Expect( _usbh_devices[0].control.sem_hdl );

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@ -67,7 +67,7 @@ void ehci_controller_init(void)
void ehci_controller_control_xfer_proceed(uint8_t dev_addr, uint8_t p_data[])
{
ehci_registers_t* const regs = get_operational_register( _usbh_devices[dev_addr].core_id );
ehci_registers_t* const regs = get_operational_register( _usbh_devices[dev_addr].rhport );
ehci_qhd_t * p_qhd = get_control_qhd(dev_addr);
ehci_qtd_t * p_qtd_setup = get_control_qtds(dev_addr);
ehci_qtd_t * p_qtd_data = p_qtd_setup + 1;
@ -86,7 +86,7 @@ void ehci_controller_control_xfer_proceed(uint8_t dev_addr, uint8_t p_data[])
regs->usb_sts = EHCI_INT_MASK_NXP_ASYNC | EHCI_INT_MASK_NXP_PERIODIC;
hcd_isr( _usbh_devices[dev_addr].core_id );
hcd_isr( _usbh_devices[dev_addr].rhport );
}
void complete_qtd_in_qhd(ehci_qhd_t *p_qhd)