Merge pull request #1062 from HiFiPhile/fifo_dcd_transdimension
Improvements for dcd_transdimension
This commit is contained in:
Ha Thach
GitHub
commit
03866ddf9b
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@ -1041,6 +1041,7 @@ static bool process_get_descriptor(uint8_t rhport, tusb_control_request_t const
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break;
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case TUSB_DESC_DEVICE_QUALIFIER:
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{
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TU_LOG2(" Device Qualifier\r\n");
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TU_VERIFY( tud_descriptor_device_qualifier_cb );
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@ -1050,6 +1051,7 @@ static bool process_get_descriptor(uint8_t rhport, tusb_control_request_t const
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// first byte of descriptor is its size
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return tud_control_xfer(rhport, p_request, (void*) desc_qualifier, desc_qualifier[0]);
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}
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break;
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default: return false;
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@ -1377,7 +1379,13 @@ void usbd_edpt_close(uint8_t rhport, uint8_t ep_addr)
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TU_ASSERT(dcd_edpt_close, /**/);
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TU_LOG2(" CLOSING Endpoint: 0x%02X\r\n", ep_addr);
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uint8_t const epnum = tu_edpt_number(ep_addr);
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uint8_t const dir = tu_edpt_dir(ep_addr);
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dcd_edpt_close(rhport, ep_addr);
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_usbd_dev.ep_status[epnum][dir].stalled = false;
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_usbd_dev.ep_status[epnum][dir].busy = false;
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_usbd_dev.ep_status[epnum][dir].claimed = false;
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return;
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}
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@ -134,7 +134,8 @@ typedef struct
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// QHD is 64 bytes aligned but occupies only 48 bytes
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// Therefore there are 16 bytes padding that we can use.
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//--------------------------------------------------------------------+
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uint8_t reserved[16];
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tu_fifo_t * ff;
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uint8_t reserved[12];
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} dcd_qhd_t;
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TU_VERIFY_STATIC( sizeof(dcd_qhd_t) == 64, "size is not correct");
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@ -240,8 +241,9 @@ void dcd_init(uint8_t rhport)
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dcd_reg->USBMODE = USBMODE_CM_DEVICE;
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dcd_reg->OTGSC = OTGSC_VBUS_DISCHARGE | OTGSC_OTG_TERMINATION;
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// TODO Force fullspeed on non-highspeed port
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// dcd_reg->PORTSC1 = PORTSC1_FORCE_FULL_SPEED;
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#if !TUD_OPT_HIGH_SPEED
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dcd_reg->PORTSC1 = PORTSC1_FORCE_FULL_SPEED;
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#endif
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CleanInvalidateDCache_by_Addr((uint32_t*) &_dcd_data, sizeof(dcd_data_t));
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@ -296,18 +298,30 @@ void dcd_disconnect(uint8_t rhport)
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static void qtd_init(dcd_qtd_t* p_qtd, void * data_ptr, uint16_t total_bytes)
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{
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// Force the CPU to flush the buffer. We increase the size by 31 because the call aligns the
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// address to 32-byte boundaries. Buffer must be word aligned
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CleanInvalidateDCache_by_Addr((uint32_t*) tu_align((uint32_t) data_ptr, 4), total_bytes + 31);
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tu_memclr(p_qtd, sizeof(dcd_qtd_t));
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p_qtd->next = QTD_NEXT_INVALID;
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p_qtd->active = 1;
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p_qtd->total_bytes = p_qtd->expected_bytes = total_bytes;
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p_qtd->next = QTD_NEXT_INVALID;
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p_qtd->active = 1;
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p_qtd->total_bytes = p_qtd->expected_bytes = total_bytes;
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p_qtd->int_on_complete = true;
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if (data_ptr != NULL)
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{
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p_qtd->buffer[0] = (uint32_t) data_ptr;
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p_qtd->buffer[0] = (uint32_t) data_ptr;
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uint32_t const bufend = p_qtd->buffer[0] + total_bytes;
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for(uint8_t i=1; i<5; i++)
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{
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p_qtd->buffer[i] |= tu_align4k( p_qtd->buffer[i-1] ) + 4096;
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uint32_t const next_page = tu_align4k( p_qtd->buffer[i-1] ) + 4096;
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if ( bufend <= next_page ) break;
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p_qtd->buffer[i] = next_page;
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// TODO page[1] FRAME_N for ISO transfer
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}
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}
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}
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@ -340,9 +354,6 @@ void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr)
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bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc)
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{
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// TODO not support ISO yet
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TU_VERIFY ( p_endpoint_desc->bmAttributes.xfer != TUSB_XFER_ISOCHRONOUS);
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uint8_t const epnum = tu_edpt_number(p_endpoint_desc->bEndpointAddress);
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uint8_t const dir = tu_edpt_dir(p_endpoint_desc->bEndpointAddress);
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@ -355,13 +366,27 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc)
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p_qhd->zero_length_termination = 1;
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p_qhd->max_packet_size = p_endpoint_desc->wMaxPacketSize.size;
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if (p_endpoint_desc->bmAttributes.xfer == TUSB_XFER_ISOCHRONOUS)
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{
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p_qhd->iso_mult = 1;
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}
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p_qhd->qtd_overlay.next = QTD_NEXT_INVALID;
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CleanInvalidateDCache_by_Addr((uint32_t*) &_dcd_data, sizeof(dcd_data_t));
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// Enable EP Control
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dcd_registers_t* dcd_reg = _dcd_controller[rhport].regs;
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dcd_reg->ENDPTCTRL[epnum] |= ((p_endpoint_desc->bmAttributes.xfer << 2) | ENDPTCTRL_ENABLE | ENDPTCTRL_TOGGLE_RESET) << (dir ? 16 : 0);
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uint32_t const epctrl = (p_endpoint_desc->bmAttributes.xfer << ENDPTCTRL_TYPE_POS) | ENDPTCTRL_ENABLE | ENDPTCTRL_TOGGLE_RESET;
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if ( dir == TUSB_DIR_OUT )
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{
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dcd_reg->ENDPTCTRL[epnum] = (dcd_reg->ENDPTCTRL[epnum] & 0xFFFF0000u) | epctrl;
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}else
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{
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dcd_reg->ENDPTCTRL[epnum] = (dcd_reg->ENDPTCTRL[epnum] & 0x0000FFFFu) | (epctrl << 16);
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}
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return true;
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}
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@ -381,11 +406,35 @@ void dcd_edpt_close_all (uint8_t rhport)
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}
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}
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bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes)
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void dcd_edpt_close(uint8_t rhport, uint8_t ep_addr)
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{
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uint8_t const epnum = tu_edpt_number(ep_addr);
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uint8_t const dir = tu_edpt_dir(ep_addr);
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dcd_registers_t* dcd_reg = _dcd_controller[rhport].regs;
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_dcd_data.qhd[epnum][dir].qtd_overlay.halted = 1;
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// Flush EP
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uint32_t const flush_mask = TU_BIT(epnum + (dir ? 16 : 0));
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dcd_reg->ENDPTFLUSH = flush_mask;
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while(dcd_reg->ENDPTFLUSH & flush_mask);
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// Clear EP enable
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dcd_reg->ENDPTCTRL[epnum] &=~(ENDPTCTRL_ENABLE << (dir ? 16 : 0));
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}
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static void qhd_start_xfer(uint8_t rhport, uint8_t epnum, uint8_t dir)
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{
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dcd_registers_t* dcd_reg = _dcd_controller[rhport].regs;
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uint8_t const epnum = tu_edpt_number(ep_addr);
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uint8_t const dir = tu_edpt_dir(ep_addr);
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dcd_qhd_t* p_qhd = &_dcd_data.qhd[epnum][dir];
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dcd_qtd_t* p_qtd = &_dcd_data.qtd[epnum][dir];
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p_qhd->qtd_overlay.halted = false; // clear any previous error
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p_qhd->qtd_overlay.next = (uint32_t) p_qtd; // link qtd to qhd
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// flush cache
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CleanInvalidateDCache_by_Addr((uint32_t*) &_dcd_data, sizeof(dcd_data_t));
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if ( epnum == 0 )
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{
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@ -394,25 +443,87 @@ bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t t
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while(dcd_reg->ENDPTSETUPSTAT & TU_BIT(0)) {}
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}
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// start transfer
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dcd_reg->ENDPTPRIME = TU_BIT(epnum + (dir ? 16 : 0));
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}
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bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes)
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{
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uint8_t const epnum = tu_edpt_number(ep_addr);
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uint8_t const dir = tu_edpt_dir(ep_addr);
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dcd_qhd_t* p_qhd = &_dcd_data.qhd[epnum][dir];
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dcd_qtd_t* p_qtd = &_dcd_data.qtd[epnum][dir];
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// Prepare qtd
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qtd_init(p_qtd, buffer, total_bytes);
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// Start qhd transfer
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p_qhd->ff = NULL;
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qhd_start_xfer(rhport, epnum, dir);
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return true;
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}
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// fifo has to be aligned to 4k boundary
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bool dcd_edpt_xfer_fifo (uint8_t rhport, uint8_t ep_addr, tu_fifo_t * ff, uint16_t total_bytes)
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{
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uint8_t const epnum = tu_edpt_number(ep_addr);
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uint8_t const dir = tu_edpt_dir(ep_addr);
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dcd_qhd_t * p_qhd = &_dcd_data.qhd[epnum][dir];
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dcd_qtd_t * p_qtd = &_dcd_data.qtd[epnum][dir];
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// Force the CPU to flush the buffer. We increase the size by 32 because the call aligns the
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// address to 32-byte boundaries.
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// void* cast to suppress cast-align warning, buffer must be
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CleanInvalidateDCache_by_Addr((uint32_t*) tu_align((uint32_t) buffer, 4), total_bytes + 31);
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tu_fifo_buffer_info_t fifo_info;
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//------------- Prepare qtd -------------//
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qtd_init(p_qtd, buffer, total_bytes);
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p_qtd->int_on_complete = true;
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if (dir)
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{
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tu_fifo_get_read_info(ff, &fifo_info);
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} else
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{
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tu_fifo_get_write_info(ff, &fifo_info);
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}
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p_qhd->qtd_overlay.halted = false; // clear any previous error
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p_qhd->qtd_overlay.next = (uint32_t) p_qtd; // activate by linking qtd to qhd
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if ( fifo_info.len_lin >= total_bytes )
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{
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// Linear length is enough for this transfer
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qtd_init(p_qtd, fifo_info.ptr_lin, total_bytes);
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}
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else
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{
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// linear part is not enough
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CleanInvalidateDCache_by_Addr((uint32_t*) &_dcd_data, sizeof(dcd_data_t));
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// prepare TD up to linear length
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qtd_init(p_qtd, fifo_info.ptr_lin, fifo_info.len_lin);
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// start transfer
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dcd_reg->ENDPTPRIME = TU_BIT(epnum + (dir ? 16 : 0));
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if ( !tu_offset4k((uint32_t) fifo_info.ptr_wrap) && !tu_offset4k(tu_fifo_depth(ff)) )
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{
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// If buffer is aligned to 4K & buffer size is multiple of 4K
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// We can make use of buffer page array to also combine the linear + wrapped length
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p_qtd->total_bytes = p_qtd->expected_bytes = total_bytes;
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for(uint8_t i = 1, page = 0; i < 5; i++)
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{
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// pick up buffer array where linear ends
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if (p_qtd->buffer[i] == 0)
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{
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p_qtd->buffer[i] = (uint32_t) fifo_info.ptr_wrap + 4096 * page;
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page++;
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}
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}
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CleanInvalidateDCache_by_Addr((uint32_t*) tu_align((uint32_t) fifo_info.ptr_wrap, 4), total_bytes - fifo_info.len_wrap + 31);
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}
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else
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{
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// TODO we may need to carry the wrapped length after the linear part complete
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// for now only transfer up to linear part
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}
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}
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// Start qhd transfer
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p_qhd->ff = ff;
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qhd_start_xfer(rhport, epnum, dir);
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return true;
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}
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@ -423,6 +534,7 @@ bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t t
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static void process_edpt_complete_isr(uint8_t rhport, uint8_t epnum, uint8_t dir)
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{
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dcd_qhd_t * p_qhd = &_dcd_data.qhd[epnum][dir];
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dcd_qtd_t * p_qtd = &_dcd_data.qtd[epnum][dir];
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uint8_t result = p_qtd->halted ? XFER_RESULT_STALLED :
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@ -435,8 +547,21 @@ static void process_edpt_complete_isr(uint8_t rhport, uint8_t epnum, uint8_t dir
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dcd_reg->ENDPTFLUSH = TU_BIT(epnum + (dir ? 16 : 0));
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}
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uint16_t const xferred_bytes = p_qtd->expected_bytes - p_qtd->total_bytes;
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if (p_qhd->ff)
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{
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if (dir == TUSB_DIR_IN)
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{
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tu_fifo_advance_read_pointer(p_qhd->ff, xferred_bytes);
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} else
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{
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tu_fifo_advance_write_pointer(p_qhd->ff, xferred_bytes);
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}
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}
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// only number of bytes in the IOC qtd
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dcd_event_xfer_complete(rhport, tu_edpt_addr(epnum, dir), p_qtd->expected_bytes - p_qtd->total_bytes, result, true);
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dcd_event_xfer_complete(rhport, tu_edpt_addr(epnum, dir), xferred_bytes, result, true);
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}
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void dcd_int_handler(uint8_t rhport)
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