kingkevin
/
esp32-s2_dfu
1
0
Fork 0
Code Issues Releases Activity

update descriptor, enhance ep in transfer

This commit is contained in:
hathach 2019-12-09 22:48:35 +07:00
parent 759fa76280
commit 0316e0ecd4
2 changed files with 56 additions and 23 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

34
examples/device/cdc_msc/src/usb_descriptors.c
View File

@ -86,12 +86,32 @@ enum
#if CFG_TUSB_MCU == OPT_MCU_LPC175X_6X || CFG_TUSB_MCU == OPT_MCU_LPC177X_8X || CFG_TUSB_MCU == OPT_MCU_LPC40XX
// LPC 17xx and 40xx endpoint type (bulk/interrupt/iso) are fixed by its number
// 0 control, 1 In, 2 Bulk, 3 Iso, 4 In etc ...
// Note: since CDC EP ( 1 & 2), HID (4) are spot-on, thus we only need to force
// endpoint number for MSC to 5
#define EPNUM_MSC 0x05
// 0 control, 1 In, 2 Bulk, 3 Iso, 4 In, 5 Bulk etc ...
#define EPNUM_CDC_NOTIF 0x81
#define EPNUM_CDC_OUT 0x02
#define EPNUM_CDC_IN 0x82
#define EPNUM_MSC_OUT 0x05
#define EPNUM_MSC_IN 0x85
#elif CFG_TUSB_MCU == OPT_MCU_SAMG
// SAMG doesn't support a same endpoint number with IN and OUT
// e.g EP1 OUT & EP1 IN cannot exist together
#define EPNUM_CDC_NOTIF 0x81
#define EPNUM_CDC_OUT 0x02
#define EPNUM_CDC_IN 0x83
#define EPNUM_MSC_OUT 0x04
#define EPNUM_MSC_IN 0x85
#else
#define EPNUM_MSC 0x03
#define EPNUM_CDC_NOTIF 0x81
#define EPNUM_CDC_OUT 0x02
#define EPNUM_CDC_IN 0x82
#define EPNUM_MSC_OUT 0x03
#define EPNUM_MSC_IN 0x83
#endif
uint8_t const desc_configuration[] =
@ -100,10 +120,10 @@ uint8_t const desc_configuration[] =
TUD_CONFIG_DESCRIPTOR(ITF_NUM_TOTAL, 0, CONFIG_TOTAL_LEN, TUSB_DESC_CONFIG_ATT_REMOTE_WAKEUP, 100),
// Interface number, string index, EP notification address and size, EP data address (out, in) and size.
TUD_CDC_DESCRIPTOR(ITF_NUM_CDC, 4, 0x81, 8, 0x02, 0x82, 64),
TUD_CDC_DESCRIPTOR(ITF_NUM_CDC, 4, EPNUM_CDC_NOTIF, 8, EPNUM_CDC_OUT, EPNUM_CDC_IN, 64),
// Interface number, string index, EP Out & EP In address, EP size
TUD_MSC_DESCRIPTOR(ITF_NUM_MSC, 5, EPNUM_MSC, 0x80 | EPNUM_MSC, (CFG_TUSB_RHPORT0_MODE & OPT_MODE_HIGH_SPEED) ? 512 : 64),
TUD_MSC_DESCRIPTOR(ITF_NUM_MSC, 5, EPNUM_MSC_OUT, EPNUM_MSC_IN, (CFG_TUSB_RHPORT0_MODE & OPT_MODE_HIGH_SPEED) ? 512 : 64),
};

45
src/portable/microchip/samg/dcd_samg.c
View File

@ -70,6 +70,17 @@ void xfer_packet_done(xfer_desc_t* xfer)
xfer->actual_len += xact_len;
}
//------------- Transaction helpers -------------//
static uint16_t xact_in(uint8_t epnum, xfer_desc_t* xfer)
{
uint16_t const xact_len = xfer_packet_len(xfer);
// Write data to fifo
for(uint16_t i=0; i<xact_len; i++) UDP->UDP_FDR[epnum] = (uint32_t) xfer->buffer[i];
return xact_len;
}
/*------------------------------------------------------------------*/
/* Device API
*------------------------------------------------------------------*/
@ -165,7 +176,7 @@ void dcd_edpt0_status_complete(uint8_t rhport, tusb_control_request_t const * re
}
// Configure endpoint's registers according to descriptor
// SAMG doesnt support using a same endpoint with IN and OUT
// SAMG doesn't support a same endpoint number with IN and OUT
// e.g EP1 OUT & EP1 IN cannot exist together
bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * ep_desc)
{
@ -201,31 +212,26 @@ bool dcd_edpt_xfer (uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t
xfer_desc_t* xfer = &_dcd_xfer[epnum];
xfer_begin(xfer, buffer, total_bytes);
uint16_t const xact_len = xfer_packet_len(xfer);
// control endpoint
// Configure DIR bit for control endpoint
if ( epnum == 0 )
{
if (dir == TUSB_DIR_OUT)
{
// Clear DIR bit
UDP->UDP_CSR[0] &= ~UDP_CSR_DIR_Msk;
}else
{
// Set DIR bit if needed
// Set DIR bit
UDP->UDP_CSR[0] |= UDP_CSR_DIR_Msk;
// Write data to fifo
for(uint16_t i=0; i<xact_len; i++) UDP->UDP_FDR[0] = (uint32_t) buffer[i];
// TX ready for transfer
UDP->UDP_CSR[0] |= UDP_CSR_TXPKTRDY_Msk;
}
}
}else
if (dir == TUSB_DIR_IN)
{
return false;
xact_in(epnum, xfer);
// TX ready for transfer
UDP->UDP_CSR[epnum] |= UDP_CSR_TXPKTRDY_Msk;
}
return true;
@ -312,10 +318,17 @@ void dcd_isr(uint8_t rhport)
// Endpoint IN
if (UDP->UDP_CSR[epnum] & UDP_CSR_TXCOMP_Msk)
{
uint16_t xact_len = xfer_packet_len(xfer);
xfer_packet_done(xfer);
dcd_event_xfer_complete(rhport, epnum | TUSB_DIR_IN_MASK, xact_len, XFER_RESULT_SUCCESS, true);
if ( xact_in(epnum, xfer) )
{
// TX ready for transfer
UDP->UDP_CSR[epnum] |= UDP_CSR_TXPKTRDY_Msk;
}else
{
// xfer is complete
dcd_event_xfer_complete(rhport, epnum | TUSB_DIR_IN_MASK, xfer->actual_len, XFER_RESULT_SUCCESS, true);
}
// Clear TX Complete bit
UDP->UDP_CSR[0] &= ~UDP_CSR_TXCOMP_Msk;