2019-09-09 19:38:10 +02:00
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/**
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******************************************************************************
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* @file dcd_stm32f0_pvt_st.h
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* @brief DCD utilities from ST code
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******************************************************************************
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* @attention
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*
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* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
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* <h2><center>© parts COPYRIGHT(c) N Conrad</center></h2>
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* 3. Neither the name of STMicroelectronics nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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**********/
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// This file contains source copied from ST's HAL, and thus should have their copyright statement.
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2019-09-09 22:14:38 +02:00
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// PMA_LENGTH is PMA buffer size in bytes.
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2019-09-10 07:03:24 +02:00
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// On 512-byte devices, access with a stride of two words (use every other 16-bit address)
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// On 1024-byte devices, access with a stride of one word (use every 16-bit address)
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2019-09-09 22:14:38 +02:00
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2019-09-10 07:03:24 +02:00
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#ifndef PORTABLE_ST_STM32F0_DCD_STM32F0_FSDEV_PVT_ST_H_
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#define PORTABLE_ST_STM32F0_DCD_STM32F0_FSDEV_PVT_ST_H_
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#if defined(STM32F042x6) | \
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defined(STM32F070x6) | defined(STM32F070xB) | \
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defined(STM32F072xB) | \
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defined(STM32F078xx)
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2019-09-09 22:14:38 +02:00
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#include "stm32f0xx.h"
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#define PMA_LENGTH 1024
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2019-09-10 07:03:24 +02:00
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// F0x2 models are crystal-less
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// All have internal D+ pull-up
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// 070RB: 2 x 16 bits/word memory LPM Support, BCD Support
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// PMA dedicated to USB (no sharing with CAN)
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#elif defined(STM32F102x6) | defined(STM32F102x6) | \
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defined(STM32F103x6) | defined(STM32F103xB) | \
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defined(STM32F103xE) | defined(STM32F103xB)
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#include "stm32f1xx.h"
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#define PMA_LENGTH 512u
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// NO internal Pull-ups
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// *B, and *C: 2 x 16 bits/word
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#error The F102/F103 driver is expected not to work, but it might? Try it?
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#elif defined(STM32F302xB) | defined(STM32F302xC) | \
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2019-09-10 07:31:14 +02:00
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defined(STM32F303xB) | defined(STM32F303xC) | \
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2019-09-10 07:03:24 +02:00
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defined(STM32F373xC)
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#include "stm32f3xx.h"
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#define PMA_LENGTH 512u
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// NO internal Pull-ups
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// *B, and *C: 1 x 16 bits/word
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// PMA dedicated to USB (no sharing with CAN)
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#elif defined(STM32F302x6) | defined(STM32F302x8) | \
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defined(STM32F302xD) | defined(STM32F302xE) | \
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2019-09-10 07:31:14 +02:00
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defined(STM32F303xD) | defined(STM32F303xE) | \
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2019-09-09 22:14:38 +02:00
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#include "stm32f3xx.h"
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2019-09-10 07:03:24 +02:00
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#define PMA_LENGTH 1024u
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// NO internal Pull-ups
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// *6, *8, *D, and *E: 2 x 16 bits/word LPM Support
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// When CAN clock is enabled, USB can use first 768 bytes ONLY.
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2019-09-09 22:14:38 +02:00
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#else
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2019-09-10 07:03:24 +02:00
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#error You are using an untested or unimplemented STM32 variant. Please update the driver.
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2019-09-10 18:13:36 +02:00
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// This includes L0x2, L0x3, L1x0, L1x1, L1x2, L4x2 and L4x3, G1x1, G1x3, and G1x4
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2019-09-09 22:14:38 +02:00
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#endif
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2019-09-10 07:03:24 +02:00
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// For purposes of accessing the packet
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#if ((PMA_LENGTH) == 512u)
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# define PMA_STRIDE (2u)
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#elif ((PMA_LENGTH) == 1024u)
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# define PMA_STRIDE (1u)
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#endif
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2019-09-09 22:14:38 +02:00
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2019-09-10 07:03:24 +02:00
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// And for type-safety create a new macro for the volatile address of PMAADDR
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// The compiler should warn us if we cast it to a non-volatile type?
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// Volatile is also needed to prevent the optimizer from changing access to 32-bit (as 32-bit access is forbidden)
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static __IO uint16_t * const pma = (__IO uint16_t*)USB_PMAADDR;
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2019-09-09 19:38:10 +02:00
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/* SetENDPOINT */
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#define PCD_SET_ENDPOINT(USBx, bEpNum,wRegValue) (*((__IO uint16_t *)(((uint32_t)(&(USBx)->EP0R + (bEpNum) * 2U))))= (uint16_t)(wRegValue))
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/* GetENDPOINT */
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#define PCD_GET_ENDPOINT(USBx, bEpNum) (*((__IO uint16_t *)(((uint32_t)(&(USBx)->EP0R + (bEpNum) * 2U)))))
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#define PCD_SET_EPTYPE(USBx, bEpNum,wType) (PCD_SET_ENDPOINT((USBx), (bEpNum),\
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(((((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & ((uint32_t)(USB_EP_T_MASK))) | ((uint32_t)(wType))) | USB_EP_CTR_RX | USB_EP_CTR_TX)))
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#define PCD_GET_EPTYPE(USBx, bEpNum) (((uint16_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EP_T_FIELD)
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/**
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* @brief Clears bit CTR_RX / CTR_TX in the endpoint register.
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* @param USBx USB peripheral instance register address.
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* @param bEpNum Endpoint Number.
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* @retval None
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*/
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#define PCD_CLEAR_RX_EP_CTR(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum),\
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PCD_GET_ENDPOINT((USBx), (bEpNum)) & 0x7FFFU & USB_EPREG_MASK))
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#define PCD_CLEAR_TX_EP_CTR(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum),\
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PCD_GET_ENDPOINT((USBx), (bEpNum)) & 0xFF7FU & USB_EPREG_MASK))
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/**
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* @brief gets counter of the tx buffer.
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* @param USBx USB peripheral instance register address.
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* @param bEpNum Endpoint Number.
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* @retval Counter value
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*/
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2019-09-10 07:03:24 +02:00
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#define PCD_GET_EP_TX_CNT(USBx, bEpNum)((uint16_t)(*PCD_EP_TX_CNT_PTR((USBx), (bEpNum))) & 0x3ffU)
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#define PCD_GET_EP_RX_CNT(USBx, bEpNum)((uint16_t)(*PCD_EP_RX_CNT_PTR((USBx), (bEpNum))) & 0x3ffU)
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2019-09-09 19:38:10 +02:00
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/**
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* @brief Sets counter of rx buffer with no. of blocks.
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* @param dwReg Register
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* @param wCount Counter.
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* @param wNBlocks no. of Blocks.
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* @retval None
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*/
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#define PCD_CALC_BLK32(dwReg,wCount,wNBlocks) {\
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(wNBlocks) = (uint32_t)((wCount) >> 5U);\
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if(((wCount) & 0x1fU) == 0U)\
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{ \
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(wNBlocks)--;\
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} \
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*pdwReg = (uint16_t)((uint16_t)((wNBlocks) << 10U) | (uint16_t)0x8000U); \
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}/* PCD_CALC_BLK32 */
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#define PCD_CALC_BLK2(dwReg,wCount,wNBlocks) {\
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(wNBlocks) = (uint32_t)((wCount) >> 1U); \
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if(((wCount) & 0x1U) != 0U)\
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{ \
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(wNBlocks)++;\
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} \
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*pdwReg = (uint16_t)((wNBlocks) << 10U);\
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}/* PCD_CALC_BLK2 */
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#define PCD_SET_EP_CNT_RX_REG(dwReg,wCount) {\
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uint32_t wNBlocks;\
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if((wCount) > 62U) \
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{ \
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PCD_CALC_BLK32((dwReg),(wCount),wNBlocks) \
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} \
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else \
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{ \
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PCD_CALC_BLK2((dwReg),(wCount),wNBlocks) \
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} \
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}/* PCD_SET_EP_CNT_RX_REG */
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/**
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* @brief Sets address in an endpoint register.
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* @param USBx USB peripheral instance register address.
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* @param bEpNum Endpoint Number.
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* @param bAddr Address.
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* @retval None
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*/
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#define PCD_SET_EP_ADDRESS(USBx, bEpNum,bAddr) PCD_SET_ENDPOINT((USBx), (bEpNum),\
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USB_EP_CTR_RX|USB_EP_CTR_TX|(((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EPREG_MASK) | (bAddr))
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2019-09-10 07:03:24 +02:00
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#define PCD_BTABLE_WORD_PTR(USBx,x) (&(pma[PMA_STRIDE*((((USBx)->BTABLE)>>1) + x)]))
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2019-09-09 19:38:10 +02:00
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2019-09-10 07:03:24 +02:00
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// Pointers to the PMA table entries (using the ARM address space)
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#define PCD_EP_TX_ADDRESS_PTR(USBx, bEpNum) (PCD_BTABLE_WORD_PTR(USBx,(bEpNum)*4u + 0u))
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#define PCD_EP_TX_CNT_PTR(USBx, bEpNum) (PCD_BTABLE_WORD_PTR(USBx,(bEpNum)*4u + 1u))
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2019-09-09 19:38:10 +02:00
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2019-09-10 07:03:24 +02:00
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#define PCD_EP_RX_ADDRESS_PTR(USBx, bEpNum) (PCD_BTABLE_WORD_PTR(USBx,(bEpNum)*4u + 2u))
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#define PCD_EP_RX_CNT_PTR(USBx, bEpNum) (PCD_BTABLE_WORD_PTR(USBx,(bEpNum)*4u + 3u))
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2019-09-09 19:38:10 +02:00
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2019-09-10 07:03:24 +02:00
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#define PCD_SET_EP_TX_CNT(USBx, bEpNum,wCount) (*PCD_EP_TX_CNT_PTR((USBx), (bEpNum)) = (wCount))
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2019-09-09 19:38:10 +02:00
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#define PCD_SET_EP_RX_CNT(USBx, bEpNum,wCount) do {\
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2019-09-10 07:03:24 +02:00
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__IO uint16_t *pdwReg =PCD_EP_RX_CNT_PTR((USBx),(bEpNum)); \
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2019-09-09 19:38:10 +02:00
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PCD_SET_EP_CNT_RX_REG((pdwReg), (wCount))\
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} while(0)
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/**
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* @brief sets the status for tx transfer (bits STAT_TX[1:0]).
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* @param USBx USB peripheral instance register address.
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* @param bEpNum Endpoint Number.
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* @param wState new state
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* @retval None
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*/
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#define PCD_SET_EP_TX_STATUS(USBx, bEpNum, wState) { register uint16_t _wRegVal;\
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\
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_wRegVal = (uint32_t) (((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EPTX_DTOGMASK);\
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/* toggle first bit ? */ \
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if((USB_EPTX_DTOG1 & (wState))!= 0U)\
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{ \
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_wRegVal ^=(uint16_t) USB_EPTX_DTOG1; \
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} \
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/* toggle second bit ? */ \
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if((USB_EPTX_DTOG2 & ((uint32_t)(wState)))!= 0U) \
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{ \
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_wRegVal ^=(uint16_t) USB_EPTX_DTOG2; \
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} \
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PCD_SET_ENDPOINT((USBx), (bEpNum), (((uint32_t)(_wRegVal)) | USB_EP_CTR_RX|USB_EP_CTR_TX));\
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} /* PCD_SET_EP_TX_STATUS */
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/**
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* @brief sets the status for rx transfer (bits STAT_TX[1:0])
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* @param USBx USB peripheral instance register address.
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* @param bEpNum Endpoint Number.
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* @param wState new state
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* @retval None
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*/
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#define PCD_SET_EP_RX_STATUS(USBx, bEpNum,wState) {\
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register uint16_t _wRegVal; \
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\
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_wRegVal = (uint32_t) (((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EPRX_DTOGMASK);\
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/* toggle first bit ? */ \
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if((USB_EPRX_DTOG1 & (wState))!= 0U) \
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{ \
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_wRegVal ^= (uint16_t) USB_EPRX_DTOG1; \
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} \
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/* toggle second bit ? */ \
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if((USB_EPRX_DTOG2 & ((uint32_t)(wState)))!= 0U) \
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{ \
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_wRegVal ^= (uint16_t) USB_EPRX_DTOG2; \
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} \
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PCD_SET_ENDPOINT((USBx), (bEpNum), (((uint32_t)(_wRegVal)) | USB_EP_CTR_RX|USB_EP_CTR_TX)); \
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} /* PCD_SET_EP_RX_STATUS */
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/**
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* @brief Toggles DTOG_RX / DTOG_TX bit in the endpoint register.
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* @param USBx USB peripheral instance register address.
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* @param bEpNum Endpoint Number.
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* @retval None
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*/
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#define PCD_RX_DTOG(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \
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USB_EP_CTR_RX|USB_EP_CTR_TX|USB_EP_DTOG_RX | (((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EPREG_MASK)))
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#define PCD_TX_DTOG(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \
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USB_EP_CTR_RX|USB_EP_CTR_TX|USB_EP_DTOG_TX | (((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EPREG_MASK)))
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/**
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* @brief Clears DTOG_RX / DTOG_TX bit in the endpoint register.
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* @param USBx USB peripheral instance register address.
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* @param bEpNum Endpoint Number.
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* @retval None
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*/
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#define PCD_CLEAR_RX_DTOG(USBx, bEpNum) if((((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EP_DTOG_RX) != 0)\
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{ \
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PCD_RX_DTOG((USBx),(bEpNum));\
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}
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#define PCD_CLEAR_TX_DTOG(USBx, bEpNum) if((((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EP_DTOG_TX) != 0)\
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{\
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PCD_TX_DTOG((USBx),(bEpNum));\
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}
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/**
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* @brief set & clear EP_KIND bit.
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* @param USBx USB peripheral instance register address.
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* @param bEpNum Endpoint Number.
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* @retval None
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*/
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#define PCD_SET_EP_KIND(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \
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(USB_EP_CTR_RX|USB_EP_CTR_TX|((((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) | USB_EP_KIND) & USB_EPREG_MASK))))
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#define PCD_CLEAR_EP_KIND(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \
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(USB_EP_CTR_RX|USB_EP_CTR_TX|((((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EPKIND_MASK)))))
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2019-09-10 07:03:24 +02:00
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// This checks if the device has "LPM"
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2019-09-09 22:14:38 +02:00
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#if defined(USB_ISTR_L1REQ)
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2019-09-10 07:03:24 +02:00
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#define USB_ISTR_L1REQ_FORCED (USB_ISTR_L1REQ)
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2019-09-09 19:38:10 +02:00
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#else
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2019-09-09 22:14:38 +02:00
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#define USB_ISTR_L1REQ_FORCED ((uint16_t)0x0000U)
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2019-09-09 19:38:10 +02:00
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#endif
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2019-09-09 22:14:38 +02:00
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#define USB_ISTR_ALL_EVENTS (USB_ISTR_PMAOVR | USB_ISTR_ERR | USB_ISTR_WKUP | USB_ISTR_SUSP | \
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USB_ISTR_RESET | USB_ISTR_SOF | USB_ISTR_ESOF | USB_ISTR_L1REQ_FORCED )
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2019-09-11 15:43:57 +02:00
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// Number of endpoints in hardware
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#define STFSDEV_EP_COUNT (8)
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2019-09-09 22:14:38 +02:00
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2019-09-09 19:38:10 +02:00
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#endif /* PORTABLE_ST_STM32F0_DCD_STM32F0_FSDEV_PVT_ST_H_ */
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