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esp32-s2_dfu
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esp32-s2_dfu/hw/bsp/ngx4330/board.mk

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add nxp_lpcopen as submodule
2021-04-28 13:11:49 +02:00
DEPS_SUBMODULES += hw/mcu/nxp/lpcopen
merge no-family example build specify FAMILY_SUBMODULES for all boards
2021-03-04 16:50:45 +01:00
adding ngx4330
2019-09-09 11:47:57 +02:00
CFLAGS += \
move -flto to board.mk current board that doesn work with flto is spresense and mimxrt10xx (due to xip image_vector_table is optimized out).
2019-11-20 10:06:40 +01:00
-flto \
adding ngx4330
2019-09-09 11:47:57 +02:00
-mthumb \
-mabi=aapcs \
-mcpu=cortex-m4 \
revert to use float-abi define __USE_CMSIS instead of __USE_LPCOPEN will have startup enable FPU on startup properly. Although it is only relevant to lpx43/40 series, change all to __USE_CMSIS for consistency
2020-09-01 19:46:08 +02:00
-mfloat-abi=hard \
fix ci build
2020-09-01 19:56:43 +02:00
-mfpu=fpv4-sp-d16 \
adding ngx4330
2019-09-09 11:47:57 +02:00
-nostdlib \
-DCORE_M4 \
revert to use __USE_LPCOPEN properly init fpu on LPC M4
2020-09-03 07:58:09 +02:00
-D__USE_LPCOPEN \
revert to use float-abi define __USE_CMSIS instead of __USE_LPCOPEN will have startup enable FPU on startup properly. Although it is only relevant to lpx43/40 series, change all to __USE_CMSIS for consistency
2020-09-01 19:46:08 +02:00
-DCFG_TUSB_MCU=OPT_MCU_LPC43XX
adding ngx4330
2019-09-09 11:47:57 +02:00
add -Wextra for more warnings to example non-stack warning (probably mcu driver) should be suppressed in the board.mk
2019-09-26 19:15:43 +02:00
# mcu driver cause following warnings
more -Wcast-qual
2021-10-17 12:32:03 +02:00
CFLAGS += -Wno-error=strict-prototypes -Wno-error=unused-parameter -Wno-error=cast-qual
adding ngx4330
2019-09-09 11:47:57 +02:00
update makefile for lpc boards
2019-11-11 05:51:51 +01:00
MCU_DIR = hw/mcu/nxp/lpcopen/lpc43xx/lpc_chip_43xx
adding ngx4330
2019-09-09 11:47:57 +02:00
# All source paths should be relative to the top level.
LD_FILE = hw/bsp/$(BOARD)/ngx4330.ld
SRC_C += \
more work to abstract chipidea driver
2021-12-01 17:30:09 +01:00
src/portable/chipidea/ci_hs/dcd_ci_hs.c \
src/portable/chipidea/ci_hs/hcd_ci_hs.c \
src/portable/ehci/ehci.c \
adding ngx4330
2019-09-09 11:47:57 +02:00
$(MCU_DIR)/../gcc/cr_startup_lpc43xx.c \
$(MCU_DIR)/src/chip_18xx_43xx.c \
$(MCU_DIR)/src/clock_18xx_43xx.c \
$(MCU_DIR)/src/gpio_18xx_43xx.c \
$(MCU_DIR)/src/sysinit_18xx_43xx.c \
revert to use __USE_LPCOPEN properly init fpu on LPC M4
2020-09-03 07:58:09 +02:00
$(MCU_DIR)/src/uart_18xx_43xx.c \
$(MCU_DIR)/src/fpu_init.c
adding ngx4330
2019-09-09 11:47:57 +02:00
INC += \
$(TOP)/$(MCU_DIR)/inc \
$(TOP)/$(MCU_DIR)/inc/config_43xx
# For freeRTOS port source
rework make freertos port handling this allows ports to specify a freertos port outside the FreeRTOS-Kernel lib directory, which would otherwise not be possible Signed-off-by: Rafael Silva <rafaelsilva@ajtec.pt>
2022-03-09 13:14:55 +01:00
FREERTOS_PORT = $(FREERTOS_PORT_PATH)/ARM_CM4F
adding ngx4330
2019-09-09 11:47:57 +02:00
# For flash-jlink target
JLINK_DEVICE = LPC4330
JLINK_IF = swd
# flash using jlink
flash: flash-jlink