rename i2c to i2c_master
This commit is contained in:
parent
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308
lib/i2c.c
308
lib/i2c.c
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/* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*
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*/
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/** library to communicate using I2C (code)
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* @file i2c.h
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* @author King Kévin <kingkevin@cuvoodoo.info>
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* @date 2017
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* @note peripherals used: I2C @ref i2c_i2c, timer @ref i2c_timer
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*/
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/* standard libraries */
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#include <stdint.h> // standard integer types
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#include <stdio.h> // standard I/O facilities
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#include <stdlib.h> // general utilities
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/* STM32 (including CM3) libraries */
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#include <libopencm3/stm32/rcc.h> // real-time control clock library
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#include <libopencm3/stm32/gpio.h> // general purpose input output library
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#include <libopencm3/stm32/i2c.h> // I2C library
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#include <libopencm3/stm32/timer.h> // timer utilities
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#include "global.h" // global utilities
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#include "i2c.h" // I2C header and definitions
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/** @defgroup i2c_i2c I2C peripheral used to communicate
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* @{
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*/
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#define I2C_I2C 2 /**< I2C peripheral */
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/** @} */
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/** @defgroup i2c_timer timer peripheral used for timeouts
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* @{
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*/
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#define I2C_TIMER 4 /**< timer peripheral */
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#define I2C_TIMEOUT 4 /**< timeout factor (compared to expected time) */
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/** @} */
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void i2c_master(bool fast)
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{
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// configure I2C peripheral
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rcc_periph_clock_enable(RCC_I2C_SCL_PORT(I2C_I2C)); // enable clock for I2C I/O peripheral
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gpio_set(I2C_SCL_PORT(I2C_I2C), I2C_SCL_PIN(I2C_I2C)); // already put signal high to avoid small pulse
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gpio_set_mode(I2C_SCL_PORT(I2C_I2C), GPIO_MODE_OUTPUT_2_MHZ, GPIO_CNF_OUTPUT_ALTFN_OPENDRAIN, I2C_SCL_PIN(I2C_I2C)); // setup I2C I/O pins
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rcc_periph_clock_enable(RCC_I2C_SCL_PORT(I2C_I2C)); // enable clock for I2C I/O peripheral
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gpio_set(I2C_SDA_PORT(I2C_I2C), I2C_SDA_PIN(I2C_I2C)); // already put signal high to avoid small pulse
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gpio_set_mode(I2C_SDA_PORT(I2C_I2C), GPIO_MODE_OUTPUT_2_MHZ, GPIO_CNF_OUTPUT_ALTFN_OPENDRAIN, I2C_SDA_PIN(I2C_I2C)); // setup I2C I/O pins
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rcc_periph_clock_enable(RCC_AFIO); // enable clock for alternate function
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rcc_periph_clock_enable(RCC_I2C(I2C_I2C)); // enable clock for I2C peripheral
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i2c_reset(I2C(I2C_I2C)); // reset configuration
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i2c_peripheral_disable(I2C(I2C_I2C)); // I2C needs to be disable to be configured
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i2c_set_clock_frequency(I2C(I2C_I2C), rcc_apb1_frequency/1000000); // configure the peripheral clock to the APB1 freq (where it is connected to)
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if (fast) {
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i2c_set_fast_mode(I2C(I2C_I2C));
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i2c_set_ccr(I2C(I2C_I2C), rcc_apb1_frequency/(400000*2)); // set Thigh/Tlow to generate frequency of 400 kHz
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i2c_set_trise(I2C(I2C_I2C), (300/(1000/(rcc_apb1_frequency/1000000)))+1); // max rise time for 300 kHz is 300 ns
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} else {
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i2c_set_standard_mode(I2C(I2C_I2C)); // the DS1307 has a maximum I2C SCL freq if 100 kHz (corresponding to the standard mode)
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i2c_set_ccr(I2C(I2C_I2C), rcc_apb1_frequency/(100000*2)); // set Thigh/Tlow to generate frequency of 100 kHz
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i2c_set_trise(I2C(I2C_I2C), (1000/(1000/(rcc_apb1_frequency/1000000)))+1); // max rise time for 100 kHz is 1000 ns (~1 MHz)
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}
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i2c_peripheral_enable(I2C(I2C_I2C)); // enable I2C after configuration completed
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// configure time for timeouts
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rcc_periph_clock_enable(RCC_TIM(I2C_TIMER)); // enable clock for timer block
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timer_reset(TIM(I2C_TIMER)); // reset timer state
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timer_set_mode(TIM(I2C_TIMER), TIM_CR1_CKD_CK_INT, TIM_CR1_CMS_EDGE, TIM_CR1_DIR_UP); // set timer mode, use undivided timer clock, edge alignment (simple count), and count up
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timer_one_shot_mode(TIM(I2C_TIMER)); // stop counter after update event (we only need to one timeout and reset before next operation)
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if (fast) {
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timer_set_prescaler(TIM(I2C_TIMER), rcc_ahb_frequency/400000-1); // set the prescaler so one tick is also one I2C bit (used I2C frequency)
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} else {
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timer_set_prescaler(TIM(I2C_TIMER), rcc_ahb_frequency/100000-1); // set the prescaler so one tick is also one I2C bit (used I2C frequency)
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}
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timer_set_period(TIM(I2C_TIMER), I2C_TIMEOUT*9); // use factor to wait for all 9 bits to be transmitted
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timer_update_on_overflow(TIM(I2C_TIMER)); // only use counter overflow as UEV source (use overflow as timeout)
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// wait one transaction for the signal to be stable (some slave have issues when an I2C transaction immediately follows)
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timer_set_counter(TIM(I2C_TIMER),0); // restart timer
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timer_clear_flag(TIM(I2C_TIMER), TIM_SR_UIF); // clear flag
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timer_enable_counter(TIM(I2C_TIMER)); // enable timer for timeouts
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while ( !timer_get_flag(TIM(I2C_TIMER), TIM_SR_UIF));
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timer_disable_counter(TIM(I2C_TIMER)); // disable timer for timeouts
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timer_clear_flag(TIM(I2C_TIMER), TIM_SR_UIF); // clear flag
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}
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bool i2c_read(uint8_t slave, const uint8_t* address, size_t address_size, uint8_t* data, size_t data_size)
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{
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// sanity check
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if (address==NULL || address_size==0 || data==NULL || data_size==0) { // input data is erroneous
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return false;
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}
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if (I2C_SR2(I2C(I2C_I2C)) & I2C_SR2_BUSY) { // I2C device is busy
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return false;
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}
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if (I2C_SR2(I2C(I2C_I2C)) & I2C_SR2_MSL) { // I2C device is already in master mode
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return false;
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}
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bool to_return = false; // return if read succeeded
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// send start condition
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i2c_send_start(I2C(I2C_I2C)); // send start condition to start transaction
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timer_set_counter(TIM(I2C_TIMER),0); // restart timer
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timer_clear_flag(TIM(I2C_TIMER), TIM_SR_UIF); // clear flag
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timer_enable_counter(TIM(I2C_TIMER)); // enable timer for timeouts
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while (!(I2C_SR1(I2C(I2C_I2C)) & I2C_SR1_SB) && !timer_get_flag(TIM(I2C_TIMER), TIM_SR_UIF)); // wait until start condition is transmitted
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timer_disable_counter(TIM(I2C_TIMER)); // disable timer for timeouts
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if (timer_get_flag(TIM(I2C_TIMER), TIM_SR_UIF)) { // timeout occurred
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timer_clear_flag(TIM(I2C_TIMER), TIM_SR_UIF); // clear flag
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goto error;
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}
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if (!(I2C_SR2(I2C(I2C_I2C)) & I2C_SR2_MSL)) { // verify if in master mode
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goto error;
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}
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// select slave
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i2c_send_7bit_address(I2C(I2C_I2C), slave, I2C_WRITE); // select slave
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timer_set_counter(TIM(I2C_TIMER),0); // restart timer
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timer_clear_flag(TIM(I2C_TIMER), TIM_SR_UIF); // clear flag
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timer_enable_counter(TIM(I2C_TIMER)); // enable timer for timeouts
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while (!(I2C_SR1(I2C(I2C_I2C)) & I2C_SR1_ADDR) && !timer_get_flag(TIM(I2C_TIMER), TIM_SR_UIF)); // wait until address is transmitted
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timer_disable_counter(TIM(I2C_TIMER)); // disable timer for timeouts
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if (timer_get_flag(TIM(I2C_TIMER), TIM_SR_UIF)) { // timeout occurred
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timer_clear_flag(TIM(I2C_TIMER), TIM_SR_UIF); // clear flag
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goto error;
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}
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if (!((I2C_SR2(I2C(I2C_I2C)) & I2C_SR2_TRA))) { // verify we are in transmit mode (and read SR2 to clear ADDR)
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goto error;
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}
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// send address
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for (size_t i=0; i<address_size; i++) {
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i2c_send_data(I2C(I2C_I2C), address[i]); // send memory address we want to read
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timer_set_counter(TIM(I2C_TIMER),0); // restart timer
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timer_clear_flag(TIM(I2C_TIMER), TIM_SR_UIF); // clear flag
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timer_enable_counter(TIM(I2C_TIMER)); // enable timer for timeouts
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while (!(I2C_SR1(I2C(I2C_I2C)) & I2C_SR1_TxE) && !timer_get_flag(TIM(I2C_TIMER), TIM_SR_UIF)); // wait until byte has been transmitted
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timer_disable_counter(TIM(I2C_TIMER)); // disable timer for timeouts
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if (timer_get_flag(TIM(I2C_TIMER), TIM_SR_UIF)) { // timeout occurred
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timer_clear_flag(TIM(I2C_TIMER), TIM_SR_UIF); // clear flag
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goto error;
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}
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}
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// switch to read mode
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i2c_send_start(I2C(I2C_I2C)); // send restart condition to switch from write to read mode
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timer_set_counter(TIM(I2C_TIMER),0); // restart timer
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timer_clear_flag(TIM(I2C_TIMER), TIM_SR_UIF); // clear flag
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timer_enable_counter(TIM(I2C_TIMER)); // enable timer for timeouts
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while (!(I2C_SR1(I2C(I2C_I2C)) & I2C_SR1_SB) && !timer_get_flag(TIM(I2C_TIMER), TIM_SR_UIF)); // wait until start condition is transmitted
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timer_disable_counter(TIM(I2C_TIMER)); // disable timer for timeouts
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if (timer_get_flag(TIM(I2C_TIMER), TIM_SR_UIF)) { // timeout occurred
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timer_clear_flag(TIM(I2C_TIMER), TIM_SR_UIF); // clear flag
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goto error;
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}
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i2c_send_7bit_address(I2C(I2C_I2C), slave, I2C_READ); // select slave
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timer_set_counter(TIM(I2C_TIMER),0); // restart timer
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timer_clear_flag(TIM(I2C_TIMER), TIM_SR_UIF); // clear flag
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timer_enable_counter(TIM(I2C_TIMER)); // enable timer for timeouts
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while (!(I2C_SR1(I2C(I2C_I2C)) & I2C_SR1_ADDR) && !timer_get_flag(TIM(I2C_TIMER), TIM_SR_UIF)); // wait until address is transmitted
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timer_disable_counter(TIM(I2C_TIMER)); // disable timer for timeouts
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if (timer_get_flag(TIM(I2C_TIMER), TIM_SR_UIF)) { // timeout occurred
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timer_clear_flag(TIM(I2C_TIMER), TIM_SR_UIF); // clear flag
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goto error;
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}
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if ((I2C_SR2(I2C(I2C_I2C)) & I2C_SR2_TRA)) { // verify we are in read mode (and read SR2 to clear ADDR)
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goto error;
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}
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// read data
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for (size_t i=0; i<data_size; i++) { // read bytes
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if (i==data_size-1) { // prepare to sent NACK for last byte
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i2c_disable_ack(I2C(I2C_I2C)); // NACK received to stop slave transmission
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i2c_send_stop(I2C(I2C_I2C)); // send STOP after receiving byte
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} else {
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i2c_enable_ack(I2C(I2C_I2C)); // ACK received byte to continue slave transmission
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}
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timer_set_counter(TIM(I2C_TIMER),0); // restart timer
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timer_clear_flag(TIM(I2C_TIMER), TIM_SR_UIF); // clear flag
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timer_enable_counter(TIM(I2C_TIMER)); // enable timer for timeouts
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while (!(I2C_SR1(I2C(I2C_I2C)) & I2C_SR1_RxNE) && !timer_get_flag(TIM(I2C_TIMER), TIM_SR_UIF)); // wait until byte has been received
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timer_disable_counter(TIM(I2C_TIMER)); // disable timer for timeouts
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if (timer_get_flag(TIM(I2C_TIMER), TIM_SR_UIF)) { // timeout occurred
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timer_clear_flag(TIM(I2C_TIMER), TIM_SR_UIF); // clear flag
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goto error;
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}
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data[i] = i2c_get_data(I2C(I2C_I2C)); // read received byte
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}
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to_return = true;
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error:
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if (I2C_SR2(I2C(I2C_I2C)) & I2C_SR2_BUSY) { // release bus if busy
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// i2c_send_stop(I2C(I2C_I2C)); // send stop to release bus
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}
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i2c_send_stop(I2C(I2C_I2C)); // send stop to release bus
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timer_set_counter(TIM(I2C_TIMER),0); // restart timer
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timer_clear_flag(TIM(I2C_TIMER), TIM_SR_UIF); // clear flag
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timer_enable_counter(TIM(I2C_TIMER)); // enable timer for timeouts
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while ((I2C_SR2(I2C(I2C_I2C)) & I2C_SR2_MSL) && !timer_get_flag(TIM(I2C_TIMER), TIM_SR_UIF)); // wait until bus released (non master mode)
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timer_disable_counter(TIM(I2C_TIMER)); // disable timer for timeouts
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if (timer_get_flag(TIM(I2C_TIMER), TIM_SR_UIF)) { // timeout occurred
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timer_clear_flag(TIM(I2C_TIMER), TIM_SR_UIF); // clear flag
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}
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return to_return;
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}
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bool i2c_write(uint8_t slave, const uint8_t* address, size_t address_size, const uint8_t* data, size_t data_size)
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{
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// sanity check
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if (address==NULL || address_size==0 || data==NULL || data_size==0) { // input data is erroneous
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return false;
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}
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if (I2C_SR2(I2C(I2C_I2C)) & I2C_SR2_BUSY) { // I2C device is busy
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return false;
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}
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if (I2C_SR2(I2C(I2C_I2C)) & I2C_SR2_MSL) { // I2C device is already in master mode
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return false;
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}
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bool to_return = false; // return if read succeeded
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// send start condition
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i2c_send_start(I2C(I2C_I2C)); // send start condition to start transaction
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timer_set_counter(TIM(I2C_TIMER),0); // restart timer
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timer_clear_flag(TIM(I2C_TIMER), TIM_SR_UIF); // clear flag
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timer_enable_counter(TIM(I2C_TIMER)); // enable timer for timeouts
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while (!(I2C_SR1(I2C(I2C_I2C)) & I2C_SR1_SB) && !timer_get_flag(TIM(I2C_TIMER), TIM_SR_UIF)); // wait until start condition is transmitted
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timer_disable_counter(TIM(I2C_TIMER)); // disable timer for timeouts
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if (timer_get_flag(TIM(I2C_TIMER), TIM_SR_UIF)) { // timeout occurred
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timer_clear_flag(TIM(I2C_TIMER), TIM_SR_UIF); // clear flag
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goto error;
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}
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if (!(I2C_SR2(I2C(I2C_I2C)) & I2C_SR2_MSL)) { // verify if in master mode
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goto error;
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}
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// select slave
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i2c_send_7bit_address(I2C(I2C_I2C), slave, I2C_WRITE); // select slave
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timer_set_counter(TIM(I2C_TIMER),0); // restart timer
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timer_clear_flag(TIM(I2C_TIMER), TIM_SR_UIF); // clear flag
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timer_enable_counter(TIM(I2C_TIMER)); // enable timer for timeouts
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while (!(I2C_SR1(I2C(I2C_I2C)) & I2C_SR1_ADDR) && !timer_get_flag(TIM(I2C_TIMER), TIM_SR_UIF)); // wait until address is transmitted
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timer_disable_counter(TIM(I2C_TIMER)); // disable timer for timeouts
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if (timer_get_flag(TIM(I2C_TIMER), TIM_SR_UIF)) { // timeout occurred
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timer_clear_flag(TIM(I2C_TIMER), TIM_SR_UIF); // clear flag
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goto error;
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}
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if (!((I2C_SR2(I2C(I2C_I2C)) & I2C_SR2_TRA))) { // verify we are in transmit mode (and read SR2 to clear ADDR)
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goto error;
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}
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// send address
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for (size_t i=0; i<address_size; i++) {
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i2c_send_data(I2C(I2C_I2C), address[i]); // send memory address we want to read
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timer_set_counter(TIM(I2C_TIMER),0); // restart timer
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timer_clear_flag(TIM(I2C_TIMER), TIM_SR_UIF); // clear flag
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timer_enable_counter(TIM(I2C_TIMER)); // enable timer for timeouts
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while (!(I2C_SR1(I2C(I2C_I2C)) & I2C_SR1_TxE) && !timer_get_flag(TIM(I2C_TIMER), TIM_SR_UIF)); // wait until byte has been transmitted
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timer_disable_counter(TIM(I2C_TIMER)); // disable timer for timeouts
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if (timer_get_flag(TIM(I2C_TIMER), TIM_SR_UIF)) { // timeout occurred
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timer_clear_flag(TIM(I2C_TIMER), TIM_SR_UIF); // clear flag
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goto error;
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}
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}
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// write data
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for (size_t i=0; i<data_size; i++) { // write bytes
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i2c_send_data(I2C(I2C_I2C), data[i]); // send byte to be written in memory
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timer_set_counter(TIM(I2C_TIMER),0); // restart timer
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timer_clear_flag(TIM(I2C_TIMER), TIM_SR_UIF); // clear flag
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timer_enable_counter(TIM(I2C_TIMER)); // enable timer for timeouts
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while (!(I2C_SR1(I2C(I2C_I2C)) & I2C_SR1_TxE) && !timer_get_flag(TIM(I2C_TIMER), TIM_SR_UIF)); // wait until byte has been transmitted
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timer_disable_counter(TIM(I2C_TIMER)); // disable timer for timeouts
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if (timer_get_flag(TIM(I2C_TIMER), TIM_SR_UIF)) { // timeout occurred
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timer_clear_flag(TIM(I2C_TIMER), TIM_SR_UIF); // clear flag
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goto error;
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}
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}
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to_return = true;
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error:
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if (I2C_SR2(I2C(I2C_I2C)) & I2C_SR2_BUSY) { // release bus if busy
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i2c_send_stop(I2C(I2C_I2C)); // send stop to release bus
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}
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timer_set_counter(TIM(I2C_TIMER),0); // restart timer
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timer_clear_flag(TIM(I2C_TIMER), TIM_SR_UIF); // clear flag
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timer_enable_counter(TIM(I2C_TIMER)); // enable timer for timeouts
|
||||
while ((I2C_SR2(I2C(I2C_I2C)) & I2C_SR2_MSL) && !timer_get_flag(TIM(I2C_TIMER), TIM_SR_UIF)); // wait until bus released (non master mode)
|
||||
timer_disable_counter(TIM(I2C_TIMER)); // disable timer for timeouts
|
||||
if (timer_get_flag(TIM(I2C_TIMER), TIM_SR_UIF)) { // timeout occurred
|
||||
timer_clear_flag(TIM(I2C_TIMER), TIM_SR_UIF); // clear flag
|
||||
}
|
||||
return to_return;
|
||||
}
|
||||
|
|
@ -0,0 +1,308 @@
|
|||
/* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
/** library to communicate using I2C as master (code)
|
||||
* @file i2c_master.h
|
||||
* @author King Kévin <kingkevin@cuvoodoo.info>
|
||||
* @date 2017
|
||||
* @note peripherals used: I2C @ref i2c_master_i2c, timer @ref i2c_master_timer
|
||||
*/
|
||||
|
||||
/* standard libraries */
|
||||
#include <stdint.h> // standard integer types
|
||||
#include <stdio.h> // standard I/O facilities
|
||||
#include <stdlib.h> // general utilities
|
||||
|
||||
/* STM32 (including CM3) libraries */
|
||||
#include <libopencm3/stm32/rcc.h> // real-time control clock library
|
||||
#include <libopencm3/stm32/gpio.h> // general purpose input output library
|
||||
#include <libopencm3/stm32/i2c.h> // I2C library
|
||||
#include <libopencm3/stm32/timer.h> // timer utilities
|
||||
|
||||
#include "global.h" // global utilities
|
||||
#include "i2c_master.h" // I2C header and definitions
|
||||
|
||||
/** @defgroup i2c_master_i2c I2C peripheral used to communicate
|
||||
* @{
|
||||
*/
|
||||
#define I2C_MASTER_I2C 2 /**< I2C peripheral */
|
||||
/** @} */
|
||||
|
||||
/** @defgroup i2c_timer timer peripheral used for timeouts
|
||||
* @{
|
||||
*/
|
||||
#define I2C_MASTER_TIMER 4 /**< timer peripheral */
|
||||
#define I2C_MASTER_TIMEOUT 4 /**< timeout factor (compared to expected time) */
|
||||
/** @} */
|
||||
|
||||
|
||||
void i2c_master_setup(bool fast)
|
||||
{
|
||||
// configure I2C peripheral
|
||||
rcc_periph_clock_enable(RCC_I2C_SCL_PORT(I2C_MASTER_I2C)); // enable clock for I2C I/O peripheral
|
||||
gpio_set(I2C_SCL_PORT(I2C_MASTER_I2C), I2C_SCL_PIN(I2C_MASTER_I2C)); // already put signal high to avoid small pulse
|
||||
gpio_set_mode(I2C_SCL_PORT(I2C_MASTER_I2C), GPIO_MODE_OUTPUT_2_MHZ, GPIO_CNF_OUTPUT_ALTFN_OPENDRAIN, I2C_SCL_PIN(I2C_MASTER_I2C)); // setup I2C I/O pins
|
||||
rcc_periph_clock_enable(RCC_I2C_SCL_PORT(I2C_MASTER_I2C)); // enable clock for I2C I/O peripheral
|
||||
gpio_set(I2C_SDA_PORT(I2C_MASTER_I2C), I2C_SDA_PIN(I2C_MASTER_I2C)); // already put signal high to avoid small pulse
|
||||
gpio_set_mode(I2C_SDA_PORT(I2C_MASTER_I2C), GPIO_MODE_OUTPUT_2_MHZ, GPIO_CNF_OUTPUT_ALTFN_OPENDRAIN, I2C_SDA_PIN(I2C_MASTER_I2C)); // setup I2C I/O pins
|
||||
rcc_periph_clock_enable(RCC_AFIO); // enable clock for alternate function
|
||||
rcc_periph_clock_enable(RCC_I2C(I2C_MASTER_I2C)); // enable clock for I2C peripheral
|
||||
i2c_reset(I2C(I2C_MASTER_I2C)); // reset configuration
|
||||
i2c_peripheral_disable(I2C(I2C_MASTER_I2C)); // I2C needs to be disable to be configured
|
||||
i2c_set_clock_frequency(I2C(I2C_MASTER_I2C), rcc_apb1_frequency/1000000); // configure the peripheral clock to the APB1 freq (where it is connected to)
|
||||
if (fast) {
|
||||
i2c_set_fast_mode(I2C(I2C_MASTER_I2C));
|
||||
i2c_set_ccr(I2C(I2C_MASTER_I2C), rcc_apb1_frequency/(400000*2)); // set Thigh/Tlow to generate frequency of 400 kHz
|
||||
i2c_set_trise(I2C(I2C_MASTER_I2C), (300/(1000/(rcc_apb1_frequency/1000000)))+1); // max rise time for 300 kHz is 300 ns
|
||||
} else {
|
||||
i2c_set_standard_mode(I2C(I2C_MASTER_I2C)); // the DS1307 has a maximum I2C SCL freq if 100 kHz (corresponding to the standard mode)
|
||||
i2c_set_ccr(I2C(I2C_MASTER_I2C), rcc_apb1_frequency/(100000*2)); // set Thigh/Tlow to generate frequency of 100 kHz
|
||||
i2c_set_trise(I2C(I2C_MASTER_I2C), (1000/(1000/(rcc_apb1_frequency/1000000)))+1); // max rise time for 100 kHz is 1000 ns (~1 MHz)
|
||||
}
|
||||
i2c_peripheral_enable(I2C(I2C_MASTER_I2C)); // enable I2C after configuration completed
|
||||
|
||||
// configure time for timeouts
|
||||
rcc_periph_clock_enable(RCC_TIM(I2C_MASTER_TIMER)); // enable clock for timer block
|
||||
timer_reset(TIM(I2C_MASTER_TIMER)); // reset timer state
|
||||
timer_set_mode(TIM(I2C_MASTER_TIMER), TIM_CR1_CKD_CK_INT, TIM_CR1_CMS_EDGE, TIM_CR1_DIR_UP); // set timer mode, use undivided timer clock, edge alignment (simple count), and count up
|
||||
timer_one_shot_mode(TIM(I2C_MASTER_TIMER)); // stop counter after update event (we only need to one timeout and reset before next operation)
|
||||
if (fast) {
|
||||
timer_set_prescaler(TIM(I2C_MASTER_TIMER), rcc_ahb_frequency/400000-1); // set the prescaler so one tick is also one I2C bit (used I2C frequency)
|
||||
} else {
|
||||
timer_set_prescaler(TIM(I2C_MASTER_TIMER), rcc_ahb_frequency/100000-1); // set the prescaler so one tick is also one I2C bit (used I2C frequency)
|
||||
}
|
||||
timer_set_period(TIM(I2C_MASTER_TIMER), I2C_MASTER_TIMEOUT*9); // use factor to wait for all 9 bits to be transmitted
|
||||
timer_update_on_overflow(TIM(I2C_MASTER_TIMER)); // only use counter overflow as UEV source (use overflow as timeout)
|
||||
|
||||
// wait one transaction for the signal to be stable (some slave have issues when an I2C transaction immediately follows)
|
||||
timer_set_counter(TIM(I2C_MASTER_TIMER),0); // restart timer
|
||||
timer_clear_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF); // clear flag
|
||||
timer_enable_counter(TIM(I2C_MASTER_TIMER)); // enable timer for timeouts
|
||||
while ( !timer_get_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF));
|
||||
timer_disable_counter(TIM(I2C_MASTER_TIMER)); // disable timer for timeouts
|
||||
timer_clear_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF); // clear flag
|
||||
}
|
||||
|
||||
bool i2c_master_read(uint8_t slave, const uint8_t* address, size_t address_size, uint8_t* data, size_t data_size)
|
||||
{
|
||||
// sanity check
|
||||
if (address==NULL || address_size==0 || data==NULL || data_size==0) { // input data is erroneous
|
||||
return false;
|
||||
}
|
||||
if (I2C_SR2(I2C(I2C_MASTER_I2C)) & I2C_SR2_BUSY) { // I2C device is busy
|
||||
return false;
|
||||
}
|
||||
if (I2C_SR2(I2C(I2C_MASTER_I2C)) & I2C_SR2_MSL) { // I2C device is already in master mode
|
||||
return false;
|
||||
}
|
||||
|
||||
bool to_return = false; // return if read succeeded
|
||||
|
||||
// send start condition
|
||||
i2c_send_start(I2C(I2C_MASTER_I2C)); // send start condition to start transaction
|
||||
timer_set_counter(TIM(I2C_MASTER_TIMER),0); // restart timer
|
||||
timer_clear_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF); // clear flag
|
||||
timer_enable_counter(TIM(I2C_MASTER_TIMER)); // enable timer for timeouts
|
||||
while (!(I2C_SR1(I2C(I2C_MASTER_I2C)) & I2C_SR1_SB) && !timer_get_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF)); // wait until start condition is transmitted
|
||||
timer_disable_counter(TIM(I2C_MASTER_TIMER)); // disable timer for timeouts
|
||||
if (timer_get_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF)) { // timeout occurred
|
||||
timer_clear_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF); // clear flag
|
||||
goto error;
|
||||
}
|
||||
if (!(I2C_SR2(I2C(I2C_MASTER_I2C)) & I2C_SR2_MSL)) { // verify if in master mode
|
||||
goto error;
|
||||
}
|
||||
|
||||
// select slave
|
||||
i2c_send_7bit_address(I2C(I2C_MASTER_I2C), slave, I2C_WRITE); // select slave
|
||||
timer_set_counter(TIM(I2C_MASTER_TIMER),0); // restart timer
|
||||
timer_clear_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF); // clear flag
|
||||
timer_enable_counter(TIM(I2C_MASTER_TIMER)); // enable timer for timeouts
|
||||
while (!(I2C_SR1(I2C(I2C_MASTER_I2C)) & I2C_SR1_ADDR) && !timer_get_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF)); // wait until address is transmitted
|
||||
timer_disable_counter(TIM(I2C_MASTER_TIMER)); // disable timer for timeouts
|
||||
if (timer_get_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF)) { // timeout occurred
|
||||
timer_clear_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF); // clear flag
|
||||
goto error;
|
||||
}
|
||||
if (!((I2C_SR2(I2C(I2C_MASTER_I2C)) & I2C_SR2_TRA))) { // verify we are in transmit mode (and read SR2 to clear ADDR)
|
||||
goto error;
|
||||
}
|
||||
|
||||
// send address
|
||||
for (size_t i=0; i<address_size; i++) {
|
||||
i2c_send_data(I2C(I2C_MASTER_I2C), address[i]); // send memory address we want to read
|
||||
timer_set_counter(TIM(I2C_MASTER_TIMER),0); // restart timer
|
||||
timer_clear_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF); // clear flag
|
||||
timer_enable_counter(TIM(I2C_MASTER_TIMER)); // enable timer for timeouts
|
||||
while (!(I2C_SR1(I2C(I2C_MASTER_I2C)) & I2C_SR1_TxE) && !timer_get_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF)); // wait until byte has been transmitted
|
||||
timer_disable_counter(TIM(I2C_MASTER_TIMER)); // disable timer for timeouts
|
||||
if (timer_get_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF)) { // timeout occurred
|
||||
timer_clear_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF); // clear flag
|
||||
goto error;
|
||||
}
|
||||
}
|
||||
|
||||
// switch to read mode
|
||||
i2c_send_start(I2C(I2C_MASTER_I2C)); // send restart condition to switch from write to read mode
|
||||
timer_set_counter(TIM(I2C_MASTER_TIMER),0); // restart timer
|
||||
timer_clear_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF); // clear flag
|
||||
timer_enable_counter(TIM(I2C_MASTER_TIMER)); // enable timer for timeouts
|
||||
while (!(I2C_SR1(I2C(I2C_MASTER_I2C)) & I2C_SR1_SB) && !timer_get_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF)); // wait until start condition is transmitted
|
||||
timer_disable_counter(TIM(I2C_MASTER_TIMER)); // disable timer for timeouts
|
||||
if (timer_get_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF)) { // timeout occurred
|
||||
timer_clear_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF); // clear flag
|
||||
goto error;
|
||||
}
|
||||
|
||||
i2c_send_7bit_address(I2C(I2C_MASTER_I2C), slave, I2C_READ); // select slave
|
||||
timer_set_counter(TIM(I2C_MASTER_TIMER),0); // restart timer
|
||||
timer_clear_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF); // clear flag
|
||||
timer_enable_counter(TIM(I2C_MASTER_TIMER)); // enable timer for timeouts
|
||||
while (!(I2C_SR1(I2C(I2C_MASTER_I2C)) & I2C_SR1_ADDR) && !timer_get_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF)); // wait until address is transmitted
|
||||
timer_disable_counter(TIM(I2C_MASTER_TIMER)); // disable timer for timeouts
|
||||
if (timer_get_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF)) { // timeout occurred
|
||||
timer_clear_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF); // clear flag
|
||||
goto error;
|
||||
}
|
||||
if ((I2C_SR2(I2C(I2C_MASTER_I2C)) & I2C_SR2_TRA)) { // verify we are in read mode (and read SR2 to clear ADDR)
|
||||
goto error;
|
||||
}
|
||||
|
||||
// read data
|
||||
for (size_t i=0; i<data_size; i++) { // read bytes
|
||||
if (i==data_size-1) { // prepare to sent NACK for last byte
|
||||
i2c_disable_ack(I2C(I2C_MASTER_I2C)); // NACK received to stop slave transmission
|
||||
i2c_send_stop(I2C(I2C_MASTER_I2C)); // send STOP after receiving byte
|
||||
} else {
|
||||
i2c_enable_ack(I2C(I2C_MASTER_I2C)); // ACK received byte to continue slave transmission
|
||||
}
|
||||
timer_set_counter(TIM(I2C_MASTER_TIMER),0); // restart timer
|
||||
timer_clear_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF); // clear flag
|
||||
timer_enable_counter(TIM(I2C_MASTER_TIMER)); // enable timer for timeouts
|
||||
while (!(I2C_SR1(I2C(I2C_MASTER_I2C)) & I2C_SR1_RxNE) && !timer_get_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF)); // wait until byte has been received
|
||||
timer_disable_counter(TIM(I2C_MASTER_TIMER)); // disable timer for timeouts
|
||||
if (timer_get_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF)) { // timeout occurred
|
||||
timer_clear_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF); // clear flag
|
||||
goto error;
|
||||
}
|
||||
data[i] = i2c_get_data(I2C(I2C_MASTER_I2C)); // read received byte
|
||||
}
|
||||
to_return = true;
|
||||
|
||||
error:
|
||||
if (I2C_SR2(I2C(I2C_MASTER_I2C)) & I2C_SR2_BUSY) { // release bus if busy
|
||||
// i2c_send_stop(I2C(I2C_MASTER_I2C)); // send stop to release bus
|
||||
}
|
||||
i2c_send_stop(I2C(I2C_MASTER_I2C)); // send stop to release bus
|
||||
timer_set_counter(TIM(I2C_MASTER_TIMER),0); // restart timer
|
||||
timer_clear_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF); // clear flag
|
||||
timer_enable_counter(TIM(I2C_MASTER_TIMER)); // enable timer for timeouts
|
||||
while ((I2C_SR2(I2C(I2C_MASTER_I2C)) & I2C_SR2_MSL) && !timer_get_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF)); // wait until bus released (non master mode)
|
||||
timer_disable_counter(TIM(I2C_MASTER_TIMER)); // disable timer for timeouts
|
||||
if (timer_get_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF)) { // timeout occurred
|
||||
timer_clear_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF); // clear flag
|
||||
}
|
||||
return to_return;
|
||||
}
|
||||
|
||||
bool i2c_master_write(uint8_t slave, const uint8_t* address, size_t address_size, const uint8_t* data, size_t data_size)
|
||||
{
|
||||
// sanity check
|
||||
if (address==NULL || address_size==0 || data==NULL || data_size==0) { // input data is erroneous
|
||||
return false;
|
||||
}
|
||||
if (I2C_SR2(I2C(I2C_MASTER_I2C)) & I2C_SR2_BUSY) { // I2C device is busy
|
||||
return false;
|
||||
}
|
||||
if (I2C_SR2(I2C(I2C_MASTER_I2C)) & I2C_SR2_MSL) { // I2C device is already in master mode
|
||||
return false;
|
||||
}
|
||||
|
||||
bool to_return = false; // return if read succeeded
|
||||
|
||||
// send start condition
|
||||
i2c_send_start(I2C(I2C_MASTER_I2C)); // send start condition to start transaction
|
||||
|
||||
timer_set_counter(TIM(I2C_MASTER_TIMER),0); // restart timer
|
||||
timer_clear_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF); // clear flag
|
||||
timer_enable_counter(TIM(I2C_MASTER_TIMER)); // enable timer for timeouts
|
||||
while (!(I2C_SR1(I2C(I2C_MASTER_I2C)) & I2C_SR1_SB) && !timer_get_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF)); // wait until start condition is transmitted
|
||||
timer_disable_counter(TIM(I2C_MASTER_TIMER)); // disable timer for timeouts
|
||||
if (timer_get_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF)) { // timeout occurred
|
||||
timer_clear_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF); // clear flag
|
||||
goto error;
|
||||
}
|
||||
|
||||
if (!(I2C_SR2(I2C(I2C_MASTER_I2C)) & I2C_SR2_MSL)) { // verify if in master mode
|
||||
goto error;
|
||||
}
|
||||
|
||||
// select slave
|
||||
i2c_send_7bit_address(I2C(I2C_MASTER_I2C), slave, I2C_WRITE); // select slave
|
||||
timer_set_counter(TIM(I2C_MASTER_TIMER),0); // restart timer
|
||||
timer_clear_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF); // clear flag
|
||||
timer_enable_counter(TIM(I2C_MASTER_TIMER)); // enable timer for timeouts
|
||||
while (!(I2C_SR1(I2C(I2C_MASTER_I2C)) & I2C_SR1_ADDR) && !timer_get_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF)); // wait until address is transmitted
|
||||
timer_disable_counter(TIM(I2C_MASTER_TIMER)); // disable timer for timeouts
|
||||
if (timer_get_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF)) { // timeout occurred
|
||||
timer_clear_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF); // clear flag
|
||||
goto error;
|
||||
}
|
||||
if (!((I2C_SR2(I2C(I2C_MASTER_I2C)) & I2C_SR2_TRA))) { // verify we are in transmit mode (and read SR2 to clear ADDR)
|
||||
goto error;
|
||||
}
|
||||
|
||||
// send address
|
||||
for (size_t i=0; i<address_size; i++) {
|
||||
i2c_send_data(I2C(I2C_MASTER_I2C), address[i]); // send memory address we want to read
|
||||
timer_set_counter(TIM(I2C_MASTER_TIMER),0); // restart timer
|
||||
timer_clear_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF); // clear flag
|
||||
timer_enable_counter(TIM(I2C_MASTER_TIMER)); // enable timer for timeouts
|
||||
while (!(I2C_SR1(I2C(I2C_MASTER_I2C)) & I2C_SR1_TxE) && !timer_get_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF)); // wait until byte has been transmitted
|
||||
timer_disable_counter(TIM(I2C_MASTER_TIMER)); // disable timer for timeouts
|
||||
if (timer_get_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF)) { // timeout occurred
|
||||
timer_clear_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF); // clear flag
|
||||
goto error;
|
||||
}
|
||||
}
|
||||
|
||||
// write data
|
||||
for (size_t i=0; i<data_size; i++) { // write bytes
|
||||
i2c_send_data(I2C(I2C_MASTER_I2C), data[i]); // send byte to be written in memory
|
||||
timer_set_counter(TIM(I2C_MASTER_TIMER),0); // restart timer
|
||||
timer_clear_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF); // clear flag
|
||||
timer_enable_counter(TIM(I2C_MASTER_TIMER)); // enable timer for timeouts
|
||||
while (!(I2C_SR1(I2C(I2C_MASTER_I2C)) & I2C_SR1_TxE) && !timer_get_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF)); // wait until byte has been transmitted
|
||||
timer_disable_counter(TIM(I2C_MASTER_TIMER)); // disable timer for timeouts
|
||||
if (timer_get_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF)) { // timeout occurred
|
||||
timer_clear_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF); // clear flag
|
||||
goto error;
|
||||
}
|
||||
}
|
||||
to_return = true;
|
||||
|
||||
error:
|
||||
if (I2C_SR2(I2C(I2C_MASTER_I2C)) & I2C_SR2_BUSY) { // release bus if busy
|
||||
i2c_send_stop(I2C(I2C_MASTER_I2C)); // send stop to release bus
|
||||
}
|
||||
timer_set_counter(TIM(I2C_MASTER_TIMER),0); // restart timer
|
||||
timer_clear_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF); // clear flag
|
||||
timer_enable_counter(TIM(I2C_MASTER_TIMER)); // enable timer for timeouts
|
||||
while ((I2C_SR2(I2C(I2C_MASTER_I2C)) & I2C_SR2_MSL) && !timer_get_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF)); // wait until bus released (non master mode)
|
||||
timer_disable_counter(TIM(I2C_MASTER_TIMER)); // disable timer for timeouts
|
||||
if (timer_get_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF)) { // timeout occurred
|
||||
timer_clear_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF); // clear flag
|
||||
}
|
||||
return to_return;
|
||||
}
|
||||
|
|
@ -12,18 +12,18 @@
|
|||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
*/
|
||||
/** library to communicate using I2C (API)
|
||||
* @file i2c.h
|
||||
/** library to communicate using I2C as master (API)
|
||||
* @file i2c_master.h
|
||||
* @author King Kévin <kingkevin@cuvoodoo.info>
|
||||
* @date 2017
|
||||
* @note peripherals used: I2C @ref i2c_i2c, timer @ref i2c_timer
|
||||
* @note peripherals used: I2C @ref i2c_master_i2c, timer @ref i2c_master_timer
|
||||
*/
|
||||
#pragma once
|
||||
|
||||
/** setup I2C peripheral
|
||||
* @param[in] fast use standard (100 kHz) or fast (400 kHz) mode
|
||||
*/
|
||||
void i2c_master(bool fast);
|
||||
void i2c_master_setup(bool fast);
|
||||
/** read from I2C slave
|
||||
* @param[in] slave 7-bit I2C salve device address to read from
|
||||
* @param[in] address memory address of slave to read from
|
||||
|
|
@ -32,7 +32,7 @@ void i2c_master(bool fast);
|
|||
* @param[in] data_size number of bytes to read
|
||||
* @return if read succeeded
|
||||
*/
|
||||
bool i2c_read(uint8_t slave, const uint8_t* address, size_t address_size, uint8_t* data, size_t data_size);
|
||||
bool i2c_master_read(uint8_t slave, const uint8_t* address, size_t address_size, uint8_t* data, size_t data_size);
|
||||
/** write to I2C slave
|
||||
* @param[in] slave 7-bit I2C salve device address to write to
|
||||
* @param[in] address memory address of slave to write to
|
||||
|
|
@ -41,5 +41,5 @@ bool i2c_read(uint8_t slave, const uint8_t* address, size_t address_size, uint8_
|
|||
* @param[in] data_size number of bytes to write
|
||||
* @return if write succeeded
|
||||
*/
|
||||
bool i2c_write(uint8_t slave, const uint8_t* address, size_t address_size, const uint8_t* data, size_t data_size);
|
||||
bool i2c_master_write(uint8_t slave, const uint8_t* address, size_t address_size, const uint8_t* data, size_t data_size);
|
||||
|
||||
|
|
@ -31,21 +31,21 @@
|
|||
|
||||
#include "global.h" // global utilities
|
||||
#include "rtc_ds1307.h" // RTC header and definitions
|
||||
#include "i2c.h" // i2c utilities
|
||||
#include "i2c_master.h" // i2c utilities
|
||||
|
||||
#define RTC_DS1307_I2C_ADDR 0x68 /**< DS1307 I2C address (fixed to 0b1101000) */
|
||||
|
||||
void rtc_ds1307_setup(void)
|
||||
{
|
||||
// configure I2C peripheral
|
||||
i2c_master(false); // DS1307 only supports normal mode (up to 100 kHz)
|
||||
i2c_master_setup(false); // DS1307 only supports normal mode (up to 100 kHz)
|
||||
}
|
||||
|
||||
bool rtc_ds1307_oscillator_disabled(void)
|
||||
{
|
||||
uint8_t data[1] = {0}; // to read data over I2C
|
||||
const uint8_t address[] = {0x00}; // memory address for data
|
||||
if (!i2c_read(RTC_DS1307_I2C_ADDR, address, LENGTH(address), data, LENGTH(data))) { // read a single byte containing CH value
|
||||
if (!i2c_master_read(RTC_DS1307_I2C_ADDR, address, LENGTH(address), data, LENGTH(data))) { // read a single byte containing CH value
|
||||
return false;
|
||||
}
|
||||
return data[0]&0x80; // return CH bit value to indicate if oscillator is disabled
|
||||
|
|
@ -57,7 +57,7 @@ uint16_t rtc_ds1307_read_square_wave(void)
|
|||
uint8_t data[1] = {0}; // to read data over I2C
|
||||
const uint16_t rtc_ds1307_rs[] = {1, 4096, 8192, 32768}; // RS1/RS0 values
|
||||
const uint8_t address[] = {0x07}; // memory address for data
|
||||
if (!i2c_read(RTC_DS1307_I2C_ADDR, address, LENGTH(address), data, LENGTH(data))) { // read a single byte containing control register
|
||||
if (!i2c_master_read(RTC_DS1307_I2C_ADDR, address, LENGTH(address), data, LENGTH(data))) { // read a single byte containing control register
|
||||
return 0xffff; // error occurred
|
||||
}
|
||||
if (data[0]&0x10) { // verify if the square wave is enabled (SQWE)
|
||||
|
|
@ -73,7 +73,7 @@ uint8_t rtc_ds1307_read_seconds(void)
|
|||
uint8_t to_return = 0; // seconds to return
|
||||
uint8_t data[1] = {0}; // to read data over I2C
|
||||
const uint8_t address[] = {0x00}; // memory address for data
|
||||
if (!i2c_read(RTC_DS1307_I2C_ADDR, address, LENGTH(address), data, LENGTH(data))) { // read a single byte containing value
|
||||
if (!i2c_master_read(RTC_DS1307_I2C_ADDR, address, LENGTH(address), data, LENGTH(data))) { // read a single byte containing value
|
||||
return 0xff;
|
||||
}
|
||||
to_return = ((data[0]&0x70)>>4)*10+(data[0]&0x0f); // convert BCD coding into seconds
|
||||
|
|
@ -85,7 +85,7 @@ uint8_t rtc_ds1307_read_minutes(void)
|
|||
uint8_t to_return = 0; // minutes to return
|
||||
uint8_t data[1] = {0}; // to read data over I2C
|
||||
const uint8_t address[] = {0x01}; // memory address for data
|
||||
if (!i2c_read(RTC_DS1307_I2C_ADDR, address, LENGTH(address), data, LENGTH(data))) { // read a single byte containing value
|
||||
if (!i2c_master_read(RTC_DS1307_I2C_ADDR, address, LENGTH(address), data, LENGTH(data))) { // read a single byte containing value
|
||||
return 0xff;
|
||||
}
|
||||
to_return = (data[0]>>4)*10+(data[0]&0x0f); // convert BCD coding into minutes
|
||||
|
|
@ -97,7 +97,7 @@ uint8_t rtc_ds1307_read_hours(void)
|
|||
uint8_t to_return = 0; // hours to return
|
||||
uint8_t data[1] = {0}; // to read data over I2C
|
||||
const uint8_t address[] = {0x02}; // memory address for data
|
||||
if (!i2c_read(RTC_DS1307_I2C_ADDR, address, LENGTH(address), data, LENGTH(data))) { // read a single byte containing value
|
||||
if (!i2c_master_read(RTC_DS1307_I2C_ADDR, address, LENGTH(address), data, LENGTH(data))) { // read a single byte containing value
|
||||
return 0xff;
|
||||
}
|
||||
if (data[0]&0x40) { // 12 hour mode
|
||||
|
|
@ -117,7 +117,7 @@ uint8_t rtc_ds1307_read_day(void)
|
|||
uint8_t to_return = 0; // day to return
|
||||
uint8_t data[1] = {0}; // to read data over I2C
|
||||
const uint8_t address[] = {0x03}; // memory address for data
|
||||
if (!i2c_read(RTC_DS1307_I2C_ADDR, address, LENGTH(address), data, LENGTH(data))) { // read a single byte containing value
|
||||
if (!i2c_master_read(RTC_DS1307_I2C_ADDR, address, LENGTH(address), data, LENGTH(data))) { // read a single byte containing value
|
||||
return 0xff;
|
||||
}
|
||||
to_return = (data[0]&0x07); // convert BCD coding into days
|
||||
|
|
@ -129,7 +129,7 @@ uint8_t rtc_ds1307_read_date(void)
|
|||
uint8_t to_return = 0; // date to return
|
||||
uint8_t data[1] = {0}; // to read data over I2C
|
||||
const uint8_t address[] = {0x04}; // memory address for data
|
||||
if (!i2c_read(RTC_DS1307_I2C_ADDR, address, LENGTH(address), data, LENGTH(data))) { // read a single byte containing value
|
||||
if (!i2c_master_read(RTC_DS1307_I2C_ADDR, address, LENGTH(address), data, LENGTH(data))) { // read a single byte containing value
|
||||
return 0xff;
|
||||
}
|
||||
to_return = ((data[0]&0x30)>>4)*10+(data[0]&0x0f); // convert BCD coding into date
|
||||
|
|
@ -141,7 +141,7 @@ uint8_t rtc_ds1307_read_month(void)
|
|||
uint8_t to_return = 0; // month to return
|
||||
uint8_t data[1] = {0}; // to read data over I2C
|
||||
const uint8_t address[] = {0x05}; // memory address for data
|
||||
if (!i2c_read(RTC_DS1307_I2C_ADDR, address, LENGTH(address), data, LENGTH(data))) { // read a single byte containing value
|
||||
if (!i2c_master_read(RTC_DS1307_I2C_ADDR, address, LENGTH(address), data, LENGTH(data))) { // read a single byte containing value
|
||||
return 0xff;
|
||||
}
|
||||
to_return = ((data[0]&0x10)>>4)*10+(data[0]&0x0f); // convert BCD coding into month
|
||||
|
|
@ -152,7 +152,7 @@ uint8_t rtc_ds1307_read_year(void)
|
|||
{
|
||||
uint8_t data[1] = {0}; // to read data over I2C
|
||||
const uint8_t address[] = {0x06}; // memory address for data
|
||||
if (!i2c_read(RTC_DS1307_I2C_ADDR, address, LENGTH(address), data, LENGTH(data))) { // read a single byte containing value
|
||||
if (!i2c_master_read(RTC_DS1307_I2C_ADDR, address, LENGTH(address), data, LENGTH(data))) { // read a single byte containing value
|
||||
return 0xff;
|
||||
}
|
||||
uint8_t to_return = ((data[0]&0xf0)>>4)*10+(data[0]&0x0f); // convert BCD coding into year
|
||||
|
|
@ -164,7 +164,7 @@ uint8_t* rtc_ds1307_read_time(void)
|
|||
static uint8_t time[7] = {0}; // store time {seconds, minutes, hours, day, date, month, year}
|
||||
uint8_t data[7] = {0}; // to read data over I2C
|
||||
const uint8_t address[] = {0x00}; // memory address for data
|
||||
if (!i2c_read(RTC_DS1307_I2C_ADDR, address, LENGTH(address), data, LENGTH(data))) { // read all time bytes
|
||||
if (!i2c_master_read(RTC_DS1307_I2C_ADDR, address, LENGTH(address), data, LENGTH(data))) { // read all time bytes
|
||||
return NULL; // error occurred
|
||||
}
|
||||
time[0] = ((data[0]&0x70)>>4)*10+(data[0]&0x0f); // convert seconds from BCD
|
||||
|
|
@ -197,29 +197,29 @@ bool rtc_ds1307_read_ram(uint8_t* data, uint8_t start, uint8_t length)
|
|||
}
|
||||
|
||||
const uint8_t address[] = {0x08+start}; // memory address for data
|
||||
return i2c_read(RTC_DS1307_I2C_ADDR, address, LENGTH(address), data, LENGTH(data)); // read RAM (starting at 0x08)
|
||||
return i2c_master_read(RTC_DS1307_I2C_ADDR, address, LENGTH(address), data, LENGTH(data)); // read RAM (starting at 0x08)
|
||||
}
|
||||
|
||||
bool rtc_ds1307_oscillator_disable(void)
|
||||
{
|
||||
uint8_t data[1] = {0}; // to write CH value data over I2C
|
||||
const uint8_t address[] = {0x00}; // memory address for data
|
||||
if (!i2c_read(RTC_DS1307_I2C_ADDR, address, LENGTH(address), data, LENGTH(data))) { // read seconds with CH value
|
||||
if (!i2c_master_read(RTC_DS1307_I2C_ADDR, address, LENGTH(address), data, LENGTH(data))) { // read seconds with CH value
|
||||
return false;
|
||||
}
|
||||
data[0] |= 0x80; // set CH to disable oscillator
|
||||
return i2c_write(RTC_DS1307_I2C_ADDR, address, LENGTH(address), data, LENGTH(data)); // write current seconds with CH value
|
||||
return i2c_master_write(RTC_DS1307_I2C_ADDR, address, LENGTH(address), data, LENGTH(data)); // write current seconds with CH value
|
||||
}
|
||||
|
||||
bool rtc_ds1307_oscillator_enable(void)
|
||||
{
|
||||
uint8_t data[1] = {0}; // to write CH value data over I2C
|
||||
const uint8_t address[] = {0x00}; // memory address for data
|
||||
if (!i2c_read(RTC_DS1307_I2C_ADDR, address, LENGTH(address), data, LENGTH(data))) { // read seconds with CH value
|
||||
if (!i2c_master_read(RTC_DS1307_I2C_ADDR, address, LENGTH(address), data, LENGTH(data))) { // read seconds with CH value
|
||||
return false;
|
||||
}
|
||||
data[0] &= 0x7f; // clear CH to enable oscillator
|
||||
return i2c_write(RTC_DS1307_I2C_ADDR, address, LENGTH(address), data, LENGTH(data)); // write current seconds with CH value
|
||||
return i2c_master_write(RTC_DS1307_I2C_ADDR, address, LENGTH(address), data, LENGTH(data)); // write current seconds with CH value
|
||||
}
|
||||
|
||||
bool rtc_ds1307_write_square_wave(uint16_t frequency)
|
||||
|
|
@ -245,7 +245,7 @@ bool rtc_ds1307_write_square_wave(uint16_t frequency)
|
|||
return false;
|
||||
}
|
||||
const uint8_t address[] = {0x07}; // memory address for data
|
||||
return i2c_write(RTC_DS1307_I2C_ADDR, address, LENGTH(address), data, LENGTH(data)); // write current seconds with CH value
|
||||
return i2c_master_write(RTC_DS1307_I2C_ADDR, address, LENGTH(address), data, LENGTH(data)); // write current seconds with CH value
|
||||
}
|
||||
|
||||
bool rtc_ds1307_write_seconds(uint8_t seconds)
|
||||
|
|
@ -255,13 +255,13 @@ bool rtc_ds1307_write_seconds(uint8_t seconds)
|
|||
}
|
||||
uint8_t data[1] = {0}; // to read CH value data and write seconds value over I2C
|
||||
const uint8_t address[] = {0x00}; // memory address for data
|
||||
if (!i2c_read(RTC_DS1307_I2C_ADDR, address, LENGTH(address), data, LENGTH(data))) { // read seconds with CH value
|
||||
if (!i2c_master_read(RTC_DS1307_I2C_ADDR, address, LENGTH(address), data, LENGTH(data))) { // read seconds with CH value
|
||||
return false;
|
||||
}
|
||||
data[0] &= 0x80; // only keep CH flag
|
||||
data[0] |= (((seconds/10)%6)<<4)+(seconds%10); // encode seconds in BCD format
|
||||
|
||||
return i2c_write(RTC_DS1307_I2C_ADDR, address, LENGTH(address), data, LENGTH(data)); // write current seconds with previous CH value
|
||||
return i2c_master_write(RTC_DS1307_I2C_ADDR, address, LENGTH(address), data, LENGTH(data)); // write current seconds with previous CH value
|
||||
}
|
||||
|
||||
bool rtc_ds1307_write_minutes(uint8_t minutes)
|
||||
|
|
@ -273,7 +273,7 @@ bool rtc_ds1307_write_minutes(uint8_t minutes)
|
|||
data[0] = (((minutes/10)%6)<<4)+(minutes%10); // encode minutes in BCD format
|
||||
|
||||
const uint8_t address[] = {0x01}; // memory address for data
|
||||
return i2c_write(RTC_DS1307_I2C_ADDR, address, LENGTH(address), data, LENGTH(data)); // write time value on RTC
|
||||
return i2c_master_write(RTC_DS1307_I2C_ADDR, address, LENGTH(address), data, LENGTH(data)); // write time value on RTC
|
||||
}
|
||||
|
||||
bool rtc_ds1307_write_hours(uint8_t hours)
|
||||
|
|
@ -285,7 +285,7 @@ bool rtc_ds1307_write_hours(uint8_t hours)
|
|||
data[0] = (((hours/10)%3)<<4)+(hours%10); // encode hours in BCD 24h format
|
||||
|
||||
const uint8_t address[] = {0x02}; // memory address for data
|
||||
return i2c_write(RTC_DS1307_I2C_ADDR, address, LENGTH(address), data, LENGTH(data)); // write time value on RTC
|
||||
return i2c_master_write(RTC_DS1307_I2C_ADDR, address, LENGTH(address), data, LENGTH(data)); // write time value on RTC
|
||||
}
|
||||
|
||||
bool rtc_ds1307_write_day(uint8_t day)
|
||||
|
|
@ -297,7 +297,7 @@ bool rtc_ds1307_write_day(uint8_t day)
|
|||
data[0] = (day%8); // encode day in BCD format
|
||||
|
||||
const uint8_t address[] = {0x03}; // memory address for data
|
||||
return i2c_write(RTC_DS1307_I2C_ADDR, address, LENGTH(address), data, LENGTH(data)); // write time value on RTC
|
||||
return i2c_master_write(RTC_DS1307_I2C_ADDR, address, LENGTH(address), data, LENGTH(data)); // write time value on RTC
|
||||
}
|
||||
|
||||
bool rtc_ds1307_write_date(uint8_t date)
|
||||
|
|
@ -309,7 +309,7 @@ bool rtc_ds1307_write_date(uint8_t date)
|
|||
data[0] = (((date/10)%4)<<4)+(date%10); // encode date in BCD format
|
||||
|
||||
const uint8_t address[] = {0x04}; // memory address for data
|
||||
return i2c_write(RTC_DS1307_I2C_ADDR, address, LENGTH(address), data, LENGTH(data)); // write time value on RTC
|
||||
return i2c_master_write(RTC_DS1307_I2C_ADDR, address, LENGTH(address), data, LENGTH(data)); // write time value on RTC
|
||||
}
|
||||
|
||||
bool rtc_ds1307_write_month(uint8_t month)
|
||||
|
|
@ -321,7 +321,7 @@ bool rtc_ds1307_write_month(uint8_t month)
|
|||
data[0] = (((month/10)%2)<<4)+(month%10); // encode month in BCD format
|
||||
|
||||
const uint8_t address[] = {0x05}; // memory address for data
|
||||
return i2c_write(RTC_DS1307_I2C_ADDR, address, LENGTH(address), data, LENGTH(data)); // write time value on RTC
|
||||
return i2c_master_write(RTC_DS1307_I2C_ADDR, address, LENGTH(address), data, LENGTH(data)); // write time value on RTC
|
||||
}
|
||||
|
||||
bool rtc_ds1307_write_year(uint8_t year)
|
||||
|
|
@ -333,7 +333,7 @@ bool rtc_ds1307_write_year(uint8_t year)
|
|||
data[0] = (((year/10)%10)<<4)+(year%10); // encode year in BCD format
|
||||
|
||||
const uint8_t address[] = {0x06}; // memory address for data
|
||||
return i2c_write(RTC_DS1307_I2C_ADDR, address, LENGTH(address), data, LENGTH(data)); // write time value on RTC
|
||||
return i2c_master_write(RTC_DS1307_I2C_ADDR, address, LENGTH(address), data, LENGTH(data)); // write time value on RTC
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}
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bool rtc_ds1307_write_time(uint8_t seconds, uint8_t minutes, uint8_t hours, uint8_t day, uint8_t date, uint8_t month, uint8_t year)
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@ -344,7 +344,7 @@ bool rtc_ds1307_write_time(uint8_t seconds, uint8_t minutes, uint8_t hours, uint
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if (seconds>59) {
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return false;
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}
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if (!i2c_read(RTC_DS1307_I2C_ADDR, address, LENGTH(address), data, 1)) { // read seconds with CH value
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if (!i2c_master_read(RTC_DS1307_I2C_ADDR, address, LENGTH(address), data, 1)) { // read seconds with CH value
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return false;
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}
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data[0] &= 0x80; // only keep CH flag
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@ -380,7 +380,7 @@ bool rtc_ds1307_write_time(uint8_t seconds, uint8_t minutes, uint8_t hours, uint
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}
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data[6] = (((year/10)%10)<<4)+(year%10); // encode year in BCD format
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return i2c_write(RTC_DS1307_I2C_ADDR, address, LENGTH(address), data, LENGTH(data)); // write time value on RTC
|
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return i2c_master_write(RTC_DS1307_I2C_ADDR, address, LENGTH(address), data, LENGTH(data)); // write time value on RTC
|
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}
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bool rtc_ds1307_write_ram(uint8_t* data, uint8_t start, uint8_t length)
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@ -393,5 +393,5 @@ bool rtc_ds1307_write_ram(uint8_t* data, uint8_t start, uint8_t length)
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return false;
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}
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const uint8_t address[] = {0x08+start}; // memory address for data
|
||||
return i2c_write(RTC_DS1307_I2C_ADDR, address, LENGTH(address), data, LENGTH(data)); // write RAM (starting at 0x08)
|
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return i2c_master_write(RTC_DS1307_I2C_ADDR, address, LENGTH(address), data, LENGTH(data)); // write RAM (starting at 0x08)
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in New Issue