board/rsim_esp32s2.kicad_sch

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(title "rSIM")
(date "$date$")
(rev "$version$.$revision$")
(company "CuVoodoo")
(comment 1 "King Kévin")
(comment 2 "CERN-OHL-S")
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(text "UART:\nwe alway use UART0 for debuging\ndisabling it, including boot log, is not used\n\nESP32-S2 has 2 UARTs,\nallowing to simulate only one SIM\n\ndon't use UART1 pins IO17/IO18,\nso we can disable pins using GPIO matrix\n\nUART TX/RX could be shared, but requires more code\nESP32 has no half-duplex handling"
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(text "strapping pins:\nIO45, internal pull-down, VDD_SPI = 3.3V\nIO46, internal pull-down, must be 0\nIO0, external pull-up, boot 1=SPI 0=download\n\nIO18: U1RX pull up high to avoid dl error\nIO39-42: JTAG"
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(text "pulse counter:\nESP32 has only one PCTN\n\nwe use a GPIO for easy clock\nactivation/stop using ISR,\ninstead of shared with PCTN\n\npulse counter control signals:\n- 1x LED controller output for precise periodic pulse\n- 1x GPIO interrupt input to detect end of pulse\n- 1x PCTN input to gate pulse counter"
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(text "press to\nreset MCU" (at 126.365 24.765 0)
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(text "press while booting to\nstart DFU mode\nhold while running to\nerase settings"
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(text "ADC:\nmax. volage is Vref = 1.1V (1.0-1.2V)\nwith 11dB attenuation it's 2.6V"
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