7576 lines
384 KiB
Plaintext
7576 lines
384 KiB
Plaintext
(kicad_pcb (version 20211014) (generator pcbnew)
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(general
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(thickness 1.09)
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)
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(paper "A4")
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(title_block
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(title "USB-C cable tester")
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(date "$date$")
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(rev "$version$.$revision$")
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(company "CuVoodoo")
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(comment 1 "King Kévin")
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(comment 2 "CERN-OHL-S")
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)
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(layers
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(0 "F.Cu" signal)
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(31 "B.Cu" signal)
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(32 "B.Adhes" user "B.Adhesive")
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(33 "F.Adhes" user "F.Adhesive")
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(34 "B.Paste" user)
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(35 "F.Paste" user)
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(36 "B.SilkS" user "B.Silkscreen")
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(37 "F.SilkS" user "F.Silkscreen")
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(38 "B.Mask" user)
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(39 "F.Mask" user)
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(40 "Dwgs.User" user "User.Drawings")
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(41 "Cmts.User" user "User.Comments")
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(42 "Eco1.User" user "User.Eco1")
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(43 "Eco2.User" user "User.Eco2")
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(44 "Edge.Cuts" user)
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(45 "Margin" user)
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(46 "B.CrtYd" user "B.Courtyard")
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(47 "F.CrtYd" user "F.Courtyard")
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(48 "B.Fab" user)
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(49 "F.Fab" user)
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(50 "User.1" user)
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(51 "User.2" user)
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(52 "User.3" user)
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(53 "User.4" user)
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(54 "User.5" user)
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(55 "User.6" user)
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(56 "User.7" user)
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(57 "User.8" user)
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(58 "User.9" user)
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)
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(setup
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(stackup
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(layer "F.SilkS" (type "Top Silk Screen"))
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(layer "F.Paste" (type "Top Solder Paste"))
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(layer "F.Mask" (type "Top Solder Mask") (thickness 0.01))
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(layer "F.Cu" (type "copper") (thickness 0.035))
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(layer "dielectric 1" (type "core") (thickness 1) (material "FR4") (epsilon_r 4.5) (loss_tangent 0.02))
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(layer "B.Cu" (type "copper") (thickness 0.035))
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(layer "B.Mask" (type "Bottom Solder Mask") (thickness 0.01))
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(layer "B.Paste" (type "Bottom Solder Paste"))
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(layer "B.SilkS" (type "Bottom Silk Screen"))
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(copper_finish "HAL lead-free")
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(dielectric_constraints no)
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)
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(pad_to_mask_clearance 0)
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(aux_axis_origin 66.45 121.6)
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(grid_origin 70.4 141.1)
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(pcbplotparams
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(layerselection 0x00010fc_ffffffff)
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(disableapertmacros false)
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(usegerberextensions false)
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(usegerberattributes true)
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(usegerberadvancedattributes true)
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(creategerberjobfile true)
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(svguseinch false)
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(svgprecision 6)
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(excludeedgelayer true)
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(plotframeref false)
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(viasonmask false)
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(mode 1)
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(useauxorigin false)
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(hpglpennumber 1)
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(hpglpenspeed 20)
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(hpglpendiameter 15.000000)
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(dxfpolygonmode true)
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(dxfimperialunits true)
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(dxfusepcbnewfont true)
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(psnegative false)
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(psa4output false)
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(plotreference true)
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(plotvalue true)
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(plotinvisibletext false)
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(sketchpadsonfab false)
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(subtractmaskfromsilk false)
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(outputformat 1)
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(mirror false)
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(drillshape 0)
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(scaleselection 1)
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(outputdirectory "fabrication/")
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)
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)
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(net 0 "")
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(net 1 "VCC")
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(net 2 "GND")
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(net 3 "Net-(D2-Pad2)")
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(net 4 "/Dn")
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(net 5 "Net-(D4-Pad2)")
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(net 6 "Net-(D5-Pad1)")
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(net 7 "Net-(D6-Pad2)")
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(net 8 "Net-(D7-Pad2)")
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(net 9 "Net-(J1-PadA1)")
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(net 10 "/SS1")
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(net 11 "Net-(J1-PadA4)")
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(net 12 "/CC1")
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(net 13 "/Dp")
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(net 14 "/SBU")
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(net 15 "/VBUS")
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(net 16 "/SS2")
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(net 17 "/SS1-2")
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(net 18 "/CC2")
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(net 19 "unconnected-(J1-PadS2)")
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(net 20 "unconnected-(J1-PadS3)")
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(net 21 "unconnected-(J1-PadS4)")
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(net 22 "Net-(J2-PadA10)")
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(net 23 "Net-(J2-PadB2)")
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(net 24 "Net-(J2-PadB10)")
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(net 25 "/eMark")
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(net 26 "Net-(D1-Pad1)")
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(net 27 "Net-(D1-Pad2)")
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(net 28 "Net-(D3-Pad2)")
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(net 29 "Net-(D5-Pad2)")
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(net 30 "Net-(D8-Pad2)")
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(net 31 "Net-(D2-Pad1)")
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(net 32 "Net-(R5-Pad2)")
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(net 33 "Net-(R4-Pad2)")
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(footprint "mylib:UC1608X55N" (layer "F.Cu")
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(tedit 0) (tstamp 05661b74-1239-4676-a5a2-e9f6416b02c9)
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(at 76.9 127.1)
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(property "JLCPCB_CORRECTION" "0;0;90")
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(property "LCSC" "C21190")
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(property "Sheetfile" "usb-c_cable_tester.kicad_sch")
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(property "Sheetname" "")
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