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8 Commits

7 changed files with 2070 additions and 2850 deletions

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@ -1,3 +1,17 @@
v3
==
mainly a manufacturing update.
all parts are on one side.
the schematic remains fully compatible with v2.
changes:
- remove fuse as the designed has been proved, and the glues should prevent shorts
- put buttons on back side
- use button mounting holes as test points
v2
==

View File

@ -91,14 +91,16 @@ lib:
$(KIBOM) $< $@
# generate panel
PANEL_DIR := panel
panel: panel.kicad_pcb
panel.kicad_pcb: ${NAME}.versioned.kicad_pcb ${NAME}.versioned.kicad_pro ${NAME}.versioned.kicad_sch ${NAME}.versioned.json
kikit panelize -p ${NAME}.versioned.json ${NAME}.versioned.kicad_pcb $@
PANEL_DIR := panel_fab
panel: panel.kicad_pcb panel.brd-top.svg panel.brd-bot.svg panel.brd-top.png panel.brd-bot.png ${PANEL_DIR}
panel.kicad_pcb: ${NAME}.versioned.kicad_pcb ${NAME}.versioned.kicad_pro ${NAME}.versioned.kicad_sch panel.versioned.json
kikit panelize -p panel.versioned.json ${NAME}.versioned.kicad_pcb $@
sed --in-place 's/\"missing_courtyard\": \"warning\"/\"missing_courtyard\": \"ignore\"/g' $(patsubst %.kicad_pcb,%.kicad_pro,$@) # the mouse bites don't have a courtyard
kikit fab jlcpcb --assembly --missingError --field JLCPCB,LCSC --schematic ${NAME}.versioned.kicad_sch $@ ${PANEL_DIR}
pcbdraw --silent $@ --dpi 600 panel.brd-top.png
pcbdraw --silent $@ --dpi 600 --back panel.brd-bot.png
${PANEL_DIR}: ${NAME}.versioned.kicad_sch panel.kicad_pcb
kikit fab jlcpcb --assembly --missingError --field JLCPCB,LCSC --schematic $^ $@
clean:
rm -f $(foreach EXT,$(VERSIONED_EXT),${NAME}.versioned.$(EXT))
@ -106,5 +108,5 @@ clean:
rm -f ${NAME}.versioned.kicad_prl ${NAME}.versioned.kicad_pro-bak ${NAME}.versioned.xml ${NAME}.versioned.csv
rm -f ${IBOM}
rm -rf ${FABRICATION_DIR}
rm -f panel.kicad_pcb panel.kicad_pro
rm -f panel.versioned.json panel.kicad_pcb panel.kicad_pro panel.brd-top.svg panel.brd-bot.svg panel.brd-top.png panel.brd-bot.png
rm -rf ${PANEL_DIR}

61
panel.json Normal file
View File

@ -0,0 +1,61 @@
{
"layout": {
"type": "grid",
"rows": 6,
"cols": 5,
"hspace": "2mm",
"vspace": "2mm",
"hbackbone": "3mm",
"hboneskip": 2,
"vbonecut": false,
"hbonecut": false
},
"source": {
"type": "auto",
"tolerance": "15mm"
},
"tabs": {
"type": "annotation",
"width": "2mm"
},
"cuts": {
"type": "mousebites",
"drill": "0.5mm",
"spacing": "1mm",
"offset": "0.2mm",
"prolong": "0.5mm"
},
"framing": {
"type": "frame",
"width": "3mm",
"space": "2mm"
},
"tooling": {
"type": "3hole",
"hoffset": "1.5mm",
"voffset": "1.5mm",
"size": "1.152mm"
},
"fiducials": {
"type": "3fid",
"hoffset": "7mm",
"voffset": "1.5mm",
"coppersize": "1mm",
"opening": "2mm"
},
"text": {
"type": "simple",
"text": "passkey v$version$.$revision$ $date$ JLCJLCJLCJLC",
"anchor": "mt",
"voffset": "1.5mm",
"hoffset": "1.5mm",
"hjustify": "center",
"vjustify": "center"
},
"post": {
"type": "auto",
"millradius": "1mm",
"copperfill": true,
"refillzones": true
}
}

File diff suppressed because it is too large Load Diff

View File

@ -37,9 +37,9 @@
"other_text_thickness": 0.15,
"other_text_upright": false,
"pads": {
"drill": 0.7,
"height": 0.7,
"width": 0.7
"drill": 1.6,
"height": 1.5,
"width": 1.9
},
"silk_line_width": 0.15,
"silk_text_italic": false,
@ -64,17 +64,7 @@
"width": 0.15
}
],
"drc_exclusions": [
"annular_width|50100000|27500000|cfeece7e-3ac8-4654-8b6d-565fb942f1f6|00000000-0000-0000-0000-000000000000",
"annular_width|51450000|23500000|4cba8b24-e313-48b4-ba95-c576f7884c04|00000000-0000-0000-0000-000000000000",
"annular_width|51450000|25200000|7df18c58-ad9d-42a2-beb7-24719a47fa15|00000000-0000-0000-0000-000000000000",
"annular_width|51450000|29800000|841515e5-1b47-4a21-8190-999b4ec1821a|00000000-0000-0000-0000-000000000000",
"annular_width|51450000|31500000|98ebe259-acd5-45b9-bad7-3f376df1e1ab|00000000-0000-0000-0000-000000000000",
"courtyards_overlap|50418473|23324399|f0f52547-c1bb-4b8e-91e5-1f38ccc8ce9f|fe2ed533-3f51-4988-bfbf-537e793d3e56",
"courtyards_overlap|50418473|31424399|24463778-2471-4e8f-9f58-cd451882454c|688c08ea-8895-4d6e-9600-76033b1f8a87",
"missing_courtyard|50100000|27500000|691374ea-9958-41f4-b624-11ae0669c96b|00000000-0000-0000-0000-000000000000",
"silk_over_copper|51541541|32600000|4bad2e1c-19f5-45dd-aafa-138308d4fe5e|00000000-0000-0000-0000-000000000000"
],
"drc_exclusions": [],
"meta": {
"version": 2
},
@ -135,7 +125,7 @@
"max_error": 0.005,
"min_clearance": 0.127,
"min_connection": 0.0,
"min_copper_edge_clearance": 0.2,
"min_copper_edge_clearance": 0.1995,
"min_hole_clearance": 0.254,
"min_hole_to_hole": 0.254,
"min_microvia_diameter": 0.2,
@ -198,6 +188,7 @@
],
"track_widths": [
0.0,
0.15,
0.2,
0.3,
0.5

View File

@ -1736,192 +1736,6 @@
)
)
)
(symbol "partdb:fuse/nSMD005"
(pin_numbers hide)
(pin_names
(offset 0.254) hide)
(exclude_from_sim no)
(in_bom yes)
(on_board yes)
(property "Reference" "F"
(at 0 -1.524 0)
(effects
(font
(size 1.27 1.27)
)
)
)
(property "Value" "Fuse_Small"
(at 0 1.524 0)
(effects
(font
(size 1.27 1.27)
)
)
)
(property "Footprint" "qeda:FUSC3215X117N"
(at 0 0 0)
(effects
(font
(size 1.27 1.27)
)
(hide yes)
)
)
(property "Datasheet" "https://datasheet.lcsc.com/lcsc/2304140030_TECHFUSE-nSMD005_C70064.pdf"
(at 0 0 0)
(effects
(font
(size 1.27 1.27)
)
(hide yes)
)
)
(property "Description" "PTC fuse 150mA"
(at 0 0 0)
(effects
(font
(size 1.27 1.27)
)
(hide yes)
)
)
(property "qeda_part" "vreg/fuse_1206"
(at 0 0 0)
(effects
(font
(size 1.27 1.27)
)
(hide yes)
)
)
(property "qeda_variant" ""
(at 0 0 0)
(effects
(font
(size 1.27 1.27)
)
(hide yes)
)
)
(property "JLCPCB_CORRECTION" "0;0;90"
(at 0 0 0)
(effects
(font
(size 1.27 1.27)
)
(hide yes)
)
)
(property "LCSC" "C70064"
(at 0 0 0)
(effects
(font
(size 1.27 1.27)
)
(hide yes)
)
)
(property "JLCPCB" ""
(at 0 0 0)
(effects
(font
(size 1.27 1.27)
)
(hide yes)
)
)
(property "DigiKey" ""
(at 0 0 0)
(effects
(font
(size 1.27 1.27)
)
(hide yes)
)
)
(property "ki_keywords" "fuse"
(at 0 0 0)
(effects
(font
(size 1.27 1.27)
)
(hide yes)
)
)
(property "ki_fp_filters" "qeda:FUSC3215X117N"
(at 0 0 0)
(effects
(font
(size 1.27 1.27)
)
(hide yes)
)
)
(symbol "fuse/nSMD005_0_1"
(rectangle
(start -1.27 0.508)
(end 1.27 -0.508)
(stroke
(width 0)
(type default)
)
(fill
(type none)
)
)
(polyline
(pts
(xy -1.27 0) (xy 1.27 0)
)
(stroke
(width 0)
(type default)
)
(fill
(type none)
)
)
)
(symbol "fuse/nSMD005_1_1"
(pin passive line
(at -2.54 0 0)
(length 1.27)
(name "~"
(effects
(font
(size 1.27 1.27)
)
)
)
(number "1"
(effects
(font
(size 1.27 1.27)
)
)
)
)
(pin passive line
(at 2.54 0 180)
(length 1.27)
(name "~"
(effects
(font
(size 1.27 1.27)
)
)
)
(number "2"
(effects
(font
(size 1.27 1.27)
)
)
)
)
)
)
(symbol "partdb:resistor/0603WAF1002T5E"
(pin_numbers hide)
(pin_names hide)
@ -2680,16 +2494,6 @@
)
(uuid "33d3db10-bec1-4c01-92ab-e7b53b671f38")
)
(wire
(pts
(xy 38.1 22.86) (xy 43.18 22.86)
)
(stroke
(width 0)
(type default)
)
(uuid "37796d90-a675-453d-924e-6666b2444f46")
)
(wire
(pts
(xy 123.19 63.5) (xy 128.27 63.5)
@ -2842,7 +2646,7 @@
)
(wire
(pts
(xy 30.48 22.86) (xy 33.02 22.86)
(xy 30.48 22.86) (xy 43.18 22.86)
)
(stroke
(width 0)
@ -4267,7 +4071,7 @@
(hide yes)
)
)
(property "JLCPCB_CORRECTION" "0;0.7;180"
(property "JLCPCB_CORRECTION" "0;-0.7;180"
(at 118.11 55.88 0)
(effects
(font
@ -5301,128 +5105,6 @@
)
)
)
(symbol
(lib_id "partdb:fuse/nSMD005")
(at 35.56 22.86 0)
(unit 1)
(exclude_from_sim no)
(in_bom yes)
(on_board yes)
(dnp no)
(fields_autoplaced yes)
(uuid "a6d3bef2-6a56-4f3e-938d-88613121a58c")
(property "Reference" "F1"
(at 35.56 17.78 0)
(effects
(font
(size 1.27 1.27)
)
)
)
(property "Value" "50mA"
(at 35.56 20.32 0)
(effects
(font
(size 1.27 1.27)
)
)
)
(property "Footprint" "qeda:FUSC3215X117N"
(at 35.56 22.86 0)
(effects
(font
(size 1.27 1.27)
)
(hide yes)
)
)
(property "Datasheet" "https://datasheet.lcsc.com/lcsc/2304140030_TECHFUSE-nSMD005_C70064.pdf"
(at 35.56 22.86 0)
(effects
(font
(size 1.27 1.27)
)
(hide yes)
)
)
(property "Description" "PTC fuse 150mA"
(at 35.56 22.86 0)
(effects
(font
(size 1.27 1.27)
)
(hide yes)
)
)
(property "qeda_part" "vreg/fuse_1206"
(at 35.56 22.86 0)
(effects
(font
(size 1.27 1.27)
)
(hide yes)
)
)
(property "qeda_variant" ""
(at 35.56 22.86 0)
(effects
(font
(size 1.27 1.27)
)
(hide yes)
)
)
(property "JLCPCB_CORRECTION" "0;0;90"
(at 35.56 22.86 0)
(effects
(font
(size 1.27 1.27)
)
(hide yes)
)
)
(property "LCSC" "C70064"
(at 35.56 22.86 0)
(effects
(font
(size 1.27 1.27)
)
(hide yes)
)
)
(property "JLCPCB" ""
(at 35.56 22.86 0)
(effects
(font
(size 1.27 1.27)
)
(hide yes)
)
)
(property "DigiKey" ""
(at 35.56 22.86 0)
(effects
(font
(size 1.27 1.27)
)
(hide yes)
)
)
(pin "1"
(uuid "4f2e0367-1755-4f42-ba06-aecd573ff7c1")
)
(pin "2"
(uuid "928e4257-216c-41b8-b94b-a3a42da00959")
)
(instances
(project "passkey"
(path "/43fc3289-82a7-492c-a423-3030e10115dc"
(reference "F1")
(unit 1)
)
)
)
)
(symbol
(lib_id "partdb:capacitor/C0603 0.1uF 50V")
(at 162.56 34.29 0)
@ -6224,7 +5906,7 @@
(hide yes)
)
)
(property "JLCPCB_CORRECTION" "0;0.7;180"
(property "JLCPCB_CORRECTION" "0;-0.7;180"
(at 118.11 60.96 0)
(effects
(font

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@ -1 +1 @@
2
3