commit completed schematic and board layout

This commit is contained in:
King Kévin 2021-09-02 13:06:23 +02:00
parent e91356ffa3
commit 7531bae15c
4 changed files with 9224 additions and 609 deletions

9030
micro-usb_cable_tester.lht Normal file

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micro-usb_cable_tester.sch Normal file
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v 20191003 2
C 40000 44500 1 0 0 title.sym
{
T 41000 45200 5 10 1 1 0 0 1
date=$date$
T 44300 45200 5 10 1 1 0 0 1
org=CuVoodoo
T 44300 44900 5 10 1 1 0 0 1
authors=King Kévin
T 43000 45700 5 14 1 1 0 4 1
title=micro-USB cable tester
T 41000 44900 5 10 1 1 0 0 1
version=$version$
T 41000 44600 5 10 1 1 0 0 1
revision=$revision$
T 44300 44600 5 10 1 1 0 0 1
licence=CERN OHL v.1.2
T 40000 46300 5 10 0 0 0 0 1
device=none
T 40000 46500 5 10 0 0 0 0 1
footprint=none
}
C 41200 47300 1 0 0 USB20_RECEPTACLE.sym
{
T 41200 47300 5 8 0 0 0 0 1
footprint=CONNECTOR_USB20_RECEPTACLE.lht
T 41300 47460 5 10 1 1 0 3 1
refdes=J2
T 43240 49260 5 10 1 1 180 2 1
device=USB_2_A_RECEPTACLE
T 41200 47300 5 10 0 0 0 0 1
lcsc-id=C2345
}
C 40800 46600 1 0 1 USB_2_MICRO-B.sym
{
T 40800 46600 5 8 0 0 0 6 1
footprint=CONNECTOR_USB_2_MICRO-B.lht
T 38800 46760 5 10 1 1 0 3 1
refdes=J1
T 41040 49260 5 10 1 1 180 2 1
device=USB_2_MICRO-B_RECEPTACLE
T 40800 46600 5 10 0 0 0 0 1
lcsc-id=C319170
}
C 36800 45900 1 270 0 battery-1.sym
{
T 37700 45600 5 10 0 0 270 0 1
device=BATTERY
T 37300 45700 5 10 1 1 0 0 1
refdes=B1
T 36800 45900 5 10 0 0 270 0 1
footprint=CONNECTOR_CR2032.lht
T 37300 45400 5 10 1 1 0 0 1
value=CR2032
T 36800 45900 5 10 0 0 0 0 1
lcsc-id=C70376
}
C 36900 44800 1 0 0 gnd-1.sym
C 36800 45800 1 0 0 vcc-1.sym
C 38100 47900 1 0 0 gnd-1.sym
C 38000 49000 1 0 0 vcc-1.sym
N 38200 49000 38200 48800 4
C 37300 48500 1 0 1 led-2.sym
{
T 36700 48600 5 10 1 1 0 6 1
refdes=D1
T 37200 49100 5 10 0 0 0 6 1
device=LED
T 37300 48500 5 10 0 0 0 6 1
footprint=LEDC1608X90M.lht
T 36700 48900 5 10 1 1 0 0 1
value=BC
}
C 36400 48500 1 180 1 led-2.sym
{
T 36700 48400 5 10 1 1 0 6 1
refdes=D2
T 36500 47900 5 10 0 0 180 6 1
device=LED
T 36400 48500 5 10 0 0 180 6 1
footprint=LEDC1608X90M.lht
T 36700 48000 5 10 1 1 0 0 1
value=OTG
}
C 37300 48500 1 0 0 resistor-1.sym
{
T 37600 48900 5 10 0 0 0 0 1
device=RESISTOR
T 37200 48600 5 10 1 1 0 0 1
refdes=R1
T 37300 48500 5 10 0 0 0 0 1
footprint=RESC1608X55M.lht
}
C 37300 48300 1 0 0 resistor-1.sym
{
T 37600 48700 5 10 0 0 0 0 1
device=RESISTOR
T 37200 48400 5 10 1 1 0 0 1
refdes=R2
T 37300 48300 5 10 0 0 0 0 1
footprint=RESC1608X55M.lht
}
C 36100 48700 1 270 0 gnd-1.sym
C 36400 48200 1 90 0 vcc-1.sym
C 39300 46300 1 0 0 gnd-1.sym
N 39400 46600 40000 46600 4
C 43100 47200 1 0 1 led-2.sym
{
T 42500 47300 5 10 1 1 0 6 1
refdes=D4
T 43000 47800 5 10 0 0 0 6 1
device=LED
T 43100 47200 5 10 0 0 0 6 1
footprint=LEDC1608X90M.lht
T 42300 47000 5 10 1 1 0 0 1
value=SHIELD
}
C 43100 47200 1 0 0 resistor-1.sym
{
T 43400 47600 5 10 0 0 0 0 1
device=RESISTOR
T 43000 47300 5 10 1 1 0 0 1
refdes=R4
T 43100 47200 5 10 0 0 0 0 1
footprint=RESC1608X55M.lht
}
C 44900 48500 1 180 0 led-2.sym
{
T 44300 48400 5 10 1 1 0 6 1
refdes=D5
T 44800 47900 5 10 0 0 180 0 1
device=LED
T 44900 48500 5 10 0 0 180 0 1
footprint=LEDC1608X90M.lht
T 44000 48100 5 10 1 1 180 6 1
value=POWER
}
C 44900 48300 1 0 0 resistor-1.sym
{
T 45200 48700 5 10 0 0 0 0 1
device=RESISTOR
T 44800 48400 5 10 1 1 0 0 1
refdes=R5
T 44900 48300 5 10 0 0 0 0 1
footprint=RESC1608X55M.lht
}
N 43400 49000 45800 49000 4
N 44000 47300 45800 47300 4
C 43400 48700 1 0 0 led-2.sym
{
T 43700 48800 5 10 1 1 0 6 1
refdes=D3
T 43500 49300 5 10 0 0 0 0 1
device=LED
T 43400 48700 5 10 0 0 0 0 1
footprint=LEDC1608X90M.lht
T 44000 49100 5 10 1 1 0 6 1
value=DATA
}
C 44300 48700 1 0 0 resistor-1.sym
{
T 44600 49100 5 10 0 0 0 0 1
device=RESISTOR
T 44200 48800 5 10 1 1 0 0 1
refdes=R3
T 44300 48700 5 10 0 0 0 0 1
footprint=RESC1608X55M.lht
}
C 43400 48500 1 0 0 nc-right-1.sym
{
T 43500 49000 5 10 0 0 0 0 1
value=NoConnection
T 43500 49200 5 10 0 0 0 0 1
device=DRC_Directive
T 43500 49800 5 10 0 0 0 0 1
symversion=1.1
}
N 44000 48400 43400 48400 4
N 45200 48800 45200 48600 4
N 45200 48600 44000 48600 4
N 44000 48600 44000 48400 4
N 45800 47300 45800 49000 4
B 36000 44500 10000 5500 3 10 1 0 -1 -1 0 -1 -1 -1 -1 -1
C 41800 46900 1 0 0 nc-bottom-1.sym
{
T 41800 47500 5 10 0 0 0 0 1
value=NoConnection
T 41800 47900 5 10 0 0 0 0 1
device=DRC_Directive
T 41800 48300 5 10 0 0 0 0 1
symversion=1.1
}
N 37000 45900 37000 45800 4
N 37000 45200 37000 45100 4

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ha:pcb-rnd-board-v8 {
li:styles {
ha:Signal {
via_proto = 0
thickness = 6.0mil
text_thick = 0.0
text_scale = 100
clearance = 6.0mil
}
ha:Power {
via_proto = 1
thickness = 10.0mil
text_thick = 0.0
text_scale = 100
clearance = 10.0mil
}
ha:Fat {
via_proto = 2
thickness = 80.0mil
text_thick = 0.0
text_scale = 100
clearance = 25.0mil
}
ha:Sig-tight {
via_proto = 3
thickness = 10.0mil
text_thick = 0.0
text_scale = 100
clearance = 12.0mil
}
}
ha:meta {
ha:size {
thermal_scale = 0.500000
x = 100.0mm
y = 100.0mm
}
ha:grid {
spacing = 0.5mm
offs_x = 0.0
offs_y = 0.0
}
}
ha:data {
li:padstack_prototypes {
ha:ps_proto_v6.0 {
hdia=0.3mm; hplated=1; htop=0; hbottom=0;
li:shape {
ha:ps_shape_v4 {
ha:ps_circ { x=0.0; y=0.0; dia=0.6mm; }
ha:combining { }
ha:layer_mask {
copper = 1
top = 1
}
clearance=0.0
}
ha:ps_shape_v4 {
ha:ps_circ { x=0.0; y=0.0; dia=0.6mm; }
ha:combining { }
ha:layer_mask {
bottom = 1
copper = 1
}
clearance=0.0
}
ha:ps_shape_v4 {
ha:ps_circ { x=0.0; y=0.0; dia=0.6mm; }
ha:combining { }
ha:layer_mask {
copper = 1
intern = 1
}
clearance=0.0
}
}
}
ha:ps_proto_v6.1 {
hdia=0.5mm; hplated=1; htop=0; hbottom=0;
li:shape {
ha:ps_shape_v4 {
ha:ps_circ { x=0.0; y=0.0; dia=0.8mm; }
ha:combining { }
ha:layer_mask {
copper = 1
top = 1
}
clearance=0.0
}
ha:ps_shape_v4 {
ha:ps_circ { x=0.0; y=0.0; dia=0.8mm; }
ha:combining { }
ha:layer_mask {
bottom = 1
copper = 1
}
clearance=0.0
}
ha:ps_shape_v4 {
ha:ps_circ { x=0.0; y=0.0; dia=0.8mm; }
ha:combining { }
ha:layer_mask {
copper = 1
intern = 1
}
clearance=0.0
}
}
}
ha:ps_proto_v6.2 {
hdia=1.2mm; hplated=1; htop=0; hbottom=0;
li:shape {
ha:ps_shape_v4 {
ha:ps_circ { x=0.0; y=0.0; dia=3.5mm; }
ha:combining { }
ha:layer_mask {
copper = 1
top = 1
}
clearance=0.0
}
ha:ps_shape_v4 {
ha:ps_circ { x=0.0; y=0.0; dia=3.5mm; }
ha:combining { }
ha:layer_mask {
bottom = 1
copper = 1
}
clearance=0.0
}
ha:ps_shape_v4 {
ha:ps_circ { x=0.0; y=0.0; dia=3.5mm; }
ha:combining { }
ha:layer_mask {
copper = 1
intern = 1
}
clearance=0.0
}
}
}
ha:ps_proto_v6.3 {
hdia=0.8mm; hplated=1; htop=0; hbottom=0;
li:shape {
ha:ps_shape_v4 {
ha:ps_circ { x=0.0; y=0.0; dia=64.0mil; }
ha:combining { }
ha:layer_mask {
copper = 1
top = 1
}
clearance=0.0
}
ha:ps_shape_v4 {
ha:ps_circ { x=0.0; y=0.0; dia=64.0mil; }
ha:combining { }
ha:layer_mask {
bottom = 1
copper = 1
}
clearance=0.0
}
ha:ps_shape_v4 {
ha:ps_circ { x=0.0; y=0.0; dia=64.0mil; }
ha:combining { }
ha:layer_mask {
copper = 1
intern = 1
}
clearance=0.0
}
}
}
}
li:objects {
}
li:layers {
ha:top-sig {
lid=0
group=3
ha:combining { }
ha:attributes {
{pcb-rnd::key::vis}={<Key>l; Shift<Key>t}
{pcb-rnd::key::select}={<Key>l; <Key>t}
}
li:objects {
}
color = {#238b27}
}
ha:bottom-sig {
lid=1
group=10
ha:combining { }
ha:attributes {
{pcb-rnd::key::vis}={<Key>l; Shift<Key>b}
{pcb-rnd::key::select}={<Key>l; <Key>b}
}
li:objects {
}
color = {#38ee39}
}
ha:top-gnd {
lid=2
group=3
ha:combining { }
li:objects {
}
color = {#104e8b}
}
ha:bottom-gnd {
lid=3
group=10
ha:combining { }
li:objects {
}
color = {#6164ff}
}
ha:outline {
lid=4
group=7
ha:combining { }
li:objects {
}
color = {#00868b}
}
ha:bottom-silk {
lid=5
group=12
ha:combining { auto=1; }
ha:attributes {
{pcb-rnd::key::vis}={<Key>l; Shift<Key>x}
{pcb-rnd::key::select}={<Key>l; <Key>x}
}
li:objects {
}
color = {#000000}
}
ha:top-silk {
lid=6
group=1
ha:combining { auto=1; }
ha:attributes {
{pcb-rnd::key::vis}={<Key>l; Shift<Key>s}
{pcb-rnd::key::select}={<Key>l; <Key>s}
}
li:objects {
}
color = {#000000}
}
ha:top-paste {
lid=7
group=0
ha:combining { auto=1; }
li:objects {
}
color = {#cd00cd}
}
ha:top-mask {
lid=8
group=2
ha:combining { sub=1; auto=1; }
li:objects {
}
color = {#ff0000}
}
ha:bottom-mask {
lid=9
group=11
ha:combining { sub=1; auto=1; }
li:objects {
}
color = {#ff0000}
}
ha:bottom-paste {
lid=10
group=13
ha:combining { auto=1; }
li:objects {
}
color = {#cd00cd}
}
ha:slot-plated {
lid=11
group=14
ha:combining { auto=1; }
li:objects {
}
color = {#8b7355}
}
ha:slot-unplated {
lid=12
group=15
ha:combining { auto=1; }
li:objects {
}
color = {#00868b}
}
ha:top-assy {
lid=13
group=16
ha:combining { }
li:objects {
}
color = {#444444}
}
ha:bot-assy {
lid=14
group=17
ha:combining { }
li:objects {
}
color = {#444444}
}
ha:fab {
lid=15
group=18
ha:combining { auto=1; }
li:objects {
}
color = {#222222}
}
ha:top-courtyard {
lid=16
group=8
ha:combining { }
li:objects {
}
color = {#104e8b}
}
ha:bot-courtyard {
lid=17
group=9
ha:combining { }
li:objects {
}
color = {#cd3700}
}
ha:top-pwr {
lid=18
group=3
ha:combining { }
li:objects {
}
color = {#c24744}
}
ha:bottom-pwr {
lid=19
group=10
ha:combining { }
li:objects {
}
color = {#ff5759}
}
}
}
ha:layer_stack {
li:groups {
ha:0 {
name = top_paste
ha:type { top=1; paste=1; }
li:layers { 7; }
}
ha:1 {
name = top_silk
ha:type { silk=1; top=1; }
li:layers { 6; }
}
ha:2 {
name = top_mask
ha:type { top=1; mask=1; }
li:layers { 8; }
}
ha:3 {
name = top_copper
ha:type { copper=1; top=1; }
li:layers { 0; 18; 2; }
}
ha:4 {
name = grp_4
ha:type { substrate=1; intern=1; }
li:layers { }
ha:attributes {
thickness={0.7375mm }
}
}
ha:5 {
name = grp_6
ha:type { substrate=1; intern=1; }
li:layers { }
ha:attributes {
thickness={0.125mm }
}
}
ha:6 {
name = grp_8
ha:type { substrate=1; intern=1; }
li:layers { }
ha:attributes {
thickness={0.7375mm }
}
}
ha:7 {
name = global_outline
ha:type { boundary=1; }
li:layers { 4; }
purpose = uroute
}
ha:8 {
name = top-courtyard
ha:type { top=1; doc=1; }
li:layers { 16; }
ha:attributes {
init-invis=true
}
purpose = ko.courtyard
}
ha:9 {
name = bot-courtyard
ha:type { bottom=1; doc=1; }
li:layers { 17; }
ha:attributes {
init-invis=true
}
purpose = ko.courtyard
}
ha:10 {
name = bottom_copper
ha:type { bottom=1; copper=1; }
li:layers { 1; 19; 3; }
}
ha:11 {
name = bottom_mask
ha:type { bottom=1; mask=1; }
li:layers { 9; }
}
ha:12 {
name = bottom_silk
ha:type { silk=1; bottom=1; }
li:layers { 5; }
}
ha:13 {
name = bottom_paste
ha:type { bottom=1; paste=1; }
li:layers { 10; }
}
ha:14 {
name = pmech
ha:type { mech=1; }
li:layers { 11; }
purpose = proute
}
ha:15 {
name = umech
ha:type { mech=1; }
li:layers { 12; }
purpose = uroute
}
ha:16 {
name = top_assy
ha:type { top=1; doc=1; }
li:layers { 13; }
ha:attributes {
init-invis=1
}
purpose = assy
}
ha:17 {
name = bot_assy
ha:type { bottom=1; doc=1; }
li:layers { 14; }
ha:attributes {
init-invis=1
}
purpose = assy
}
ha:18 {
name = fab
ha:type { top=1; doc=1; }
li:layers { 15; }
ha:attributes {
init-invis=1
}
purpose = fab
}
}
}
li:pcb-rnd-conf-v1 {
ha:overwrite {
ha:design {
via_proto = 1
text_font_id = 0
text_scale = 100
min_slk = 0.15240000 mm
text_thickness = 0
line_thickness = 10.00 mil
ha:drc {
min_ring = 0.15 mm
min_copper_overlap = 6.0 mil
min_drill = 0.3 mm
}
min_wid = 0.15240000 mm
bloat = 0.15240000 mm
clearance = 10.00 mil
}
ha:editor {
grid_unit = mm
grids_idx = 11
grid = 500.00 um
}
ha:rc {
li:library_search_paths {
$(rc.path.design)/coraleda/subc
$(rc.path.design)/coraleda/subc
?../pcblib
?~/pcblib/
$(rc.path.share)/pcblib
}
}
}
}
ha:pixmaps {
}
}

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@ -1,22 +0,0 @@
v 20210626 2
C 0 0 1 0 0 title.sym
{
T 1000 700 5 10 1 1 0 0 1
date=$date$
T 4300 700 5 10 1 1 0 0 1
org=CuVoodoo
T 4300 400 5 10 1 1 0 0 1
authors=King Kévin
T 3000 1200 5 14 1 1 0 4 1
title=TITLE
T 1000 400 5 10 1 1 0 0 1
version=$version$
T 1000 100 5 10 1 1 0 0 1
revision=$revision$
T 4300 100 5 10 1 1 0 0 1
licence=CERN-OHL-S
T 0 1800 5 10 0 0 0 0 1
device=none
T 0 2000 5 10 0 0 0 0 1
footprint=none
}