board/pd_blocker.sch

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v 20211219 2
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C 9300 0 1 0 0 title.sym
{
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T 10300 700 5 10 1 1 0 0 1
date=$date$
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T 13600 700 5 10 1 1 0 0 1
org=CuVoodoo
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T 13600 400 5 10 1 1 0 0 1
authors=King Kévin
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T 12300 1200 5 14 1 1 0 4 1
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title=USB-C Power Delivery blocker
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T 10300 400 5 10 1 1 0 0 1
version=$version$
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T 10300 100 5 10 1 1 0 0 1
revision=$revision$
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T 13600 100 5 10 1 1 0 0 1
licence=CERN-OHL-S
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T 9300 1800 5 10 0 0 0 0 1
device=none
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T 9300 2000 5 10 0 0 0 0 1
footprint=none
}
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C 3700 1900 1 0 0 chassis.sym
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C 3700 6000 1 0 0 chassis.sym
C 2200 6100 1 0 0 GND.sym
N 2300 6300 2300 6500 4
N 2500 6300 2500 6500 4
N 2700 6300 2700 6500 4
N 2900 6300 2900 6500 4
C 2200 2000 1 0 0 GND.sym
N 2300 2200 2300 2400 4
N 2500 2200 2500 2400 4
N 2700 2200 2700 2400 4
N 2900 2200 2900 2400 4
N 3000 5600 3000 5400 4
N 3400 5600 3400 5400 4
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N 3900 2200 3900 2400 4
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N 2800 5600 2800 5400 4
N 2800 9700 2800 9500 4
N 2800 9700 3400 9700 4
{
T 2800 9700 5 10 1 1 0 0 1
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netname=VBUS1
}
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N 3000 9700 3000 9500 4
N 3200 9700 3200 9500 4
N 3400 9700 3400 9500 4
N 2800 5600 3400 5600 4
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{
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T 2800 5600 5 10 1 1 0 0 1
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netname=VBUS2
}
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N 3200 5600 3200 5400 4
N 2300 6300 2900 6300 4
N 3300 6300 3900 6300 4
N 3300 6300 3300 6500 4
N 2300 2200 2900 2200 4
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N 3300 2400 3300 2200 4
N 3300 2200 3900 2200 4
N 3700 2400 3700 2200 4
N 3500 2400 3500 2200 4
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N 5200 8700 6000 8700 4
{
T 5500 8700 5 10 1 1 0 0 1
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netname=RX1+
}
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N 5200 8500 6000 8500 4
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{
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T 5500 8500 5 10 1 1 0 0 1
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netname=RX1-
}
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N 5200 8300 6000 8300 4
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{
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T 5500 8300 5 10 1 1 0 0 1
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netname=SBU2
}
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N 5200 8100 6000 8100 4
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{
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T 5500 8100 5 10 1 1 0 0 1
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netname=D-B
}
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N 5200 7900 6000 7900 4
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{
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T 5500 7900 5 10 1 1 0 0 1
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netname=D+B
}
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N 5200 7700 6000 7700 4
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{
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T 5500 7700 5 10 1 1 0 0 1
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netname=CC2
}
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N 5200 7500 6000 7500 4
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{
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T 5500 7500 5 10 1 1 0 0 1
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netname=TX2-
}
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N 5200 7300 6000 7300 4
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{
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T 5500 7300 5 10 1 1 0 0 1
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netname=TX2+
}
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N 1000 8700 200 8700 4
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{
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T 700 8700 5 10 1 1 0 6 1
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netname=TX1+
}
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N 1000 8500 200 8500 4
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{
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T 700 8500 5 10 1 1 0 6 1
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netname=TX1-
}
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N 1000 8300 200 8300 4
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{
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T 700 8300 5 10 1 1 0 6 1
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netname=CC1
}
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N 1000 8100 200 8100 4
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{
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T 700 8100 5 10 1 1 0 6 1
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netname=D+A
}
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N 1000 7900 200 7900 4
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{
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T 700 7900 5 10 1 1 0 6 1
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netname=D-A
}
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N 1000 7700 200 7700 4
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{
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T 700 7700 5 10 1 1 0 6 1
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netname=SBU1
}
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N 1000 7500 200 7500 4
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{
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T 700 7500 5 10 1 1 0 6 1
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netname=RX2-
}
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N 1000 7300 200 7300 4
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{
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T 700 7300 5 10 1 1 0 6 1
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netname=RX2+
}
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N 5200 4600 6000 4600 4
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{
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T 5500 4600 5 10 1 1 0 0 1
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netname=RX1+
}
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N 5200 4400 6000 4400 4
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{
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T 5500 4400 5 10 1 1 0 0 1
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netname=RX1-
}
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N 5200 4200 6000 4200 4
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{
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T 5500 4200 5 10 1 1 0 0 1
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netname=SBU2
}
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N 5200 4000 6000 4000 4
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{
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T 5500 4000 5 10 1 1 0 0 1
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netname=D-B
}
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N 5200 3800 6000 3800 4
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{
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T 5500 3800 5 10 1 1 0 0 1
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netname=D+B
}
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N 5200 3600 6000 3600 4
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{
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T 5500 3600 5 10 1 1 0 0 1
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netname=CC2
}
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N 5200 3400 6000 3400 4
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{
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T 5500 3400 5 10 1 1 0 0 1
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netname=TX2-
}
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N 5200 3200 6000 3200 4
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{
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T 5500 3200 5 10 1 1 0 0 1
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netname=TX2+
}
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N 1000 4600 200 4600 4
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{
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T 700 4600 5 10 1 1 0 6 1
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netname=TX1+
}
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N 1000 4400 200 4400 4
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{
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T 700 4400 5 10 1 1 0 6 1
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netname=TX1-
}
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N 1000 4200 200 4200 4
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{
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T 700 4200 5 10 1 1 0 6 1
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netname=CC1
}
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N 1000 4000 200 4000 4
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{
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T 700 4000 5 10 1 1 0 6 1
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netname=D+A
}
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N 1000 3800 200 3800 4
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{
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T 700 3800 5 10 1 1 0 6 1
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netname=D-A
}
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N 1000 3600 200 3600 4
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{
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T 700 3600 5 10 1 1 0 6 1
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netname=SBU1
}
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N 1000 3400 200 3400 4
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{
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T 700 3400 5 10 1 1 0 6 1
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netname=RX2-
}
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N 1000 3200 200 3200 4
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{
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T 700 3200 5 10 1 1 0 6 1
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netname=RX2+
}
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C 4100 400 1 270 1 C0603.sym
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{
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T 4100 400 5 8 0 0 90 2 1
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footprint=CAPC1608X92N.lht
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T 4700 720 5 10 1 1 0 3 1
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refdes=C2
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T 4180 600 5 10 0 1 90 3 1
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device=C0603
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T 4600 400 5 10 1 1 0 0 1
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value=100nF
}
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C 3900 400 1 90 0 C0603.sym
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{
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T 3900 400 5 8 0 0 90 0 1
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footprint=CAPC1608X92N.lht
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T 3300 720 5 10 1 1 0 3 1
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refdes=C1
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T 3820 600 5 10 0 1 90 5 1
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device=C0603
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T 3500 400 5 10 1 1 0 6 1
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value=100nF
}
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C 4300 200 1 0 0 GND.sym
C 3500 200 1 0 0 GND.sym
N 4400 800 4400 1300 4
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{
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T 4400 900 5 10 1 1 90 0 1
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netname=CC2
}
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N 3600 800 3600 1300 4
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{
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T 3600 900 5 10 1 1 90 0 1
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netname=CC1
}
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T 5500 600 9 10 1 0 0 0 3
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capacitors block PD communication
by smoothing out the 300 Kpbs signal,
but still permits Rx identification
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C 9400 6100 1 270 1 40P05.sym
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{
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T 9400 6100 5 8 0 0 90 2 1
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footprint=SOT95P237X112-3N.lht
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T 9460 7160 5 10 1 1 180 8 1
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refdes=Q1
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T 10340 7160 5 10 1 1 0 6 1
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device=40P05
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T 9400 6100 5 10 0 1 0 0 1
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lcsc=C2886385
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T 9400 6100 5 10 0 1 0 0 1
value=AP40P05
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}
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C 8600 4000 1 0 0 GND.sym
N 7000 7100 9400 7100 4
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{
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T 7000 7100 5 10 1 1 0 0 1
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netname=VBUS1
}
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N 7600 5000 7400 5000 4
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{
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T 7200 5000 5 10 1 1 0 0 1
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netname=VREF
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}
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T 10700 7400 9 10 1 0 0 0 2
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Vgs limit (± 20V) never reached because
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pulled down only when VBUS ≤ 5.5V
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C 6900 6700 1 270 0 resistor-1.sym
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{
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T 7300 6400 5 10 0 0 270 0 1
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device=RESISTOR
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T 6800 6300 5 10 1 1 0 6 1
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refdes=R1
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T 6800 6000 5 10 1 1 0 6 1
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value=34k
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T 7400 6500 5 10 0 1 270 0 1
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footprint=UC1608X55N.lht
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T 6900 6700 5 10 0 1 0 0 1
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description=resistor, chip, 0603 (metric 1608), 1%
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T 6900 6700 5 10 0 1 0 0 1
lcsc=C2933202
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}
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C 6900 5200 1 270 0 resistor-1.sym
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{
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T 7300 4900 5 10 0 0 270 0 1
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device=RESISTOR
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T 6800 4800 5 10 1 1 0 6 1
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refdes=R2
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T 6800 4500 5 10 1 1 0 6 1
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value=21k
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T 7400 5000 5 10 0 1 270 0 1
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footprint=UC1608X55N.lht
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T 6900 5200 5 10 0 1 0 0 1
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description=resistor, chip, 0603 (metric 1608), 1%
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T 6900 5200 5 10 0 1 0 0 1
lcsc=C22956
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}
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T 6700 5900 9 10 1 0 180 0 2
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Vref = R2/(R1+R2) * Vover
2.1 = 21/(34+21) *5.5
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C 6900 4100 1 0 0 GND.sym
N 7000 5800 7000 5200 4
N 7600 5200 7000 5200 4
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{
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T 7800 5200 5 10 1 1 0 6 1
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netname=VOVER1
}
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N 7000 7100 7000 6700 4
C 12000 6100 1 90 0 40P05.sym
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{
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T 12000 6100 5 8 0 0 90 0 1
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footprint=SOT95P237X112-3N.lht
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T 11940 7160 5 10 1 1 180 2 1
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refdes=Q2
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T 11060 7160 5 10 1 1 0 0 1
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device=40P05
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T 12000 6100 5 10 0 1 0 0 1
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lcsc=C2886385
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T 12000 6100 5 10 0 1 0 0 1
value=AP40P05
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}
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C 12800 4000 1 0 1 GND.sym
N 14400 7100 12000 7100 4
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{
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T 14400 7100 5 10 1 1 0 6 1
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netname=VBUS2
}
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N 13800 5000 14000 5000 4
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{
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T 14200 5000 5 10 1 1 0 6 1
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netname=VREF
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}
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C 14500 6700 1 90 1 resistor-1.sym
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{
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T 14100 6400 5 10 0 0 270 2 1
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device=RESISTOR
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T 14000 6500 5 10 0 1 270 2 1
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footprint=UC1608X55N.lht
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T 14600 6300 5 10 1 1 0 0 1
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refdes=R5
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T 14600 6000 5 10 1 1 0 0 1
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value=34k
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T 14500 6700 5 10 0 1 0 0 1
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description=resistor, chip, 0603 (metric 1608), 1%
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T 14500 6700 5 10 0 1 0 0 1
lcsc=C2933202
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}
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C 14500 5200 1 90 1 resistor-1.sym
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{
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T 14100 4900 5 10 0 0 270 2 1
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device=RESISTOR
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T 14000 5000 5 10 0 1 270 2 1
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footprint=UC1608X55N.lht
2022-04-12 15:48:55 +02:00
T 14600 4800 5 10 1 1 0 0 1
2022-04-12 15:16:06 +02:00
refdes=R6
2022-04-12 15:48:55 +02:00
T 14600 4500 5 10 1 1 0 0 1
2022-04-12 15:16:06 +02:00
value=21k
2022-04-12 15:48:55 +02:00
T 14500 5200 5 10 0 1 0 0 1
2022-03-23 10:46:51 +01:00
description=resistor, chip, 0603 (metric 1608), 1%
2022-04-14 14:12:54 +02:00
T 14500 5200 5 10 0 1 0 0 1
lcsc=C22956
2022-03-23 10:46:51 +01:00
}
2022-04-12 15:48:55 +02:00
C 14500 4100 1 0 1 GND.sym
N 14400 5800 14400 5200 4
N 13800 5200 14400 5200 4
2022-03-23 10:46:51 +01:00
{
2022-04-12 15:48:55 +02:00
T 13600 5200 5 10 1 1 0 0 1
2022-03-23 10:46:51 +01:00
netname=VOVER2
}
2022-04-12 15:48:55 +02:00
N 14400 7100 14400 6700 4
N 10600 7100 10800 7100 4
2022-03-23 10:46:51 +01:00
{
2022-04-12 15:48:55 +02:00
T 10500 7100 5 10 1 1 0 0 1
2022-03-23 10:46:51 +01:00
netname=VBUS
}
2022-04-12 15:48:55 +02:00
C 800 0 1 0 0 HEADER-2.54-1x10.sym
2022-03-23 10:46:51 +01:00
{
2022-04-12 15:48:55 +02:00
T 800 0 5 8 0 0 0 0 1
2022-03-23 10:46:51 +01:00
footprint=CONNECTOR_HEADER-2.54-1X10.lht
2022-04-12 15:48:55 +02:00
T 1400 2360 5 10 1 1 0 3 1
2022-03-23 10:46:51 +01:00
refdes=J3
2022-04-12 15:48:55 +02:00
T 1400 40 5 10 0 1 0 5 1
2022-03-23 10:46:51 +01:00
device=HEADER-2.54-1x10
2022-04-14 13:22:11 +02:00
T 700 2400 5 10 1 1 0 6 1
2022-03-23 10:46:51 +01:00
value=DEBUG
}
2022-04-12 15:48:55 +02:00
N 800 1300 100 1300 4
2022-03-23 10:46:51 +01:00
{
2022-04-12 15:48:55 +02:00
T 800 1300 5 10 1 1 0 6 1
netname=VREF
2022-03-23 10:46:51 +01:00
}
2022-04-12 15:48:55 +02:00
N 800 1700 100 1700 4
2022-03-23 10:46:51 +01:00
{
2022-04-12 15:48:55 +02:00
T 800 1700 5 10 1 1 0 6 1
2022-03-23 10:46:51 +01:00
netname=VOVER1
}
2022-04-12 15:48:55 +02:00
N 800 700 100 700 4
2022-03-23 10:46:51 +01:00
{
2022-04-12 15:48:55 +02:00
T 800 700 5 10 1 1 0 6 1
2022-03-23 10:46:51 +01:00
netname=VOVER2
}
2022-04-12 15:48:55 +02:00
N 800 1100 100 1100 4
2022-03-23 10:46:51 +01:00
{
2022-04-12 15:48:55 +02:00
T 800 1100 5 10 1 1 0 6 1
2022-03-23 10:46:51 +01:00
netname=VBUS
}
2022-04-12 15:48:55 +02:00
C 1000 2400 1 0 0 XKB_U262-24XN-4BV60.sym
2022-03-23 10:46:51 +01:00
{
2022-04-12 15:48:55 +02:00
T 1000 2400 5 8 0 0 0 0 1
2022-03-23 10:46:51 +01:00
footprint=CONNECTOR_XKB_U262-24XN-4BV60.lht
2022-04-12 15:48:55 +02:00
T 1400 5060 5 10 1 1 0 0 1
2022-03-23 10:46:51 +01:00
refdes=J2
2022-04-12 15:48:55 +02:00
T 3960 2740 5 10 0 1 0 2 1
2022-03-23 10:46:51 +01:00
device=XKB_U262-24XN-4BV60
2022-04-12 15:48:55 +02:00
T 3500 5100 5 10 1 1 0 0 1
2022-03-23 10:46:51 +01:00
value=USB-C receptacle
2022-04-12 15:48:55 +02:00
T 3800 4100 5 10 0 1 0 0 1
2022-03-23 10:46:51 +01:00
lcsc=C388659
}
2022-04-12 15:48:55 +02:00
C 1000 6500 1 0 0 XKB_U261-24XN-4BC2LS.sym
2022-03-23 10:46:51 +01:00
{
2022-04-12 15:48:55 +02:00
T 1000 6500 5 8 0 0 0 0 1
2022-03-23 10:46:51 +01:00
footprint=CONNECTOR_XKB_U261-24XN-4BC2LS.lht
2022-04-12 15:48:55 +02:00
T 1400 9160 5 10 1 1 0 0 1
2022-03-23 10:46:51 +01:00
refdes=J1
2022-04-12 15:48:55 +02:00
T 4060 6840 5 10 0 1 0 2 1
2022-03-23 10:46:51 +01:00
device=XKB_U261-24XN-4BC2LS
2022-04-12 15:48:55 +02:00
T 1000 6500 5 10 0 0 0 0 1
2022-03-23 10:46:51 +01:00
lcsc=C2880648
2022-04-12 15:48:55 +02:00
T 3600 9200 5 10 1 1 0 0 1
2022-03-23 10:46:51 +01:00
value=USB-C plug
}
2022-04-12 15:48:55 +02:00
N 3900 6300 3900 6500 4
N 3700 6300 3700 6500 4
N 3500 6300 3500 6500 4
T 6400 9500 9 10 1 0 0 0 1
2022-04-13 17:17:39 +02:00
over-voltage protection (5.5V)
2022-04-12 15:48:55 +02:00
T 2800 1500 9 10 1 0 0 0 1
2022-04-08 16:32:30 +02:00
communication protection
2022-04-12 15:48:55 +02:00
T 7400 7400 9 10 1 0 0 0 2
2022-04-08 16:32:30 +02:00
two pMOS are required to
2022-04-12 15:16:06 +02:00
block VBUS in both directions
2022-04-12 15:48:55 +02:00
C 7400 8800 1 0 0 BAV74_part-1-2-D1.sym
2022-04-08 16:32:30 +02:00
{
2022-04-12 15:48:55 +02:00
T 7400 8800 5 8 0 0 0 0 1
2022-04-08 16:32:30 +02:00
footprint=SOT95P237X112-3N.lht
2022-04-12 15:48:55 +02:00
T 7600 9160 5 10 1 1 0 3 1
2022-04-08 16:32:30 +02:00
refdes=D1
2022-04-12 15:48:55 +02:00
T 7600 8840 5 10 1 1 0 5 1
2022-04-08 16:32:30 +02:00
device=BAV74
2022-04-14 14:12:54 +02:00
T 7400 8800 5 10 0 1 0 0 1
lcsc=C2919768
T 7400 8800 5 10 0 1 0 0 1
value=BAV74
2022-04-08 16:32:30 +02:00
}
2022-04-12 15:48:55 +02:00
C 8600 8800 1 0 1 BAV74_part-2-2-D2.sym
2022-04-08 16:32:30 +02:00
{
2022-04-12 15:48:55 +02:00
T 8600 8800 5 8 0 0 0 6 1
2022-04-08 16:32:30 +02:00
footprint=SOT95P237X112-3N.lht
2022-04-12 15:48:55 +02:00
T 8400 9160 5 10 1 1 0 3 1
2022-04-08 16:32:30 +02:00
refdes=D1
2022-04-12 15:48:55 +02:00
T 8400 8840 5 10 1 1 0 5 1
2022-04-08 16:32:30 +02:00
device=BAV74
2022-04-14 14:12:54 +02:00
T 8600 8800 5 10 0 1 0 0 1
lcsc=C2919768
T 8600 8800 5 10 0 1 0 0 1
value=BAV74
2022-04-08 16:32:30 +02:00
}
2022-04-12 15:48:55 +02:00
T 6600 8200 9 10 1 0 0 0 2
2022-04-08 16:32:30 +02:00
diodes prevent VBUS
cross-leakage
2022-04-12 15:48:55 +02:00
C 7800 9000 1 0 0 VCC.sym
N 7400 9000 6700 9000 4
2022-04-08 16:32:30 +02:00
{
2022-04-12 15:48:55 +02:00
T 7400 9000 5 10 1 1 0 6 1
2022-04-08 16:32:30 +02:00
netname=VBUS1
}
2022-04-12 15:48:55 +02:00
N 7800 9000 8200 9000 4
N 8600 9000 9300 9000 4
2022-04-08 16:32:30 +02:00
{
2022-04-12 15:48:55 +02:00
T 8600 9000 5 10 1 1 0 0 1
2022-04-08 16:32:30 +02:00
netname=VBUS2
}
2022-04-12 15:48:55 +02:00
C 12500 6000 1 0 0 VCC.sym
C 8500 6000 1 0 0 VCC.sym
C 9500 7100 1 90 1 resistor-1.sym
2022-04-08 16:42:05 +02:00
{
2022-04-12 15:48:55 +02:00
T 9100 6800 5 10 0 0 270 2 1
2022-04-08 16:42:05 +02:00
device=RESISTOR
2022-04-12 15:48:55 +02:00
T 9200 6700 5 10 1 1 0 6 1
2022-04-12 15:16:06 +02:00
refdes=R3
2022-04-12 15:48:55 +02:00
T 9200 6400 5 10 1 1 0 6 1
2022-04-08 16:42:05 +02:00
value=100k
2022-04-12 15:48:55 +02:00
T 9000 6900 5 10 0 1 270 2 1
2022-04-08 16:42:05 +02:00
footprint=UC1608X55N.lht
2022-04-12 15:48:55 +02:00
T 9500 7100 5 10 0 1 0 6 1
2022-04-08 16:42:05 +02:00
description=resistor, chip, 0603 (metric 1608), 1%
}
2022-04-12 15:48:55 +02:00
N 9400 6100 9800 6100 4
C 11900 7100 1 270 0 resistor-1.sym
2022-04-08 16:42:05 +02:00
{
2022-04-12 15:48:55 +02:00
T 12300 6800 5 10 0 0 270 0 1
2022-04-08 16:42:05 +02:00
device=RESISTOR
2022-04-12 15:48:55 +02:00
T 12400 6900 5 10 0 1 270 0 1
2022-04-08 16:42:05 +02:00
footprint=UC1608X55N.lht
2022-04-12 15:48:55 +02:00
T 12200 6700 5 10 1 1 0 0 1
2022-04-12 15:16:06 +02:00
refdes=R4
2022-04-12 15:48:55 +02:00
T 12200 6400 5 10 1 1 0 0 1
2022-04-08 16:42:05 +02:00
value=100k
2022-04-12 15:48:55 +02:00
T 11900 7100 5 10 0 1 0 6 1
2022-04-08 16:42:05 +02:00
description=resistor, chip, 0603 (metric 1608), 1%
}
2022-04-12 15:48:55 +02:00
N 11600 6100 12000 6100 4
N 9800 6100 9800 5100 4
T 9600 4600 9 10 1 0 0 0 2
LM339 comparator has
2022-04-12 15:16:06 +02:00
open-collector output
2022-04-12 15:48:55 +02:00
C 10200 8400 1 0 0 HT75xx-3.sym
2022-04-12 15:16:06 +02:00
{
2022-04-12 15:48:55 +02:00
T 10200 8400 5 8 0 0 0 0 1
2022-04-12 15:23:59 +02:00
footprint=SOT95P280X145-5N.lht
2022-04-12 15:48:55 +02:00
T 10750 9560 5 10 1 1 0 3 1
2022-04-12 15:23:59 +02:00
refdes=U1
2022-04-12 15:48:55 +02:00
T 11260 8740 5 10 0 1 0 2 1
2022-04-12 15:16:06 +02:00
device=HT75xx-3
2022-04-12 15:48:55 +02:00
T 11100 9600 5 10 1 1 0 0 1
2022-04-12 15:16:06 +02:00
value=HT7521-3
2022-04-14 14:12:54 +02:00
T 11500 9000 5 10 0 1 0 0 1
lcsc=C259655
2022-04-12 15:16:06 +02:00
}
2022-04-12 15:48:55 +02:00
T 11300 8400 9 10 1 0 0 0 2
2022-04-12 15:16:06 +02:00
Vref ≤ VBUSmin - D1_Vf - LM393_Vicm
Vref ≤ 4.75 - 0.715 - 1.5 = 2.5V
2022-04-12 15:48:55 +02:00
C 10000 9300 1 0 0 VCC.sym
C 11100 8200 1 0 0 GND.sym
N 12300 9300 12900 9300 4
2022-04-12 15:16:06 +02:00
{
2022-04-12 15:48:55 +02:00
T 12400 9300 5 10 1 1 0 0 1
2022-04-12 15:16:06 +02:00
netname=VREF
}
2022-04-12 15:48:55 +02:00
N 11600 5100 11600 6100 4
C 7600 4200 1 0 0 LM339PW_part-1-4-COMP1.sym
2022-04-12 15:23:59 +02:00
{
2022-04-12 15:48:55 +02:00
T 7600 4200 5 8 0 0 0 0 1
2022-04-12 15:23:59 +02:00
footprint=SOP65P640X120-14N.lht
2022-04-12 15:48:55 +02:00
T 8000 5620 5 10 1 1 0 0 1
2022-04-12 15:23:59 +02:00
refdes=U2
2022-04-12 15:48:55 +02:00
T 8800 4360 5 10 1 1 0 0 1
2022-04-12 15:23:59 +02:00
device=LM339PW
2022-04-14 14:12:54 +02:00
T 7600 4200 5 10 0 1 0 0 1
value=LM339PWR
T 7600 4200 5 10 0 1 0 0 1
lcsc=C42184
2022-04-12 15:23:59 +02:00
}
2022-04-12 15:48:55 +02:00
C 13800 4200 1 0 1 LM339PW_part-3-4-COMP3.sym
2022-04-12 15:23:59 +02:00
{
2022-04-12 15:48:55 +02:00
T 13800 4200 5 8 0 0 0 6 1
2022-04-12 15:23:59 +02:00
footprint=SOP65P640X120-14N.lht
2022-04-12 15:48:55 +02:00
T 12200 5620 5 10 1 1 0 6 1
2022-04-12 15:23:59 +02:00
refdes=U2
2022-04-12 15:48:55 +02:00
T 13800 4360 5 10 1 1 0 6 1
2022-04-12 15:23:59 +02:00
device=LM339PW
2022-04-14 14:12:54 +02:00
T 13800 4200 5 10 0 1 0 0 1
value=LM339PWR
T 13800 4200 5 10 0 1 0 0 1
lcsc=C42184
2022-04-12 15:23:59 +02:00
}
2022-04-12 15:48:55 +02:00
N 9400 6200 9400 6100 4
N 12000 6200 12000 6100 4
C 10200 2500 1 0 1 LED0603.sym
{
T 10200 2500 5 8 0 0 0 6 1
footprint=LEDC1608X90N.lht
T 10000 2860 5 10 1 1 0 3 1
refdes=D2
T 10000 2540 5 10 0 1 0 5 1
device=LED0603
T 10100 2400 5 10 1 1 0 6 1
value=red
}
C 7600 1800 1 0 0 LM339PW_part-2-4-COMP2.sym
{
T 7600 1800 5 8 0 0 0 0 1
footprint=SOP65P640X120-14N.lht
T 8000 3220 5 10 1 1 0 0 1
refdes=U2
T 8800 1960 5 10 1 1 0 0 1
device=LM339PW
2022-04-14 14:12:54 +02:00
T 7600 1800 5 10 0 1 0 0 1
value=LM339PWR
T 7600 1800 5 10 0 1 0 0 1
lcsc=C42184
2022-04-12 15:48:55 +02:00
}
C 13800 1800 1 0 1 LM339PW_part-4-4-COMP4.sym
{
T 13800 1800 5 8 0 0 0 6 1
footprint=SOP65P640X120-14N.lht
T 12200 3220 5 10 1 1 0 6 1
refdes=U2
T 13800 1960 5 10 1 1 0 6 1
device=LM339PW
2022-04-14 14:12:54 +02:00
T 13800 1800 5 10 0 1 0 0 1
value=LM339PWR
T 13800 1800 5 10 0 1 0 0 1
lcsc=C42184
2022-04-12 15:48:55 +02:00
}
C 12500 3600 1 0 0 VCC.sym
C 8500 3600 1 0 0 VCC.sym
C 8600 1600 1 0 0 GND.sym
C 12600 1600 1 0 0 GND.sym
N 7600 2800 6800 2800 4
{
T 7600 2800 5 10 1 1 0 6 1
netname=VREF
}
N 7600 2600 6800 2600 4
{
T 7600 2600 5 10 1 1 0 6 1
netname=VOVER1
}
C 11200 2500 1 0 0 LED0603.sym
{
T 11200 2500 5 8 0 0 0 0 1
footprint=LEDC1608X90N.lht
T 11400 2860 5 10 1 1 0 3 1
refdes=D3
T 11400 2540 5 10 0 1 0 5 1
device=LED0603
T 11300 2400 5 10 1 1 0 0 1
value=red
}
2022-04-13 17:17:39 +02:00
C 10700 3900 1 270 0 resistor-1.sym
2022-04-12 15:48:55 +02:00
{
2022-04-13 17:17:39 +02:00
T 11100 3600 5 10 0 0 270 0 1
2022-04-12 15:48:55 +02:00
device=RESISTOR
2022-04-13 17:17:39 +02:00
T 10600 3500 5 10 1 1 0 6 1
2022-04-12 15:48:55 +02:00
refdes=R7
2022-04-13 17:17:39 +02:00
T 10600 3200 5 10 1 1 0 6 1
2022-04-12 15:48:55 +02:00
value=2k
2022-04-13 17:17:39 +02:00
T 11200 3700 5 10 0 1 270 0 1
2022-04-12 15:48:55 +02:00
footprint=UC1608X55N.lht
2022-04-13 17:17:39 +02:00
T 10700 3900 5 10 0 1 0 0 1
2022-04-12 15:48:55 +02:00
description=resistor, chip, 0603 (metric 1608), 1%
}
2022-04-13 17:17:39 +02:00
N 10800 3000 10800 2700 4
N 10200 2700 11200 2700 4
N 10800 3900 10800 4500 4
2022-04-12 15:48:55 +02:00
{
2022-04-13 17:17:39 +02:00
T 10800 4000 5 10 1 1 90 0 1
2022-04-12 15:48:55 +02:00
netname=VREF
}
N 13800 2800 14600 2800 4
{
T 13800 2800 5 10 1 1 0 0 1
netname=VREF
}
N 13800 2600 14600 2600 4
{
T 13800 2600 5 10 1 1 0 0 1
netname=VOVER2
}
T 10100 1900 9 10 1 0 0 0 2
over-voltage
indication
2022-04-14 13:22:11 +02:00
N 800 300 100 300 4
{
T 800 300 5 10 1 1 0 6 1
netname=VBUS2
}
C 600 600 1 270 0 GND.sym
N 800 2100 100 2100 4
{
T 800 2100 5 10 1 1 0 6 1
netname=VBUS1
}
C 600 2000 1 270 0 GND.sym
C 600 1600 1 270 0 GND.sym
C 600 1000 1 270 0 GND.sym