replace Makefile with Rakefile
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# base name of schematic/layout
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TARGET=usb_cable_tester
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# path to qEDA
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QEDA=../qeda/bin/qeda
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# path to elements
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ELEMENTS=library/ic_mcu_st_stm32f103xc.yaml
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ELEMENTS+=library/connector_usb-a-3.0_fci_10117835.yaml
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ELEMENTS+=library/connector_usb-b-3.0_amphenol_gsb4211.yaml
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ELEMENTS+=library/connector_usb-mini-b_edac_690-005-299-043.yaml
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ELEMENTS+=library/connector_usb-micro-b-3.0_gct_usb3110.yaml
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ELEMENTS+=library/connector_usb-micro-b-2.0_ali_32910334970.yaml
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ELEMENTS+=library/connector_usb-c_hro_type-c-31-m-04.yaml
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ELEMENTS+=library/connector_lightning_iphone5.yaml
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ELEMENTS+=library/vreg_ldo_torex_xc6206.yaml
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ELEMENTS+=library/connector_battery_18650.yaml
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ELEMENTS+=library/display_lcd_lcm1602.yaml
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ELEMENTS+=library/display_lcd_i2cadapter.yaml
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ELEMENTS+=library/display_oled_0.96in.yaml
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ELEMENTS+=library/vreg_pmic_tpower_tp4056.yaml
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ELEMENTS+=library/transistor_pmos_nxp_bss84.yaml
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ELEMENTS+=library/mechanical_button_6mm.yaml
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ELEMENTS+=library/connector_xh-2.54-2p.yaml
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netlist: $(TARGET).tdx
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schematic: $(TARGET).ar.sch $(TARGET).sch.pdf
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board: $(TARGET).brd-top.png $(TARGET).brd-bottom.png $(TARGET).brd.ps $(TARGET).brd.zip
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#export netlist from schematic
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%.tdx: %.sch
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lepton-netlist -g tEDAx -o $@ $<
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# export schematic as pdf
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%.sch.pdf: %.sch
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# export schematic
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lepton-cli export --color --paper iso_a4 --layout landscape --color --output $@ $<
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# rotate as it should be
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pdftk $@ rotate 1-endleft output $@.tmp
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mv $@.tmp $@
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# create archive schematic
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%.ar.sch: %.sch
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cp $< $@
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lepton-embed --embed $@
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# export board as photorealistic preview (top side)
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%.brd-top.png: %.lht
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pcb-rnd -x png --dpi 1200 --photo-mode --outfile $@ $<
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# export board as photorealistic preview (bottom side)
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%.brd-bottom.png: %.lht
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pcb-rnd -x png --dpi 1200 --photo-mode --photo-flip-y --outfile $@ $<
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# export gerber from board (JLC_PCB naming style)
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$(TARGET).brd.zip: $(TARGET).lht
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pcb-rnd -x cam gerber:JLC_PCB --outfile $(TARGET).brd $<
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zip $@ $(TARGET).brd.asb $(TARGET).brd.ast $(TARGET).brd.gbl $(TARGET).brd.gbo $(TARGET).brd.gbp $(TARGET).brd.gbs $(TARGET).brd.gko $(TARGET).brd.gtl $(TARGET).brd.gto $(TARGET).brd.gtp $(TARGET).brd.gts $(TARGET).brd.xln
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# export all layers of the board in as ps document
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%.brd.ps: %.lht
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pcb-rnd -x ps --psfile $@ $<
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# generate symbols and footprints from part definitions
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geda/symbols/lib/ coraleda/subc/lib lib: library ${ELEMENTS}
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# reset
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$(QEDA) reset
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# configure
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$(QEDA) config pattern.preferManufacturer false
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$(QEDA) config pattern.densityLevel M
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$(QEDA) config pattern.smoothPadCorners true
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# add local files
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$(QEDA) add ic_mcu_st_stm32f103xc@LQFP144
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$(QEDA) add connector_usb-a-3.0_fci_10117835
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$(QEDA) add connector_usb-b-3.0_amphenol_gsb4211
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$(QEDA) add connector_usb-mini-b_edac_690-005-299-043
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$(QEDA) add connector_usb-micro-b-3.0_gct_usb3110
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$(QEDA) add connector_usb-micro-b-2.0_ali_32910334970
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$(QEDA) add connector_usb-c_hro_type-c-31-m-04
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$(QEDA) add connector_lightning_iphone5
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$(QEDA) add vreg_ldo_torex_xc6206
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$(QEDA) add connector_battery_18650
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$(QEDA) add display_lcd_lcm1602
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$(QEDA) add display_lcd_i2cadapter
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$(QEDA) add display_oled_0.96in
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$(QEDA) add vreg_pmic_tpower_tp4056
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$(QEDA) add transistor_pmos_nxp_bss84
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$(QEDA) add mechanical_button_6mm
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$(QEDA) add connector_XH-2.54-2P
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# from github library
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$(QEDA) add ecs/csm-7
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$(QEDA) add capacitor/c0603
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$(QEDA) add resistor/r0603
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$(QEDA) add diode/led0603
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# generate outputs
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$(QEDA) config output geda
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$(QEDA) generate .
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$(QEDA) config output coraleda
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$(QEDA) generate .
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clean:
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rm $(TARGET).brd-top.png $(TARGET).brd-bottom.png $(TARGET).brd.ps $(TARGET).brd.asb $(TARGET).brd.ast $(TARGET).brd.gbl $(TARGET).brd.gbo $(TARGET).brd.gbp $(TARGET).brd.gbs $(TARGET).brd.gko $(TARGET).brd.gtl $(TARGET).brd.gto $(TARGET).brd.gtp $(TARGET).brd.gts $(TARGET).brd.xln
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dist-clean: clean
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rm $(TARGET).tdx $(TARGET).sch.pdf $(TARGET).brd.zip
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@ -41,7 +41,7 @@ here the number of USB signals required (including 3.0 data lines, shield and in
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- total USB: 105
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- MCU USB: 2 (to flash and get detailed report/advanced testing)
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- SWD: 2 (to flash and debug the MCU)
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- I2C: 2 (to display the cable test result)
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- I²C: 2 (to display the cable test result)
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- display control: 1 (to power off display at the end)
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- total: 112
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@ -93,6 +93,16 @@ the switch next to the USB port is used to select which power source to use to p
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it also allows to completely disconnect the battery from the circuit, by selecting the USB port as power input, preventing even the tiny stand-by current draw.
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the USB cable tester will shut down after 5 minutes to save battery.
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requirements
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============
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to be able to generate the outputs you need following software:
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- rake: the central script taking care of generating the output files (Makefile is too cumbersome to parse files)
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- [QEDA](http://qeda.org/): to generate footprints for the parts
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- [QEDA library](https://doc.qeda.org/library/): for the schematic capture
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- [pcb-rnd](http://repo.hu/projects/pcb-rnd/): for the board layout
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the output generation is automatized.
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schematic
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=========
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@ -117,7 +127,7 @@ sudo npm install --global
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to generate the parts:
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~~~
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make lib
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rake library
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~~~
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this will use the parts definition (.yaml files) in the `library` to generate [gEDA gschem](http://wiki.geda-project.org/geda:gaf)/[Lepton EDA](https://github.com/lepton-eda/lepton-eda) symbols (.sym files) in the `geda/symbols` folder, and [coralEDA pcb-rnd](http://repo.hu/projects/pcb-rnd/) footprints (.lht files) in the `coraleda/subc` folder.
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@ -137,12 +147,12 @@ all other symbols are generated by QEDA as described above.
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to export the netlist (in tEDAx format):
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~~~
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make netlist
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rake netlist
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~~~
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to export archive (with symbols included in schematic) and pdf:
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~~~
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make schematic
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rake print
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~~~
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board
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@ -156,9 +166,9 @@ it uses the symbols from the `coraleda/subc/` folder.
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it been generated from https://oshwlogo.cuvoodoo.info/.
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all other symbols are generated by QEDA as described above.
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to export gerber file for PCB manufacturer (and photo preview + overview document):
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to export gerber files for PCB manufacturer (and photo preview + overview document):
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~~~
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make board
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rake fabrication
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~~~
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fabrication
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136
hardware/Rakefile
Normal file
136
hardware/Rakefile
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# encoding: utf-8
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# ruby: 2.1.0
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=begin
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Rakefile to manage hardware projects
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uses Lepton EDA for schematic and pcb-rnd for board layouts.
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Rakefile instead of Makefile for better text file parsing capabilities.
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=end
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require 'rake/clean'
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# =================
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# project variables
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# =================
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# common name used for file names
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name = "usb_cable_tester"
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# local QEDA parts
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parts_local = []
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parts_local << "ic_mcu_st_stm32f103xc@LQFP144"
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parts_local << "connector_usb-a-3.0_fci_10117835"
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parts_local << "connector_usb-b-3.0_amphenol_gsb4211"
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parts_local << "connector_usb-mini-b_edac_690-005-299-043"
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parts_local << "connector_usb-micro-b-3.0_gct_usb3110"
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parts_local << "connector_usb-micro-b-2.0_ali_32910334970"
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parts_local << "connector_usb-c_hro_type-c-31-m-04"
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parts_local << "connector_lightning_iphone5"
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parts_local << "vreg_ldo_torex_xc6206"
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parts_local << "connector_battery_18650"
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parts_local << "display_lcd_lcm1602"
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parts_local << "display_lcd_i2cadapter"
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parts_local << "display_oled_0.96in"
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parts_local << "vreg_pmic_tpower_tp4056"
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parts_local << "transistor_pmos_nxp_bss84"
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parts_local << "mechanical_button_6mm"
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parts_local << "connector_XH-2.54-2P"
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# the corresponding files
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library = parts_local.collect {|part| "library/#{part.split('@')[0].downcase}.yaml"}
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# github QEDA parts
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parts_github = []
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parts_github << "ecs/csm-7"
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parts_github << "capacitor/c0603"
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parts_github << "resistor/r0603"
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parts_github << "diode/led0603"
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# path to qeda"
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qeda = "../qeda/bin/qeda"
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# ==========
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# main tasks
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# ==========
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desc "main building task"
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task :default => [:print, :fabrication]
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desc "print schematic and layout (as pdf)"
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prints = [ "#{name}.sch.pdf", "#{name}.brd.ps", "#{name}.brd-top.png", "#{name}.brd-bottom.png" ]
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task :print => prints
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CLOBBER.include(prints)
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desc "generate fabrication gerbers (as archive)"
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gerbers = [ "#{name}.brd.asb", "#{name}.brd.ast", "#{name}.brd.gbl", "#{name}.brd.gbo", "#{name}.brd.gbp", "#{name}.brd.gbs", "#{name}.brd.gko", "#{name}.brd.gtl", "#{name}.brd.gto", "#{name}.brd.gtp", "#{name}.brd.gts", "#{name}.brd.xln" ]
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fab = [ "#{name}.brd.zip" ]
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task :fabrication => fab
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CLEAN.include(gerbers)
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CLOBBER.include(fab)
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desc "generate footprints from parts"
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task :library => library do
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# reset
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sh "#{qeda} reset"
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# configure
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sh "#{qeda} config pattern.preferManufacturer false"
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sh "#{qeda} config pattern.densityLevel M"
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sh "#{qeda} config pattern.smoothPadCorners true"
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# add local files
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parts_local.each do |part|
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sh "#{qeda} add #{part}"
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end
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# from github library
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parts_github.each do |part|
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sh "#{qeda} add #{part}"
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end
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# generate outputs
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sh "#{qeda} config output geda"
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sh "#{qeda} generate ."
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sh "#{qeda} config output coraleda"
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sh "#{qeda} generate ."
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end
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desc "export netlist from schematic"
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net = [ "#{name}.tdx" ]
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task :netlist => net
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CLOBBER.include(net)
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# ===============
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# file generation
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# ===============
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desc "generate printable version (PDF) of schematic"
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rule ".sch.pdf" => ".standalone.sch" do |t|
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sh "lepton-cli export --color --paper iso_a4 --layout landscape --color --output #{t.name} #{t.source} 2> /dev/null"
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end
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desc "generate printable version (PostScript) of board layout"
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rule ".brd.ps" => ".lht" do |t|
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sh "pcb-rnd -x ps --psfile #{t.name} #{t.source} 2> /dev/null"
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end
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desc "generate photo realistic picture from layout (top side)"
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rule ".brd-top.png" => ".lht" do |t|
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sh "pcb-rnd -x png --dpi 1200 --photo-mode --outfile #{t.name} #{t.source} 2> /dev/null"
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end
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desc "generate photo realistic picture from layout (bottom side)"
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rule ".brd-bottom.png" => ".lht" do |t|
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sh "pcb-rnd -x png --dpi 1200 --photo-mode --photo-flip-y --outfile #{t.name} #{t.source} 2> /dev/null"
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end
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desc "generate schematic with all symbols embedded"
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rule ".standalone.sch" => ".sch" do |t|
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sh "cp #{t.source} #{t.name}"
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sh "lepton-embed --embed #{t.name} 2> /dev/null"
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end
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desc "archive gerbers"
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rule ".brd.zip" => ".lht" do |t|
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base = File.basename(t.source, ".lht")
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sh "pcb-rnd -x cam gerber:JLC_PCB --outfile #{base}.brd #{t.source} 2> /dev/null"
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gerbers = [ "#{base}.brd.asb", "#{base}.brd.ast", "#{base}.brd.gbl", "#{base}.brd.gbo", "#{base}.brd.gbp", "#{base}.brd.gbs", "#{base}.brd.gko", "#{base}.brd.gtl", "#{base}.brd.gto", "#{base}.brd.gtp", "#{base}.brd.gts", "#{base}.brd.xln" ]
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fab = [ "#{name}.brd.zip" ]
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sh "zip --quiet #{t.name} #{gerbers.join(' ')}"
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end
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desc "export netlist from schematic"
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rule ".tdx" => ".sch" do |t|
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sh "lepton-netlist -g tEDAx -o #{t.name} #{t.source} 2> /dev/null"
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end
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