i2c_master: sleep to reduce erronous pulse, and use interrupts to wake up
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2e19d95dc1
commit
5325deaf59
29
i2c_master.c
29
i2c_master.c
@ -99,6 +99,7 @@ enum i2c_master_rc i2c_master_start(void)
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I2C_SR2 = 0; // clear error flags
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timeout = TIMEOUT; // start timeout count
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rim(); // enable interrupts
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while ((I2C_CR2 & I2C_CR2_START) || !(I2C_SR1 & I2C_SR1_SB) || !(I2C_SR3 & I2C_SR3_MSL)) { // wait until start condition has been accepted, send, and we are in aster mode
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if (0 == timeout--) {
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return I2C_MASTER_RC_TIMEOUT;
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@ -109,6 +110,8 @@ enum i2c_master_rc i2c_master_start(void)
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if (I2C_CR2 & I2C_CR2_STOP) {
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return I2C_MASTER_RC_TIMEOUT;
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}
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I2C_ITR = (I2C_ITR_ITEVTEN | I2C_ITR_ITERREN); // enable I²C interrupts
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wfi(); // got to sleep to prevent EMI causing glitches
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}
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return I2C_MASTER_RC_NONE;
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@ -121,6 +124,7 @@ static enum i2c_master_rc i2c_master_wait_stop(void)
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{
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I2C_SR2 = 0; // clear error flags
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timeout = TIMEOUT; // start timeout counter
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rim(); // enable interrupts
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while (I2C_CR2 & I2C_CR2_STOP) { // wait until stop condition is accepted and cleared
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if (0 == timeout--) {
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return I2C_MASTER_RC_TIMEOUT;
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@ -128,6 +132,8 @@ static enum i2c_master_rc i2c_master_wait_stop(void)
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if (I2C_SR2 & (I2C_SR2_BERR | I2C_SR2_ARLO)) {
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return I2C_MASTER_RC_BUS_ERROR;
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}
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I2C_ITR = (I2C_ITR_ITEVTEN | I2C_ITR_ITERREN); // enable I²C interrupts
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wfi(); // got to sleep to prevent EMI causing glitches
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}
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// this time we can't use I2C_CR2_STOP to check for timeout
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if (I2C_SR3 & I2C_SR3_MSL) { // ensure we are not in master mode anymore
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@ -177,6 +183,7 @@ enum i2c_master_rc i2c_master_select_slave(uint16_t slave, bool address_10bit, b
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I2C_DR = (slave << 1) | (write ? 0 : 1); // select slave, with read/write flag
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I2C_SR2 = 0; // clear error flags
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timeout = TIMEOUT; // start timeout counter
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rim(); // enable interrupts
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while (!(I2C_SR1 & I2C_SR1_ADDR)) { // wait until address is transmitted (or error)
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if (0 == timeout--) {
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return I2C_MASTER_RC_TIMEOUT;
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@ -190,12 +197,15 @@ enum i2c_master_rc i2c_master_select_slave(uint16_t slave, bool address_10bit, b
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if (I2C_SR2 & I2C_SR2_AF) { // address has not been acknowledged
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return I2C_MASTER_RC_NAK;
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}
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I2C_ITR = (I2C_ITR_ITEVTEN | I2C_ITR_ITERREN); // enable relevant I²C interrupts
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wfi(); // got to sleep to prevent EMI causing glitches
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}
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} else { // 10-bit address
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// send first part of address
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I2C_DR = 11110000 | (((slave >> 8 ) & 0x3) << 1); // send first header (11110xx0, where xx are 2 MSb of slave address)
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I2C_SR2 = 0; // clear error flags
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timeout = TIMEOUT; // start timeout counter
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rim(); // enable interrupts
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while (!(I2C_SR1 & I2C_SR1_ADD10)) { // wait until address is transmitted (or error)
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if (0 == timeout--) {
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return I2C_MASTER_RC_TIMEOUT;
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@ -209,12 +219,15 @@ enum i2c_master_rc i2c_master_select_slave(uint16_t slave, bool address_10bit, b
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if (I2C_SR2 & I2C_SR2_AF) { // address has not been acknowledged
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return I2C_MASTER_RC_NAK;
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}
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I2C_ITR = (I2C_ITR_ITEVTEN | I2C_ITR_ITERREN); // enable relevant I²C interrupts
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wfi(); // got to sleep to prevent EMI causing glitches
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}
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// send second part of address
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I2C_SR2 &= ~(I2C_SR2_AF); // clear acknowledgement failure
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I2C_DR = (slave & 0xff); // send remaining of address
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I2C_SR2 = 0; // clear error flags
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timeout = TIMEOUT; // start timeout counter
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rim(); // enable interrupts
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while (!(I2C_SR1 & I2C_SR1_ADDR)) { // wait until address is transmitted (or error)
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if (0 == timeout--) {
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return I2C_MASTER_RC_TIMEOUT;
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@ -228,6 +241,8 @@ enum i2c_master_rc i2c_master_select_slave(uint16_t slave, bool address_10bit, b
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if (I2C_SR2 & I2C_SR2_AF) { // address has not been acknowledged
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return I2C_MASTER_RC_NAK;
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}
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I2C_ITR = (I2C_ITR_ITEVTEN | I2C_ITR_ITERREN); // enable relevant I²C interrupts
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wfi(); // got to sleep to prevent EMI causing glitches
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}
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// go into receive mode if necessary
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if (!write) {
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@ -253,6 +268,8 @@ enum i2c_master_rc i2c_master_select_slave(uint16_t slave, bool address_10bit, b
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if (I2C_SR2 & I2C_SR2_AF) { // address has not been acknowledged
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return I2C_MASTER_RC_NAK;
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}
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I2C_ITR = (I2C_ITR_ITEVTEN | I2C_ITR_ITERREN); // enable relevant I²C interrupts
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wfi(); // got to sleep to prevent EMI causing glitches
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}
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}
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}
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@ -283,6 +300,7 @@ enum i2c_master_rc i2c_master_read(uint8_t* data, uint16_t data_size)
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// read data
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I2C_CR2 |= I2C_CR2_ACK; // enable ACK by default
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I2C_SR2 = 0; // clear error flags
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rim(); // enable interrupts
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for (uint16_t i = 0; i < data_size; i++) { // read bytes
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IWDG->KR.fields.KEY = IWDG_KR_KEY_REFRESH; // reset watchdog
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// set (N)ACK (EV6_3, EV6_1)
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@ -291,6 +309,7 @@ enum i2c_master_rc i2c_master_read(uint8_t* data, uint16_t data_size)
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I2C_CR2 |= I2C_CR2_STOP; // prepare to send the stop
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}
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timeout = TIMEOUT; // start timeout counter
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rim(); // enable interrupts
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while (!(I2C_SR1 & I2C_SR1_RXNE)) { // wait until data is received (or error)
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if (0 == timeout--) {
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return I2C_MASTER_RC_TIMEOUT;
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@ -298,6 +317,8 @@ enum i2c_master_rc i2c_master_read(uint8_t* data, uint16_t data_size)
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if (I2C_SR2 & (I2C_SR2_BERR | I2C_SR2_ARLO)) {
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return I2C_MASTER_RC_BUS_ERROR;
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}
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I2C_ITR = (I2C_ITR_ITBUFEN | I2C_ITR_ITEVTEN | I2C_ITR_ITERREN); // enable all I²C interrupts
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wfi(); // got to sleep to prevent EMI causing glitches
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}
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data[i] = I2C_DR; // read the received byte
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}
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@ -325,6 +346,7 @@ enum i2c_master_rc i2c_master_write(const uint8_t* data, uint16_t data_size)
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I2C_DR = data[i]; // send byte
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I2C_SR2 = 0; // clear error flags
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timeout = TIMEOUT; // start timeout counter
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rim(); // enable interrupts
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while (!(I2C_SR1 & I2C_SR1_TXE)) { // wait until byte has been transmitted
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IWDG->KR.fields.KEY = IWDG_KR_KEY_REFRESH; // reset watchdog
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if (0 == timeout--) {
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@ -339,6 +361,8 @@ enum i2c_master_rc i2c_master_write(const uint8_t* data, uint16_t data_size)
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if (I2C_SR2 & I2C_SR2_AF) { // data has not been acknowledged
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return I2C_MASTER_RC_NAK;
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}
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I2C_ITR = (I2C_ITR_ITBUFEN | I2C_ITR_ITEVTEN | I2C_ITR_ITERREN); // enable all I²C interrupts
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wfi(); // got to sleep to prevent EMI causing glitches
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}
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}
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@ -486,3 +510,8 @@ enum i2c_master_rc i2c_master_address_write(uint16_t slave, bool address_10bit,
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error:
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return rc;
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}
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void i2c_master_isr(void) __interrupt(IRQ_I2C) // I²C event or error happened
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{
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I2C_ITR = 0; // disable all interrupt sources to stop looping in ISR and let current loop check the right status flags
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}
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@ -109,4 +109,8 @@ enum i2c_master_rc i2c_master_address_read(uint16_t slave, bool address_10bit, c
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* @note start and stop conditions are included
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*/
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enum i2c_master_rc i2c_master_address_write(uint16_t slave, bool address_10bit, const uint8_t* address, uint16_t address_size, const uint8_t* data, uint16_t data_size);
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/** interrupt service routine used to wake up
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* @note not sure why the declaration need to be in main for it to work
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*/
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void i2c_master_isr(void) __interrupt(IRQ_I2C);
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