415 lines
25 KiB
C
415 lines
25 KiB
C
/* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*
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*/
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/** library to control up to 4 independent receive and transmit software UART ports (code)
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* @file uart_soft.c
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* @author King Kévin <kingkevin@cuvoodoo.info>
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* @date 2016
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* @note peripherals used: GPIO @ref uart_soft_gpio, timer @ref uart_soft_timer
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*/
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/* standard libraries */
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#include <stdint.h> // standard integer types
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#include <stdlib.h> // general utilities
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/* STM32 (including CM3) libraries */
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#include <libopencm3/stm32/rcc.h> // real-time control clock library
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#include <libopencm3/stm32/gpio.h> // general purpose input output library
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#include <libopencm3/stm32/timer.h> // timer library
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#include <libopencm3/cm3/nvic.h> // interrupt handler
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#include <libopencm3/stm32/exti.h> // external interrupt defines
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#include <libopencmsis/core_cm3.h> // Cortex M3 utilities
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#include "uart_soft.h" // software UART library API
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#include "global.h" // common methods
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/** @defgroup uart_soft_gpio GPIO used for the software 4 UART ports
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* @note comment if unused
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* @warning only one port must be used per line (pin number)
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* @{
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*/
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#define UART_SOFT_RX_PORT0 B /**< port for receive signal for UART port 0 */
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#define UART_SOFT_RX_PIN0 9 /**< pin for receive signal for UART port 0 */
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//#define UART_SOFT_RX_PORT1 A /**< port for receive signal for UART port 0 */
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//#define UART_SOFT_RX_PIN1 0 /**< pin for receive signal for UART port 0 */
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//#define UART_SOFT_RX_PORT2 A /**< port for receive signal for UART port 0 */
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//#define UART_SOFT_RX_PIN2 0 /**< pin for receive signal for UART port 0 */
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//#define UART_SOFT_RX_PORT3 A /**< port for receive signal for UART port 0 */
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//#define UART_SOFT_RX_PIN3 0 /**< pin for receive signal for UART port 0 */
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#define UART_SOFT_TX_PORT0 B /**< port for transmit signal for UART port 0 */
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#define UART_SOFT_TX_PIN0 8 /**< pin for transmit signal for UART port 0 */
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//#define UART_SOFT_TX_PORT1 A /**< port for transmit signal for UART port 0 */
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//#define UART_SOFT_TX_PIN1 0 /**< pin for transmit signal for UART port 0 */
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//#define UART_SOFT_TX_PORT2 A /**< port for transmit signal for UART port 0 */
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//#define UART_SOFT_TX_PIN2 0 /**< pin for transmit signal for UART port 0 */
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//#define UART_SOFT_TX_PORT3 A /**< port for transmit signal for UART port 0 */
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//#define UART_SOFT_TX_PIN3 0 /**< pin for transmit signal for UART port 0 */
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/** @} */
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/** buffer size for receive and transmit buffers */
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#define UART_SOFT_BUFFER 128
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/** UART receive state definition */
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struct soft_uart_rx_state {
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uint32_t port; /**< UART receive port */
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uint16_t pin; /**< UART receive pin */
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uint32_t rcc; /**< UART receive port peripheral clock */
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uint32_t exti; /**< UART receive external interrupt */
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uint32_t irq; /**< UART receive interrupt request */
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uint32_t baudrate; /**< UART receive baud rate */
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volatile uint16_t state; /**< GPIO state for receive pin */
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volatile uint8_t bit; /**< next UART frame bit to receive */
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volatile uint8_t byte; /**< byte being received */
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volatile uint8_t buffer[UART_SOFT_BUFFER]; /**< receive buffer */
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volatile uint8_t buffer_i; /**< index of current data to be read out */
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volatile uint8_t buffer_used; /**< how much data is available */
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volatile bool lock; /**< put lock when changing buffer_i or buffer_used */
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volatile uint8_t buffer_byte; /**< to temporary store byte while locked */
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volatile bool buffer_byte_used; /**< signal a byte has been stored in temporary buffer */
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};
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/** UART transmit state definition */
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struct soft_uart_tx_state {
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uint32_t port; /**< UART receive port */
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uint16_t pin; /**< UART receive pin */
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uint32_t rcc; /**< UART receive port peripheral clock */
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uint32_t baudrate; /**< UART receive baud rate */
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volatile uint8_t bit; /**< next UART frame bit to transmit */
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volatile uint8_t byte; /**< byte being transmitted */
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volatile uint8_t buffer[UART_SOFT_BUFFER]; /**< receive buffer */
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volatile uint8_t buffer_i; /**< index of current data to be read out */
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volatile uint8_t buffer_used; /**< how much data is available */
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volatile bool transmit; /**< flag to know it transmission is ongoing */
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};
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static struct soft_uart_rx_state* uart_soft_rx_states[4] = {NULL}; /**< states of UART receive ports (up to 4) */
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static struct soft_uart_tx_state* uart_soft_tx_states[4] = {NULL}; /**< states of UART transmit ports (up to 4) */
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volatile bool uart_soft_received[4] = {false, false, false, false};
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/** @defgroup uart_soft_timer timer used to sample UART signals
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* @{
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*/
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#if (defined(UART_SOFT_RX_PORT0) && defined(UART_SOFT_RX_PIN0)) || (defined(UART_SOFT_RX_PORT1) && defined(UART_SOFT_RX_PIN1)) || (defined(UART_SOFT_RX_PORT2) && defined(UART_SOFT_RX_PIN2)) || (defined(UART_SOFT_RX_PORT3) && defined(UART_SOFT_RX_PIN0))
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#define UART_SOFT_RX_TIMER 3 /**< timer peripheral for receive signals */
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#endif
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#if (defined(UART_SOFT_TX_PORT0) && defined(UART_SOFT_TX_PIN0)) || (defined(UART_SOFT_TX_PORT1) && defined(UART_SOFT_TX_PIN1)) || (defined(UART_SOFT_TX_PORT2) && defined(UART_SOFT_TX_PIN2)) || (defined(UART_SOFT_TX_PORT3) && defined(UART_SOFT_TX_PIN0))
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#define UART_SOFT_TX_TIMER 4 /**< timer peripheral for transmit signals */
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#endif
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/** @} */
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static const uint32_t timer_flags[4] = {TIM_SR_CC1IF,TIM_SR_CC2IF,TIM_SR_CC3IF,TIM_SR_CC4IF}; /**< the interrupt flags for the compare units */
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static const uint32_t timer_interrupt[4] = {TIM_DIER_CC1IE,TIM_DIER_CC2IE,TIM_DIER_CC3IE,TIM_DIER_CC4IE}; /**< the interrupt enable for the compare units */
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static const enum tim_oc_id timer_oc[4] = {TIM_OC1,TIM_OC2,TIM_OC3,TIM_OC4}; /**< the output compares for the compare units */
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bool uart_soft_setup(uint32_t *rx_baudrates, uint32_t *tx_baudrates)
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{
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(void)rx_baudrates; // ensure compile does no complain even if no receive port is used
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(void)tx_baudrates; // ensure compile does no complain even if no transmit port is used
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// save UART receive definition
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#if defined(UART_SOFT_RX_PORT0) && defined(UART_SOFT_RX_PIN0)
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uart_soft_rx_states[0] = calloc(1,sizeof(struct soft_uart_rx_state)); // create state definition
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uart_soft_rx_states[0]->port = GPIO(UART_SOFT_RX_PORT0); // save receive port
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uart_soft_rx_states[0]->pin = GPIO(UART_SOFT_RX_PIN0); // save receive pin
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uart_soft_rx_states[0]->rcc = RCC_GPIO(UART_SOFT_RX_PORT0); // save receive port peripheral clock
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uart_soft_rx_states[0]->exti = EXTI(UART_SOFT_RX_PIN0); // save receive external interrupt
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uart_soft_rx_states[0]->irq = NVIC_EXTI_IRQ(UART_SOFT_RX_PIN0); // save receive interrupt request
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#endif
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// setup UART receive GPIO
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for (uint8_t rx=0; rx<4; rx++) {
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if (!uart_soft_rx_states[rx]) { // verify is receive UART is defined
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continue; // skip configuration if not defined
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}
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if (!rx_baudrates || rx_baudrates[rx]==0) { // verify if receive baud rate has been defined
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return false;
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}
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uart_soft_rx_states[rx]->baudrate = rx_baudrates[rx]; // save baud rate
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rcc_periph_clock_enable(uart_soft_rx_states[rx]->rcc); // enable clock for GPIO peripheral
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gpio_set_mode(uart_soft_rx_states[rx]->port, GPIO_MODE_INPUT, GPIO_CNF_INPUT_PULL_UPDOWN, uart_soft_rx_states[rx]->pin); // setup GPIO pin UART receive
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gpio_set(uart_soft_rx_states[rx]->port, uart_soft_rx_states[rx]->pin); // pull up to avoid noise when not connected
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rcc_periph_clock_enable(RCC_AFIO); // enable alternate function clock for external interrupt
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exti_select_source(uart_soft_rx_states[rx]->exti, uart_soft_rx_states[rx]->port); // mask external interrupt of this pin only for this port
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exti_enable_request(uart_soft_rx_states[rx]->exti); // enable external interrupt
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exti_set_trigger(uart_soft_rx_states[rx]->exti, EXTI_TRIGGER_BOTH); // trigger when button is pressed
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nvic_enable_irq(uart_soft_rx_states[rx]->irq); // enable interrupt
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uart_soft_rx_states[rx]->state = gpio_get(uart_soft_rx_states[rx]->port, uart_soft_rx_states[rx]->pin); // save state of GPIO
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uart_soft_rx_states[rx]->bit = 0; // reset bits received
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}
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// save UART transmit definition
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#if defined(UART_SOFT_TX_PORT0) && defined(UART_SOFT_TX_PIN0)
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uart_soft_tx_states[0] = calloc(1,sizeof(struct soft_uart_tx_state)); // create state definition
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uart_soft_tx_states[0]->port = GPIO(UART_SOFT_TX_PORT0); // save receive port
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uart_soft_tx_states[0]->pin = GPIO(UART_SOFT_TX_PIN0); // save receive pin
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uart_soft_tx_states[0]->rcc = RCC_GPIO(UART_SOFT_TX_PORT0); // save receive port peripheral clock
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#endif
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// setup UART transmit GPIO
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for (uint8_t tx=0; tx<4; tx++) {
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if (!uart_soft_tx_states[tx]) { // verify is transmit UART is defined
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continue; // skip configuration if not defined
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}
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if (!tx_baudrates || tx_baudrates[tx]==0) { // verify if transmit baud rate has been defined
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return false;
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}
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uart_soft_tx_states[tx]->baudrate = tx_baudrates[tx]; // save baud rate
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rcc_periph_clock_enable(uart_soft_tx_states[tx]->rcc); // enable clock for GPIO peripheral
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gpio_set_mode(uart_soft_tx_states[tx]->port, GPIO_MODE_OUTPUT_2_MHZ, GPIO_CNF_OUTPUT_PUSHPULL, uart_soft_tx_states[tx]->pin); // setup GPIO UART transmit pin
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gpio_set(uart_soft_tx_states[tx]->port, uart_soft_tx_states[tx]->pin); // idle high
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}
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// setup timer
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#if defined(UART_SOFT_RX_TIMER)
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rcc_periph_clock_enable(RCC_TIM(UART_SOFT_RX_TIMER)); // enable clock for timer peripheral
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timer_reset(TIM(UART_SOFT_RX_TIMER)); // reset timer state
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timer_set_mode(TIM(UART_SOFT_RX_TIMER), TIM_CR1_CKD_CK_INT, TIM_CR1_CMS_EDGE, TIM_CR1_DIR_UP); // set timer mode, use undivided timer clock, edge alignment (simple count), and count up
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timer_set_prescaler(TIM(UART_SOFT_RX_TIMER), 0); // prescaler to be able to sample 2400-115200 bps (72MHz/2^16=1099<2400bps)
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nvic_enable_irq(NVIC_TIM_IRQ(UART_SOFT_RX_TIMER)); // allow interrupt for timer
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timer_enable_counter(TIM(UART_SOFT_RX_TIMER)); // start timer to generate interrupts for the receive pins
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#endif
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#if defined(UART_SOFT_TX_TIMER)
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rcc_periph_clock_enable(RCC_TIM(UART_SOFT_TX_TIMER)); // enable clock for timer peripheral
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timer_reset(TIM(UART_SOFT_TX_TIMER)); // reset timer state
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timer_set_mode(TIM(UART_SOFT_TX_TIMER), TIM_CR1_CKD_CK_INT, TIM_CR1_CMS_EDGE, TIM_CR1_DIR_UP); // set timer mode, use undivided timer clock, edge alignment (simple count), and count up
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timer_set_prescaler(TIM(UART_SOFT_TX_TIMER), 0); // prescaler to be able to output 2400-115200 bps (72MHz/2^16=1099<2400bps)
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nvic_enable_irq(NVIC_TIM_IRQ(UART_SOFT_TX_TIMER)); // allow interrupt for timer
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timer_enable_counter(TIM(UART_SOFT_TX_TIMER)); // start timer to generate interrupts for the transmit pins
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#endif
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return true; // setup completed
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}
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#if defined(UART_SOFT_RX_TIMER)
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uint8_t uart_soft_getbyte(uint8_t uart)
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{
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if (uart>=4 || !uart_soft_rx_states[uart]) { // ensure receive UART port is defined
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return 0; // return
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}
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while (!uart_soft_rx_states[uart]->buffer_used) { // idle until data is available
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__WFI(); // sleep until interrupt
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}
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uart_soft_rx_states[uart]->lock = true; // set lock
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uint8_t to_return = uart_soft_rx_states[uart]->buffer[uart_soft_rx_states[uart]->buffer_i]; // get the next available character
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uart_soft_rx_states[uart]->buffer_i = (uart_soft_rx_states[uart]->buffer_i+1)%LENGTH(uart_soft_rx_states[uart]->buffer); // update used buffer
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uart_soft_rx_states[uart]->buffer_used--; // update used buffer
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uart_soft_rx_states[uart]->lock = false; // free lock
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if (uart_soft_rx_states[uart]->buffer_byte_used) { // temporary byte has been stored
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uart_soft_rx_states[uart]->buffer[(uart_soft_rx_states[uart]->buffer_i+uart_soft_rx_states[uart]->buffer_used)%LENGTH(uart_soft_rx_states[uart]->buffer)] = uart_soft_rx_states[uart]->buffer_byte; // put byte in buffer
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uart_soft_rx_states[uart]->buffer_used++; // update used buffer
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uart_soft_rx_states[uart]->buffer_byte_used = false; // buffer byte is now in buffer
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}
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uart_soft_received[uart] = (uart_soft_rx_states[uart]->buffer_used!=0); // notify user if data is available
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uart_soft_rx_states[uart]->lock = false; // free lock
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return to_return;
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}
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/** timer interrupt service routine to generate UART transmit signals */
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void TIM_ISR(UART_SOFT_RX_TIMER)(void)
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{
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for (uint8_t rx=0; rx<4; rx++) {
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if (timer_interrupt_source(TIM(UART_SOFT_RX_TIMER),timer_flags[rx])) { // got a match on compare for receive pin
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timer_clear_flag(TIM(UART_SOFT_RX_TIMER),timer_flags[rx]); // clear flag
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if (!uart_soft_rx_states[rx]) { // verify if RX exists
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continue; // skip if receive port is not defined it
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}
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uart_soft_rx_states[rx]->byte += ((gpio_get(uart_soft_rx_states[rx]->port, uart_soft_rx_states[rx]->pin)==0 ? 0 : 1)<<(uart_soft_rx_states[rx]->bit-1)); // save bit value
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if (uart_soft_rx_states[rx]->bit<8) { // not the last bit received
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timer_set_oc_value(TIM(UART_SOFT_RX_TIMER),timer_oc[rx],timer_get_counter(TIM(UART_SOFT_RX_TIMER))+rcc_ahb_frequency/uart_soft_rx_states[rx]->baudrate); // set timer to next bit
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uart_soft_rx_states[rx]->bit++; // wait for next bit
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} else { // last bit received
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if (uart_soft_rx_states[rx]->lock) { // someone is already reading data
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uart_soft_rx_states[rx]->buffer_byte = uart_soft_rx_states[rx]->byte; // save byte
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uart_soft_rx_states[rx]->buffer_byte_used = true; // notify reader there is a temporary byte
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} else { // buffer can be updated
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if (uart_soft_rx_states[rx]->buffer_used>=LENGTH(uart_soft_rx_states[rx]->buffer)) { // buffer is full
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uart_soft_rx_states[rx]->buffer_i = (uart_soft_rx_states[rx]->buffer_i+1)%LENGTH(uart_soft_rx_states[rx]->buffer); // drop oldest byte
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uart_soft_rx_states[rx]->buffer_used--; // update buffer usage
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}
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uart_soft_rx_states[rx]->buffer[(uart_soft_rx_states[rx]->buffer_i+uart_soft_rx_states[rx]->buffer_used)%LENGTH(uart_soft_rx_states[rx]->buffer)] = uart_soft_rx_states[rx]->byte; // put byte in buffer
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uart_soft_rx_states[rx]->buffer_used++; // update used buffer
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uart_soft_received[rx] = true; // notify user data is available
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}
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timer_disable_irq(TIM(UART_SOFT_RX_TIMER),timer_interrupt[rx]); // stop_interrupting
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uart_soft_rx_states[rx]->bit = 0; // next bit should be first bit of next byte
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}
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}
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}
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}
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#endif
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#if defined(UART_SOFT_TX_TIMER)
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void uart_soft_flush(uint8_t uart)
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{
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if (uart>=4 || !uart_soft_tx_states[uart]) { // ensure transmit UART port is defined
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return; // return
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}
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while (uart_soft_tx_states[uart]->buffer_used) { // idle until buffer is empty
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__WFI(); // sleep until interrupt
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}
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while (uart_soft_tx_states[uart]->transmit) { // idle until transmission is complete
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__WFI(); // sleep until interrupt
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}
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}
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/** start transmitting a byte from the buffer
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* @param[in] uart UART port used for transmission
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*/
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static void uart_soft_transmit(uint8_t uart) {
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if (uart>=4 || !uart_soft_tx_states[uart]) { // ensure transmit UART port is defined
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return; // UART transmit port not defined
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}
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if (uart_soft_tx_states[uart]->transmit) { // already transmitting
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return; // transmission is already ongoing
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}
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if (!uart_soft_tx_states[uart]->buffer_used) { // no buffered data to transmit
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return; // nothing to transmit
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}
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uart_soft_tx_states[uart]->byte = uart_soft_tx_states[uart]->buffer[uart_soft_tx_states[uart]->buffer_i]; // get byte
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uart_soft_tx_states[uart]->buffer_i = (uart_soft_tx_states[uart]->buffer_i+1)%LENGTH(uart_soft_tx_states[uart]->buffer); // update index
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uart_soft_tx_states[uart]->buffer_used--; // update used buffer
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uart_soft_tx_states[uart]->bit = 0; // LSb is transmitted first
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uart_soft_tx_states[uart]->transmit = true; // start transmission
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gpio_clear(uart_soft_tx_states[uart]->port, uart_soft_tx_states[uart]->pin); // output start bit
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timer_set_oc_value(TIM(UART_SOFT_TX_TIMER), timer_oc[uart], timer_get_counter(TIM(UART_SOFT_TX_TIMER))+(rcc_ahb_frequency/uart_soft_tx_states[uart]->baudrate)); // set timer to output UART frame 1 (data bit 0) in 1 bit
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timer_clear_flag(TIM(UART_SOFT_TX_TIMER), timer_flags[uart]); // clear flag before enabling interrupt
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timer_enable_irq(TIM(UART_SOFT_TX_TIMER), timer_interrupt[uart]);// enable timer IRQ for TX for this UART
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}
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void uart_soft_putbyte_nonblocking(uint8_t uart, uint8_t byte)
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{
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if (uart>=4 || !uart_soft_tx_states[uart]) { // ensure transmit UART port is defined
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return; // return
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}
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while (uart_soft_tx_states[uart]->buffer_used>=LENGTH(uart_soft_tx_states[uart]->buffer)) { // idle until there is place in the buffer
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__WFI(); // sleep until something happened
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}
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uart_soft_tx_states[uart]->buffer[(uart_soft_tx_states[uart]->buffer_i+uart_soft_tx_states[uart]->buffer_used)%LENGTH(uart_soft_tx_states[uart]->buffer)] = byte; // save byte to be transmitted
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uart_soft_tx_states[uart]->buffer_used++; // update used buffer
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uart_soft_transmit(uart); // start transmission
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}
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void uart_soft_putbyte_blocking(uint8_t uart, uint8_t byte)
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{
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uart_soft_putbyte_nonblocking(uart, byte); // put byte in queue
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uart_soft_flush(uart); // wait for all byte to be transmitted
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}
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/** timer interrupt service routine to sample UART receive signals */
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void TIM_ISR(UART_SOFT_TX_TIMER)(void)
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{
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for (uint8_t tx=0; tx<4; tx++) {
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if (timer_interrupt_source(TIM(UART_SOFT_TX_TIMER),timer_flags[tx])) { // got a match on compare for transmit pin
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timer_clear_flag(TIM(UART_SOFT_TX_TIMER),timer_flags[tx]); // clear flag
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if (!uart_soft_tx_states[tx]) { // verify if transmit is defined
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continue; // skip if transmit port is not defined it
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}
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if (uart_soft_tx_states[tx]->bit<8) { // there is a data bit to transmit
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if ((uart_soft_tx_states[tx]->byte>>uart_soft_tx_states[tx]->bit)&0x01) { // bit to transmit is a 1
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gpio_set(uart_soft_tx_states[tx]->port, uart_soft_tx_states[tx]->pin); // set output to high
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} else { // bit to transmit is a 0
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gpio_clear(uart_soft_tx_states[tx]->port, uart_soft_tx_states[tx]->pin); // set output to low
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|
}
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|
timer_set_oc_value(TIM(UART_SOFT_TX_TIMER), timer_oc[tx], timer_get_counter(TIM(UART_SOFT_TX_TIMER))+(rcc_ahb_frequency/uart_soft_tx_states[tx]->baudrate)); // wait for the next frame bit
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uart_soft_tx_states[tx]->bit++; // go to next bit
|
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} else if (uart_soft_tx_states[tx]->bit==8) { // transmit stop bit
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gpio_set(uart_soft_tx_states[tx]->port, uart_soft_tx_states[tx]->pin); // go idle high
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timer_set_oc_value(TIM(UART_SOFT_TX_TIMER), timer_oc[tx], timer_get_counter(TIM(UART_SOFT_TX_TIMER))+(rcc_ahb_frequency/uart_soft_tx_states[tx]->baudrate)); // wait for 1 stop bit
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uart_soft_tx_states[tx]->bit++; // go to next bit
|
|
} else { // UART frame is complete
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timer_disable_irq(TIM(UART_SOFT_TX_TIMER), timer_interrupt[tx]);// enable timer IRQ for TX for this UART
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|
uart_soft_tx_states[tx]->transmit = false; // transmission finished
|
|
uart_soft_transmit(tx); // start next transmission (if there is)
|
|
}
|
|
} // compare match
|
|
} // go through UARTs
|
|
}
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|
#endif
|
|
|
|
/** central function handling receive signal activity */
|
|
static void uart_soft_receive_activity(void)
|
|
{
|
|
for (uint8_t rx=0; rx<4; rx++) {
|
|
if (!uart_soft_rx_states[rx]) { // verify if receive port is not configured
|
|
continue; // skip if receive port is not defined it
|
|
}
|
|
if (uart_soft_rx_states[rx]->state!=gpio_get(uart_soft_rx_states[rx]->port, uart_soft_rx_states[rx]->pin)) { // only do something if state changed
|
|
uart_soft_rx_states[rx]->state = gpio_get(uart_soft_rx_states[rx]->port, uart_soft_rx_states[rx]->pin); // save new state
|
|
if (uart_soft_rx_states[rx]->bit==0) { // start bit edge detected
|
|
if (uart_soft_rx_states[rx]->state==0) { // start bit has to be low
|
|
timer_set_oc_value(TIM(UART_SOFT_RX_TIMER), timer_oc[rx], timer_get_counter(TIM(UART_SOFT_RX_TIMER))+(rcc_ahb_frequency/uart_soft_rx_states[rx]->baudrate)*1.5); // set timer to sample data bit 0 in 1.5 bits
|
|
timer_clear_flag(TIM(UART_SOFT_RX_TIMER), timer_flags[rx]); // clear flag before enabling interrupt
|
|
timer_enable_irq(TIM(UART_SOFT_RX_TIMER), timer_interrupt[rx]);// enable timer IRQ for RX for this UART
|
|
uart_soft_rx_states[rx]->byte = 0; // reset byte value
|
|
uart_soft_rx_states[rx]->bit++; // wait for first bit
|
|
}
|
|
} else { // data bit detected
|
|
timer_set_oc_value(TIM(UART_SOFT_RX_TIMER), timer_oc[rx], timer_get_counter(TIM(UART_SOFT_RX_TIMER))+(rcc_ahb_frequency/uart_soft_rx_states[rx]->baudrate)/2); // resync timer to half a bit (good for drifting transmission, bad if the line is noisy)
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
/** GPIO interrupt service routine to detect UART receive activity */
|
|
#if (defined(UART_SOFT_RX_PORT0) && defined(UART_SOFT_RX_PIN0) && UART_SOFT_RX_PIN0==0) || (defined(UART_SOFT_RX_PORT1) && defined(UART_SOFT_RX_PIN1) && UART_SOFT_RX_PIN1==0) || (defined(UART_SOFT_RX_PORT2) && defined(UART_SOFT_RX_PIN2) && UART_SOFT_RX_PIN2==0) || (defined(UART_SOFT_RX_PORT3) && defined(UART_SOFT_RX_PIN3) && UART_SOFT_RX_PIN3==0)
|
|
void exti0_isr(void)
|
|
{
|
|
exti_reset_request(EXTI0); // clear interrupt flag for pin triggers this ISR (pin state will be checked independently)
|
|
uart_soft_receive_activity(); // check which GPIO changed
|
|
}
|
|
#endif
|
|
#if (defined(UART_SOFT_RX_PORT0) && defined(UART_SOFT_RX_PIN0) && UART_SOFT_RX_PIN0==1) || (defined(UART_SOFT_RX_PORT1) && defined(UART_SOFT_RX_PIN1) && UART_SOFT_RX_PIN1==1) || (defined(UART_SOFT_RX_PORT2) && defined(UART_SOFT_RX_PIN2) && UART_SOFT_RX_PIN2==1) || (defined(UART_SOFT_RX_PORT3) && defined(UART_SOFT_RX_PIN3) && UART_SOFT_RX_PIN3==1)
|
|
void exti1_isr(void)
|
|
{
|
|
exti_reset_request(EXTI1); // clear interrupt flag for pin triggers this ISR (pin state will be checked independently)
|
|
uart_soft_receive_activity(); // check which GPIO changed
|
|
}
|
|
#endif
|
|
#if (defined(UART_SOFT_RX_PORT0) && defined(UART_SOFT_RX_PIN0) && UART_SOFT_RX_PIN0==2) || (defined(UART_SOFT_RX_PORT1) && defined(UART_SOFT_RX_PIN1) && UART_SOFT_RX_PIN1==2) || (defined(UART_SOFT_RX_PORT2) && defined(UART_SOFT_RX_PIN2) && UART_SOFT_RX_PIN2==2) || (defined(UART_SOFT_RX_PORT3) && defined(UART_SOFT_RX_PIN3) && UART_SOFT_RX_PIN3==2)
|
|
void exti2_isr(void)
|
|
{
|
|
exti_reset_request(EXTI2); // clear interrupt flag for pin triggers this ISR (pin state will be checked independently)
|
|
uart_soft_receive_activity(); // check which GPIO changed
|
|
}
|
|
#endif
|
|
#if (defined(UART_SOFT_RX_PORT0) && defined(UART_SOFT_RX_PIN0) && UART_SOFT_RX_PIN0==3) || (defined(UART_SOFT_RX_PORT1) && defined(UART_SOFT_RX_PIN1) && UART_SOFT_RX_PIN1==3) || (defined(UART_SOFT_RX_PORT2) && defined(UART_SOFT_RX_PIN2) && UART_SOFT_RX_PIN2==3) || (defined(UART_SOFT_RX_PORT3) && defined(UART_SOFT_RX_PIN3) && UART_SOFT_RX_PIN3==3)
|
|
void exti3_isr(void)
|
|
{
|
|
exti_reset_request(EXTI3); // clear interrupt flag for pin triggers this ISR (pin state will be checked independently)
|
|
uart_soft_receive_activity(); // check which GPIO changed
|
|
}
|
|
#endif
|
|
#if (defined(UART_SOFT_RX_PORT0) && defined(UART_SOFT_RX_PIN0) && UART_SOFT_RX_PIN0==4) || (defined(UART_SOFT_RX_PORT1) && defined(UART_SOFT_RX_PIN1) && UART_SOFT_RX_PIN1==4) || (defined(UART_SOFT_RX_PORT2) && defined(UART_SOFT_RX_PIN2) && UART_SOFT_RX_PIN2==4) || (defined(UART_SOFT_RX_PORT3) && defined(UART_SOFT_RX_PIN3) && UART_SOFT_RX_PIN3==4)
|
|
void exti4_isr(void)
|
|
{
|
|
exti_reset_request(EXTI4); // clear interrupt flag for pin triggers this ISR (pin state will be checked independently)
|
|
uart_soft_receive_activity(); // check which GPIO changed
|
|
}
|
|
#endif
|
|
#if (defined(UART_SOFT_RX_PORT0) && defined(UART_SOFT_RX_PIN0) && (UART_SOFT_RX_PIN0==5 || UART_SOFT_RX_PIN0==6 || UART_SOFT_RX_PIN0==7 || UART_SOFT_RX_PIN0==8 || UART_SOFT_RX_PIN0==9)) || (defined(UART_SOFT_RX_PORT1) && defined(UART_SOFT_RX_PIN1) && (UART_SOFT_RX_PIN1==5 || UART_SOFT_RX_PIN1==6 || UART_SOFT_RX_PIN1==7 || UART_SOFT_RX_PIN1==8 || UART_SOFT_RX_PIN1==9)) || (defined(UART_SOFT_RX_PORT2) && defined(UART_SOFT_RX_PIN2) && (UART_SOFT_RX_PIN2==5 || UART_SOFT_RX_PIN2==6 || UART_SOFT_RX_PIN2==7 || UART_SOFT_RX_PIN2==8 || UART_SOFT_RX_PIN2==9)) || (defined(UART_SOFT_RX_PORT3) && defined(UART_SOFT_RX_PIN3) && (UART_SOFT_RX_PIN3==5 || UART_SOFT_RX_PIN3==6 || UART_SOFT_RX_PIN3==7 || UART_SOFT_RX_PIN3==8 || UART_SOFT_RX_PIN3==9))
|
|
void exti9_5_isr(void)
|
|
{
|
|
exti_reset_request(EXTI5|EXTI6|EXTI7|EXTI8|EXTI9); // clear interrupt flag for pin triggers this ISR (pin state will be checked independently)
|
|
uart_soft_receive_activity(); // check which GPIO changed
|
|
}
|
|
#endif
|
|
#if (defined(UART_SOFT_RX_PORT0) && defined(UART_SOFT_RX_PIN0) && (UART_SOFT_RX_PIN0==10 || UART_SOFT_RX_PIN0==11 || UART_SOFT_RX_PIN0==12 || UART_SOFT_RX_PIN0==13 || UART_SOFT_RX_PIN0==14 || UART_SOFT_RX_PIN0==15)) || (defined(UART_SOFT_RX_PORT1) && defined(UART_SOFT_RX_PIN1) && (UART_SOFT_RX_PIN1==10 || UART_SOFT_RX_PIN1==11 || UART_SOFT_RX_PIN1==12 || UART_SOFT_RX_PIN1==13 || UART_SOFT_RX_PIN1==14 || UART_SOFT_RX_PIN1==15)) || (defined(UART_SOFT_RX_PORT2) && defined(UART_SOFT_RX_PIN2) && (UART_SOFT_RX_PIN2==10 || UART_SOFT_RX_PIN2==11 || UART_SOFT_RX_PIN2==12 || UART_SOFT_RX_PIN2==13 || UART_SOFT_RX_PIN2==14 || UART_SOFT_RX_PIN2==15)) || (defined(UART_SOFT_RX_PORT3) && defined(UART_SOFT_RX_PIN3) && (UART_SOFT_RX_PIN3==10 || UART_SOFT_RX_PIN3==11 || UART_SOFT_RX_PIN3==12 || UART_SOFT_RX_PIN3==13 || UART_SOFT_RX_PIN3==14 || UART_SOFT_RX_PIN3==15))
|
|
void exti15_10_isr(void)
|
|
{
|
|
exti_reset_request(EXTI10|EXTI11|EXTI12|EXTI13|EXTI14|EXTI15); // clear interrupt flag for pin triggers this ISR (pin state will be checked independently)
|
|
uart_soft_receive_activity(); // check which GPIO changed
|
|
}
|
|
#endif
|
|
|