/* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see .
*
*/
/** library to communicate using I2C as master (code)
* @file i2c_master.c
* @author King Kévin
* @date 2017-2018
* @note peripherals used: I2C, timer @ref i2c_master_timer
*/
/* standard libraries */
#include // standard integer types
//#include // standard I/O facilities
#include // general utilities
/* STM32 (including CM3) libraries */
#include // real-time control clock library
#include // general purpose input output library
#include // I2C library
#include // timer utilities
/* own libraries */
#include "global.h" // global utilities
#include "i2c_master.h" // I2C header and definitions
/** @defgroup i2c_master_timer timer peripheral used for timeouts
* @{
*/
#define I2C_MASTER_TIMER 4 /**< timer peripheral */
#define I2C_MASTER_TIMEOUT 4 /**< timeout factor (compared to expected time) */
/** @} */
/** if the I2C peripheral uses the timer */
static bool i2c_master_timer_usage[] = {false, false};
/** get RCC for I2C based on I2C identifier
* @param[in] i2c I2C base address
* @return RCC address for I2C peripheral
*/
static uint32_t RCC_I2C(uint32_t i2c)
{
switch (i2c) {
case I2C1:
return RCC_I2C1;
break;
case I2C2:
return RCC_I2C2;
break;
default:
while (true);
}
}
/** get RCC for GPIO port for SCL pin based on I2C identifier
* @param[in] i2c I2C base address
* @return RCC GPIO address
*/
static uint32_t RCC_GPIO_PORT_SCL(uint32_t i2c)
{
switch (i2c) {
case I2C1:
case I2C2:
return RCC_GPIOB;
break;
default:
while (true);
}
}
/** get RCC for GPIO port for SDA pin based on I2C identifier
* @param[in] i2c I2C base address
* @return RCC GPIO address
*/
static uint32_t RCC_GPIO_PORT_SDA(uint32_t i2c)
{
switch (i2c) {
case I2C1:
case I2C2:
return RCC_GPIOB;
break;
default:
while (true);
}
}
/** get GPIO port for SCL pin based on I2C identifier
* @param[in] i2c I2C base address
* @return GPIO address
*/
static uint32_t GPIO_PORT_SCL(uint32_t i2c)
{
switch (i2c) {
case I2C1:
if (AFIO_MAPR & AFIO_MAPR_I2C1_REMAP) {
return GPIO_BANK_I2C1_RE_SCL;
} else {
return GPIO_BANK_I2C1_SCL;
}
break;
case I2C2:
return GPIO_BANK_I2C2_SCL;
break;
default:
while (true);
}
}
/** get GPIO port for SDA pin based on I2C identifier
* @param[in] i2c I2C base address
* @return GPIO address
*/
static uint32_t GPIO_PORT_SDA(uint32_t i2c)
{
switch (i2c) {
case I2C1:
if (AFIO_MAPR & AFIO_MAPR_I2C1_REMAP) {
return GPIO_BANK_I2C1_RE_SDA;
} else {
return GPIO_BANK_I2C1_SDA;
}
break;
case I2C2:
return GPIO_BANK_I2C2_SDA;
break;
default:
while (true);
}
}
/** get GPIO pin for SCL pin based on I2C identifier
* @param[in] i2c I2C base address
* @return GPIO address
*/
static uint32_t GPIO_PIN_SCL(uint32_t i2c)
{
switch (i2c) {
case I2C1:
if (AFIO_MAPR & AFIO_MAPR_I2C1_REMAP) {
return GPIO_I2C1_RE_SCL;
} else {
return GPIO_I2C1_SCL;
}
break;
case I2C2:
return GPIO_I2C2_SCL;
break;
default:
while (true);
}
}
/** get GPIO pin for SDA pin based on I2C identifier
* @param[in] i2c I2C base address
* @return GPIO address
*/
static uint32_t GPIO_PIN_SDA(uint32_t i2c)
{
switch (i2c) {
case I2C1:
if (AFIO_MAPR & AFIO_MAPR_I2C1_REMAP) {
return GPIO_I2C1_RE_SDA;
} else {
return GPIO_I2C1_SDA;
}
break;
case I2C2:
return GPIO_I2C2_SDA;
break;
default:
while (true);
}
}
void i2c_master_setup(uint32_t i2c, bool fast)
{
// check I2C peripheral
if (I2C1!=i2c && I2C2!=i2c) {
while (true);
}
// configure I2C peripheral
rcc_periph_clock_enable(RCC_GPIO_PORT_SCL(i2c)); // enable clock for I2C I/O peripheral
gpio_set(GPIO_PORT_SCL(i2c), GPIO_PIN_SCL(i2c)); // already put signal high to avoid small pulse
gpio_set_mode(GPIO_PORT_SCL(i2c), GPIO_MODE_OUTPUT_2_MHZ, GPIO_CNF_OUTPUT_ALTFN_OPENDRAIN, GPIO_PIN_SCL(i2c)); // setup I2C I/O pins
rcc_periph_clock_enable(RCC_GPIO_PORT_SDA(i2c)); // enable clock for I2C I/O peripheral
gpio_set(GPIO_PORT_SDA(i2c), GPIO_PIN_SDA(i2c)); // already put signal high to avoid small pulse
gpio_set_mode(GPIO_PORT_SDA(i2c), GPIO_MODE_OUTPUT_2_MHZ, GPIO_CNF_OUTPUT_ALTFN_OPENDRAIN, GPIO_PIN_SDA(i2c)); // setup I2C I/O pins
rcc_periph_clock_enable(RCC_AFIO); // enable clock for alternate function
rcc_periph_clock_enable(RCC_I2C(i2c)); // enable clock for I2C peripheral
i2c_reset(i2c); // reset configuration
i2c_peripheral_disable(i2c); // I2C needs to be disable to be configured
i2c_set_clock_frequency(i2c, rcc_apb1_frequency/1000000); // configure the peripheral clock to the APB1 freq (where it is connected to)
if (fast) {
i2c_set_fast_mode(i2c);
i2c_set_ccr(i2c, rcc_apb1_frequency/(400000*2)); // set Thigh/Tlow to generate frequency of 400 kHz
i2c_set_trise(i2c, (300/(1000/(rcc_apb1_frequency/1000000)))+1); // max rise time for 300 kHz is 300 ns
} else {
i2c_set_standard_mode(i2c); // the DS1307 has a maximum I2C SCL freq if 100 kHz (corresponding to the standard mode)
i2c_set_ccr(i2c, rcc_apb1_frequency/(100000*2)); // set Thigh/Tlow to generate frequency of 100 kHz
i2c_set_trise(i2c, (1000/(1000/(rcc_apb1_frequency/1000000)))+1); // max rise time for 100 kHz is 1000 ns (~1 MHz)
}
i2c_peripheral_enable(i2c); // enable I2C after configuration completed
// configure time for timeouts
if (!i2c_master_timer_usage[0] && !i2c_master_timer_usage[1]) {
rcc_periph_clock_enable(RCC_TIM(I2C_MASTER_TIMER)); // enable clock for timer block
timer_reset(TIM(I2C_MASTER_TIMER)); // reset timer state
timer_set_mode(TIM(I2C_MASTER_TIMER), TIM_CR1_CKD_CK_INT, TIM_CR1_CMS_EDGE, TIM_CR1_DIR_UP); // set timer mode, use undivided timer clock, edge alignment (simple count), and count up
timer_one_shot_mode(TIM(I2C_MASTER_TIMER)); // stop counter after update event (we only need to one timeout and reset before next operation)
if (fast) {
timer_set_prescaler(TIM(I2C_MASTER_TIMER), rcc_ahb_frequency/400000-1); // set the prescaler so one tick is also one I2C bit (used I2C frequency)
} else {
timer_set_prescaler(TIM(I2C_MASTER_TIMER), rcc_ahb_frequency/100000-1); // set the prescaler so one tick is also one I2C bit (used I2C frequency)
}
timer_set_period(TIM(I2C_MASTER_TIMER), I2C_MASTER_TIMEOUT*9); // use factor to wait for all 9 bits to be transmitted
timer_update_on_overflow(TIM(I2C_MASTER_TIMER)); // only use counter overflow as UEV source (use overflow as timeout)
// wait one transaction for the signal to be stable (some slave have issues when an I2C transaction immediately follows)
timer_set_counter(TIM(I2C_MASTER_TIMER),0); // restart timer
timer_clear_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF); // clear flag
timer_enable_counter(TIM(I2C_MASTER_TIMER)); // enable timer for timeouts
while ( !timer_get_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF));
timer_disable_counter(TIM(I2C_MASTER_TIMER)); // disable timer for timeouts
timer_clear_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF); // clear flag
}
// remember the I2C peripheral uses the timer
if (I2C1==i2c) {
i2c_master_timer_usage[0]=true;
} else if (I2C2==i2c) {
i2c_master_timer_usage[1]=true;
}
}
void i2c_master_release(uint32_t i2c)
{
i2c_reset(i2c); // reset I2C peripheral configuration
i2c_peripheral_disable(i2c); // disable I2C peripheral
rcc_periph_clock_disable(RCC_I2C(i2c)); // disable clock for I2C peripheral
gpio_set_mode(GPIO_PORT_SCL(i2c), GPIO_MODE_INPUT, GPIO_CNF_INPUT_FLOAT, GPIO_PIN_SCL(i2c)); // put I2C I/O pins back to floating
gpio_set_mode(GPIO_PORT_SDA(i2c), GPIO_MODE_INPUT, GPIO_CNF_INPUT_FLOAT, GPIO_PIN_SDA(i2c)); // put I2C I/O pins back to floating
// remember the I2C peripheral doesn't use the timer anymore
if (I2C1==i2c) {
i2c_master_timer_usage[0]=false;
} else if (I2C2==i2c) {
i2c_master_timer_usage[1]=false;
}
if (!i2c_master_timer_usage[0] && !i2c_master_timer_usage[1]) {
timer_reset(TIM(I2C_MASTER_TIMER)); // reset timer configuration
timer_disable_counter(TIM(I2C_MASTER_TIMER)); // disable timer
rcc_periph_clock_disable(RCC_TIM(I2C_MASTER_TIMER)); // disable clock for timer block
}
}
bool i2c_master_check_signals(uint32_t i2c)
{
return (0!=gpio_get(GPIO_PORT_SCL(i2c), GPIO_PIN_SCL(i2c)) && 0!=gpio_get(GPIO_PORT_SDA(i2c), GPIO_PIN_SDA(i2c)));
}
bool i2c_master_start(uint32_t i2c)
{
// check I2C peripheral
if (I2C1!=i2c && I2C2!=i2c) {
while (true);
}
// send (re-)start condition
i2c_send_start(i2c); // send start condition to start transaction
timer_set_counter(TIM(I2C_MASTER_TIMER), 0); // restart timer
timer_clear_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF); // clear flag
timer_enable_counter(TIM(I2C_MASTER_TIMER)); // enable timer for timeouts
while (!(I2C_SR1(i2c) & I2C_SR1_SB) && !timer_get_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF)); // wait until start condition is transmitted
timer_disable_counter(TIM(I2C_MASTER_TIMER)); // disable timer for timeouts
if (timer_get_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF)) { // timeout occurred
timer_clear_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF); // clear flag
return false;
}
if (!(I2C_SR2(i2c) & I2C_SR2_MSL)) { // verify if in master mode
return false;
}
return true;
}
bool i2c_master_select_slave(uint32_t i2c, uint8_t slave, bool write)
{
// check I2C peripheral
if (I2C1!=i2c && I2C2!=i2c) {
while (true);
}
if (!(I2C_SR2(i2c) & I2C_SR2_BUSY)) { // I2C device is not busy (start condition has not been sent)
if (!i2c_master_start(i2c)) { // send start condition
return false; // could not send start condition
}
}
if (!(I2C_SR2(i2c) & I2C_SR2_MSL)) { // I2C device is already not master mode
return false;
}
// select slave
i2c_send_7bit_address(i2c, slave, write ? I2C_WRITE : I2C_READ); // select slave, with read/write flag
timer_set_counter(TIM(I2C_MASTER_TIMER), 0); // restart timer
timer_clear_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF); // clear flag
timer_enable_counter(TIM(I2C_MASTER_TIMER)); // enable timer for timeouts
while (!(I2C_SR1(i2c) & I2C_SR1_ADDR) && !timer_get_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF)); // wait until address is transmitted
timer_disable_counter(TIM(I2C_MASTER_TIMER)); // disable timer for timeouts
if (timer_get_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF)) { // timeout occurred (no ACK received)
timer_clear_flag(TIM(I2C_MASTER_TIMER), TIM_SR_UIF); // clear flag
return false;
}
if (write) {
if (!((I2C_SR2(i2c) & I2C_SR2_TRA))) { // verify we are in transmit mode (and read SR2 to clear ADDR)
return false;
}
} else {
if ((I2C_SR2(i2c) & I2C_SR2_TRA)) { // verify we are in read mode (and read SR2 to clear ADDR)
return false;
}
}
return true;
}
bool i2c_master_read(uint32_t i2c, uint8_t* data, size_t data_size)
{
// check I2C peripheral
if (I2C1!=i2c && I2C2!=i2c) {
while (true);
}
// sanity check
if (data==NULL || data_size==0) { // no data to read
return true;
}
if (!(I2C_SR2(i2c) & I2C_SR2_BUSY)) { // I2C device is not busy (start condition has not been sent)
return false; // address has probably also not been sent
}
if (!(I2C_SR2(i2c) & I2C_SR2_MSL)) { // I2C device not master mode
return false;
}
// read data
for (size_t i=0; i0) {
// read data
if (!i2c_master_read(i2c, data, data_size)) {
goto error;
}
}
success = true;
error:
i2c_master_stop(i2c); // sent stop condition
return success;
}
bool i2c_master_slave_write(uint32_t i2c, uint8_t slave, const uint8_t* data, size_t data_size)
{
// check I2C peripheral
if (I2C1!=i2c && I2C2!=i2c) {
while (true);
}
// sanity check
if (I2C_SR2(i2c) & I2C_SR2_BUSY) { // I2C device is busy
return false;
}
if (I2C_SR2(i2c) & I2C_SR2_MSL) { // I2C device is already in master mode
return false;
}
bool success = false; // return if read succeeded
// send start condition
if (!i2c_master_start(i2c)) {
goto error;
}
// select slave to write
if (!i2c_master_select_slave(i2c, slave, true)) {
goto error;
}
// write data
if (NULL!=data && data_size>0) {
if (!i2c_master_write(i2c, data, data_size)) {
goto error;
}
}
success = true;
error:
i2c_master_stop(i2c); // sent stop condition
return success;
}
bool i2c_master_address_read(uint32_t i2c, uint8_t slave, const uint8_t* address, size_t address_size, uint8_t* data, size_t data_size)
{
// check I2C peripheral
if (I2C1!=i2c && I2C2!=i2c) {
while (true);
}
// sanity check
if (I2C_SR2(i2c) & I2C_SR2_BUSY) { // I2C device is busy
return false;
}
if (I2C_SR2(i2c) & I2C_SR2_MSL) { // I2C device is already in master mode
return false;
}
bool success = false; // return if read succeeded
// write address
if (NULL!=address && address_size>0) {
// send start condition
if (!i2c_master_start(i2c)) {
goto error;
}
// select slave to write
if (!i2c_master_select_slave(i2c, slave, true)) {
goto error;
}
// send address
if (!i2c_master_write(i2c, address, address_size)) {
goto error;
}
}
// read data
if (NULL!=data && data_size>0) {
// send re-start condition
if (!i2c_master_start(i2c)) {
goto error;
}
// select slave to read
if (!i2c_master_select_slave(i2c, slave, false)) {
goto error;
}
// read data
if (!i2c_master_read(i2c, data, data_size)) {
goto error;
}
}
success = true;
error:
i2c_master_stop(i2c); // sent stop condition
return success;
}
bool i2c_master_address_write(uint32_t i2c, uint8_t slave, const uint8_t* address, size_t address_size, const uint8_t* data, size_t data_size)
{
// check I2C peripheral
if (I2C1!=i2c && I2C2!=i2c) {
while (true);
}
// sanity check
if (I2C_SR2(i2c) & I2C_SR2_BUSY) { // I2C device is busy
return false;
}
if (I2C_SR2(i2c) & I2C_SR2_MSL) { // I2C device is already in master mode
return false;
}
bool success = false; // return if read succeeded
// send start condition
if (!i2c_master_start(i2c)) {
goto error;
}
// select slave to write
if (!i2c_master_select_slave(i2c, slave, true)) {
goto error;
}
// write address
if (NULL!=address && address_size>0) {
// send address
if (!i2c_master_write(i2c, address, address_size)) {
goto error;
}
}
// write data
if (NULL!=data && data_size>0) {
if (!i2c_master_write(i2c, data, data_size)) {
goto error;
}
}
success = true;
error:
i2c_master_stop(i2c); // sent stop condition
return success;
}