diff --git a/lib/flash_internal.c b/lib/flash_internal.c
index 90d0498..cfb15ef 100644
--- a/lib/flash_internal.c
+++ b/lib/flash_internal.c
@@ -13,7 +13,6 @@
 #include <libopencmsis/core_cm3.h> // Cortex M3 utilities
 #include <libopencm3/stm32/flash.h> // flash utilities
 #include <libopencm3/stm32/desig.h> // device signature definitions
-#include <libopencm3/stm32/dbgmcu.h> // debug definitions
 
 /* own libraries */
 #include "flash_internal.h" // flash storage library API
@@ -71,28 +70,14 @@ static bool flash_internal_range(uint32_t address, size_t size)
 uint16_t flash_internal_page_size(void)
 {
 	if (0 == flash_internal_page) { // we don't know the page size yet
-		switch (DBGMCU_IDCODE & DBGMCU_IDCODE_DEV_ID_MASK) { // get page size based on family code
-		case 0x412: // low-density, 16-32 kB flash
-		case 0x410: // medium-density, 64-128 kB flash
-			flash_internal_page = 1024;
-			break;
-		case 0x414: // high-density, 256-512 kB flash
-		case 0x430: // XL-density, 768-1024 kB flash
-		case 0x418: // connectivity, 64-256 kB flash
-			flash_internal_page = 2048;
-			break;
-		case 0: // DBGMCU_IDCODE is only accessible in debug mode (this is a known issue documented in STM32F10xxC/D/E Errata sheet, without workaround)
-		default: // unknown
-			if (DESIG_FLASH_SIZE < 256) {
-				if ((*(uint32_t*)0x1FFFF000 & 0xFFFE0000) == 0x20000000) { // non-connectivity system memory start detected (MSP address pointing to SRAM
-					flash_internal_page = 1024;
-				} else { // connectivity system memory start is at 0x1FFFB000
-					flash_internal_page = 2048;
-				}
-			} else {
+		if (DESIG_FLASH_SIZE < 256) {
+			if ((*(uint32_t*)0x1FFFF000 & 0xFFFE0000) == 0x20000000) { // non-connectivity system memory start detected (MSP address pointing to SRAM
+				flash_internal_page = 1024;
+			} else { // connectivity system memory start is at 0x1FFFB000
 				flash_internal_page = 2048;
 			}
-			break;
+		} else {
+			flash_internal_page = 2048;
 		}
 	}