bootloader: fix disabling JNRST
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b24dda9298
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922661ffb3
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@ -39,13 +39,16 @@ void main(void)
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// check if a soft boot has been used
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if (0==(RCC_CSR&0xfc000000)) { // no reset flag present -> this was a soft reset using scb_reset_core() after clearing the flags using RCC_CSR_RMVF, very probably to start the DFU mode
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dfu_force = true;
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} else { // check if the force DFU mode input is set
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} else { // check if
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// disable SWJ pin to use as GPIO
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#if (GPIO(B)==GPIO(DFU_FORCE_PORT)) && (GPIO(4)==GPIO(DFU_FORCE_PIN))
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rcc_periph_clock_enable(RCC_AFIO); // enable clock for alternate function domain (SWJ)
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gpio_primary_remap(AFIO_MAPR_SWJ_CFG_FULL_SWJ_NO_JNTRST, 0);
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#elif ((GPIO(B)==GPIO(DFU_FORCE_PORT)) && (GPIO(3)==GPIO(DFU_FORCE_PIN))) || ((GPIO(A)==GPIO(DFU_FORCE_PORT)) && (GPIO(15)==GPIO(DFU_FORCE_PIN)))
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rcc_periph_clock_enable(RCC_AFIO); // enable clock for alternate function domain (SWJ)
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gpio_primary_remap(AFIO_MAPR_SWJ_CFG_JTAG_OFF_SW_ON, 0);
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#elif ((GPIO(A)==GPIO(DFU_FORCE_PORT)) && (GPIO(14)==GPIO(DFU_FORCE_PIN))) || ((GPIO(A)==GPIO(DFU_FORCE_PORT)) && (GPIO(13)==GPIO(DFU_FORCE_PIN)))
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rcc_periph_clock_enable(RCC_AFIO); // enable clock for alternate function domain (SWJ)
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gpio_primary_remap(AFIO_MAPR_SWJ_CFG_JTAG_OFF_SW_OFF, 0);
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#endif
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rcc_periph_clock_enable(RCC_GPIO(DFU_FORCE_PORT)); // enable clock for GPIO domain
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