bootloader: fix disabling JNRST

This commit is contained in:
King Kévin 2018-02-18 17:50:49 +01:00
parent b24dda9298
commit 922661ffb3
1 changed files with 4 additions and 1 deletions

View File

@ -39,13 +39,16 @@ void main(void)
// check if a soft boot has been used
if (0==(RCC_CSR&0xfc000000)) { // no reset flag present -> this was a soft reset using scb_reset_core() after clearing the flags using RCC_CSR_RMVF, very probably to start the DFU mode
dfu_force = true;
} else { // check if the force DFU mode input is set
} else { // check if
// disable SWJ pin to use as GPIO
#if (GPIO(B)==GPIO(DFU_FORCE_PORT)) && (GPIO(4)==GPIO(DFU_FORCE_PIN))
rcc_periph_clock_enable(RCC_AFIO); // enable clock for alternate function domain (SWJ)
gpio_primary_remap(AFIO_MAPR_SWJ_CFG_FULL_SWJ_NO_JNTRST, 0);
#elif ((GPIO(B)==GPIO(DFU_FORCE_PORT)) && (GPIO(3)==GPIO(DFU_FORCE_PIN))) || ((GPIO(A)==GPIO(DFU_FORCE_PORT)) && (GPIO(15)==GPIO(DFU_FORCE_PIN)))
rcc_periph_clock_enable(RCC_AFIO); // enable clock for alternate function domain (SWJ)
gpio_primary_remap(AFIO_MAPR_SWJ_CFG_JTAG_OFF_SW_ON, 0);
#elif ((GPIO(A)==GPIO(DFU_FORCE_PORT)) && (GPIO(14)==GPIO(DFU_FORCE_PIN))) || ((GPIO(A)==GPIO(DFU_FORCE_PORT)) && (GPIO(13)==GPIO(DFU_FORCE_PIN)))
rcc_periph_clock_enable(RCC_AFIO); // enable clock for alternate function domain (SWJ)
gpio_primary_remap(AFIO_MAPR_SWJ_CFG_JTAG_OFF_SW_OFF, 0);
#endif
rcc_periph_clock_enable(RCC_GPIO(DFU_FORCE_PORT)); // enable clock for GPIO domain