uart_soft: use new pin definition, fix multi-uart support, use masking instead of mod
This commit is contained in:
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97d197237c
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332
lib/uart_soft.c
332
lib/uart_soft.c
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@ -9,6 +9,7 @@
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/* standard libraries */
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#include <stdint.h> // standard integer types
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#include <stdlib.h> // general utilities
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#include <string.h> // memory utilisites
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/* STM32 (including CM3) libraries */
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#include <libopencm3/stm32/rcc.h> // real-time control clock library
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@ -26,26 +27,31 @@
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* @warning only one port must be used per line (pin number)
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* @{
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*/
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#define UART_SOFT_RX_PORT0 B /**< port for receive signal for UART port 0 */
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#define UART_SOFT_RX_PIN0 9 /**< pin for receive signal for UART port 0 */
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//#define UART_SOFT_RX_PORT1 A /**< port for receive signal for UART port 0 */
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//#define UART_SOFT_RX_PIN1 0 /**< pin for receive signal for UART port 0 */
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//#define UART_SOFT_RX_PORT2 A /**< port for receive signal for UART port 0 */
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//#define UART_SOFT_RX_PIN2 0 /**< pin for receive signal for UART port 0 */
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//#define UART_SOFT_RX_PORT3 A /**< port for receive signal for UART port 0 */
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//#define UART_SOFT_RX_PIN3 0 /**< pin for receive signal for UART port 0 */
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#define UART_SOFT_TX_PORT0 B /**< port for transmit signal for UART port 0 */
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#define UART_SOFT_TX_PIN0 8 /**< pin for transmit signal for UART port 0 */
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//#define UART_SOFT_TX_PORT1 A /**< port for transmit signal for UART port 0 */
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//#define UART_SOFT_TX_PIN1 0 /**< pin for transmit signal for UART port 0 */
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//#define UART_SOFT_TX_PORT2 A /**< port for transmit signal for UART port 0 */
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//#define UART_SOFT_TX_PIN2 0 /**< pin for transmit signal for UART port 0 */
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//#define UART_SOFT_TX_PORT3 A /**< port for transmit signal for UART port 0 */
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//#define UART_SOFT_TX_PIN3 0 /**< pin for transmit signal for UART port 0 */
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#define UART_SOFT_RX0_GPIO PB14 /**< pin for receive signal for UART port 0 */
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//#define UART_SOFT_RX1_GPIO PA0 /**< pin for receive signal for UART port 1 */
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//#define UART_SOFT_RX2_GPIO PA0 /**< pin for receive signal for UART port 2 */
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//#define UART_SOFT_RX3_GPIO PA0 /**< pin for receive signal for UART port 3 */
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#define UART_SOFT_TX0_GPIO PB13 /**< pin for transmit signal for UART port 0 */
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//#define UART_SOFT_TX1_GPIO PA0 /**< pin for transmit signal for UART port 1 */
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//#define UART_SOFT_TX2_GPIO PA0 /**< pin for transmit signal for UART port 2 */
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//#define UART_SOFT_TX3_GPIO PA0 /**< pin for transmit signal for UART port 3 */
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/** @} */
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/** buffer size for receive and transmit buffers */
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#if defined(UART_SOFT_RX3_GPIO) || defined(UART_SOFT_TX3_GPIO)
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#define UART_NB 4 /*< number of UART ports */
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#elif defined(UART_SOFT_RX2_GPIO) || defined(UART_SOFT_TX2_GPIO)
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#define UART_NB 3 /*< number of UART ports */
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#elif defined(UART_SOFT_RX1_GPIO) || defined(UART_SOFT_TX1_GPIO)
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#define UART_NB 2 /*< number of UART ports */
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#elif defined(UART_SOFT_RX0_GPIO) || defined(UART_SOFT_TX0_GPIO)
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#define UART_NB 1 /*< number of UART ports */
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#else
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#define UART_NB 0 /*< number of UART ports */
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#endif
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/** buffer size for receive and transmit buffers (must be a power of 2) */
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#define UART_SOFT_BUFFER 128
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/** UART receive state definition */
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struct soft_uart_rx_state {
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uint32_t port; /**< UART receive port */
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@ -53,16 +59,13 @@ struct soft_uart_rx_state {
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uint32_t rcc; /**< UART receive port peripheral clock */
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uint32_t exti; /**< UART receive external interrupt */
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uint32_t irq; /**< UART receive interrupt request */
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uint32_t baudrate; /**< UART receive baud rate */
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uint32_t baudrate; /**< UART receive baud rate (in timer ticks, not bps) */
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volatile uint16_t state; /**< GPIO state for receive pin */
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volatile uint8_t bit; /**< next UART frame bit to receive */
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volatile uint8_t byte; /**< byte being received */
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volatile uint8_t buffer[UART_SOFT_BUFFER]; /**< receive buffer */
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volatile uint8_t buffer_i; /**< index of current data to be read out */
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volatile uint8_t buffer_used; /**< how much data is available */
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volatile bool lock; /**< put lock when changing buffer_i or buffer_used */
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volatile uint8_t buffer_byte; /**< to temporary store byte while locked */
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volatile bool buffer_byte_used; /**< signal a byte has been stored in temporary buffer */
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};
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/** UART transmit state definition */
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@ -70,7 +73,7 @@ struct soft_uart_tx_state {
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uint32_t port; /**< UART receive port */
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uint16_t pin; /**< UART receive pin */
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uint32_t rcc; /**< UART receive port peripheral clock */
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uint32_t baudrate; /**< UART receive baud rate */
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uint32_t baudrate; /**< UART receive baud rate (in timer ticks, not bps) */
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volatile uint8_t bit; /**< next UART frame bit to transmit */
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volatile uint8_t byte; /**< byte being transmitted */
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volatile uint8_t buffer[UART_SOFT_BUFFER]; /**< receive buffer */
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@ -79,18 +82,18 @@ struct soft_uart_tx_state {
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volatile bool transmit; /**< flag to know it transmission is ongoing */
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};
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static struct soft_uart_rx_state* uart_soft_rx_states[4] = {NULL}; /**< states of UART receive ports (up to 4) */
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static struct soft_uart_tx_state* uart_soft_tx_states[4] = {NULL}; /**< states of UART transmit ports (up to 4) */
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static struct soft_uart_rx_state uart_soft_rx_states[UART_NB]; /**< states of UART receive ports */
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static struct soft_uart_tx_state uart_soft_tx_states[UART_NB]; /**< states of UART transmit ports */
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volatile bool uart_soft_received[4] = {false, false, false, false};
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/** @defgroup uart_soft_timer timer used to sample UART signals
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* @{
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*/
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#if (defined(UART_SOFT_RX_PORT0) && defined(UART_SOFT_RX_PIN0)) || (defined(UART_SOFT_RX_PORT1) && defined(UART_SOFT_RX_PIN1)) || (defined(UART_SOFT_RX_PORT2) && defined(UART_SOFT_RX_PIN2)) || (defined(UART_SOFT_RX_PORT3) && defined(UART_SOFT_RX_PIN0))
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#if defined(UART_SOFT_RX0_GPIO) || defined(UART_SOFT_RX1_GPIO) || defined(UART_SOFT_RX2_GPIO) || defined(UART_SOFT_RX3_GPIO)
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#define UART_SOFT_RX_TIMER 3 /**< timer peripheral for receive signals */
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#endif
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#if (defined(UART_SOFT_TX_PORT0) && defined(UART_SOFT_TX_PIN0)) || (defined(UART_SOFT_TX_PORT1) && defined(UART_SOFT_TX_PIN1)) || (defined(UART_SOFT_TX_PORT2) && defined(UART_SOFT_TX_PIN2)) || (defined(UART_SOFT_TX_PORT3) && defined(UART_SOFT_TX_PIN0))
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#if defined(UART_SOFT_TX0_GPIO) || defined(UART_SOFT_TX1_GPIO) || defined(UART_SOFT_TX2_GPIO) || defined(UART_SOFT_TX3_GPIO)
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#define UART_SOFT_TX_TIMER 4 /**< timer peripheral for transmit signals */
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#endif
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/** @} */
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@ -99,64 +102,100 @@ static const uint32_t timer_flags[4] = {TIM_SR_CC1IF, TIM_SR_CC2IF, TIM_SR_CC3IF
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static const uint32_t timer_interrupt[4] = {TIM_DIER_CC1IE, TIM_DIER_CC2IE, TIM_DIER_CC3IE, TIM_DIER_CC4IE}; /**< the interrupt enable for the compare units */
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static const enum tim_oc_id timer_oc[4] = {TIM_OC1, TIM_OC2, TIM_OC3, TIM_OC4}; /**< the output compares for the compare units */
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bool uart_soft_setup(uint32_t *rx_baudrates, uint32_t *tx_baudrates)
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bool uart_soft_setup(const uint32_t* rx_baudrates, const uint32_t* tx_baudrates)
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{
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(void)rx_baudrates; // ensure compile does no complain even if no receive port is used
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(void)tx_baudrates; // ensure compile does no complain even if no transmit port is used
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// save UART receive definition
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#if defined(UART_SOFT_RX_PORT0) && defined(UART_SOFT_RX_PIN0)
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uart_soft_rx_states[0] = calloc(1, sizeof(struct soft_uart_rx_state)); // create state definition
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uart_soft_rx_states[0]->port = GPIO(UART_SOFT_RX_PORT0); // save receive port
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uart_soft_rx_states[0]->pin = GPIO(UART_SOFT_RX_PIN0); // save receive pin
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uart_soft_rx_states[0]->rcc = RCC_GPIO(UART_SOFT_RX_PORT0); // save receive port peripheral clock
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uart_soft_rx_states[0]->exti = EXTI(UART_SOFT_RX_PIN0); // save receive external interrupt
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uart_soft_rx_states[0]->irq = NVIC_EXTI_IRQ(UART_SOFT_RX_PIN0); // save receive interrupt request
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memset(&uart_soft_rx_states, 0, sizeof(uart_soft_rx_states)); // initialize receiver configuration array
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#if defined(UART_SOFT_RX0_GPIO)
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uart_soft_rx_states[0].port = GPIO_PORT(UART_SOFT_RX0_GPIO); // save receive port
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uart_soft_rx_states[0].pin = GPIO_PIN(UART_SOFT_RX0_GPIO); // save receive pin
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uart_soft_rx_states[0].rcc = GPIO_RCC(UART_SOFT_RX0_GPIO); // save receive port peripheral clock
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uart_soft_rx_states[0].exti = GPIO_EXTI(UART_SOFT_RX0_GPIO); // save receive external interrupt
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uart_soft_rx_states[0].irq = GPIO_NVIC_EXTI_IRQ(UART_SOFT_RX0_GPIO); // save receive interrupt request
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#endif
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#if defined(UART_SOFT_RX1_GPIO)
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uart_soft_rx_states[1].port = GPIO_PORT(UART_SOFT_RX1_GPIO); // save receive port
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uart_soft_rx_states[1].pin = GPIO_PIN(UART_SOFT_RX1_GPIO); // save receive pin
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uart_soft_rx_states[1].rcc = GPIO_RCC(UART_SOFT_RX1_GPIO); // save receive port peripheral clock
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uart_soft_rx_states[1].exti = GPIO_EXTI(UART_SOFT_RX1_GPIO); // save receive external interrupt
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uart_soft_rx_states[1].irq = GPIO_NVIC_EXTI_IRQ(UART_SOFT_RX1_GPIO); // save receive interrupt request
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#endif
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#if defined(UART_SOFT_RX2_GPIO)
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uart_soft_rx_states[2].port = GPIO_PORT(UART_SOFT_RX2_GPIO); // save receive port
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uart_soft_rx_states[2].pin = GPIO_PIN(UART_SOFT_RX2_GPIO); // save receive pin
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uart_soft_rx_states[2].rcc = GPIO_RCC(UART_SOFT_RX2_GPIO); // save receive port peripheral clock
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uart_soft_rx_states[2].exti = GPIO_EXTI(UART_SOFT_RX2_GPIO); // save receive external interrupt
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uart_soft_rx_states[2].irq = GPIO_NVIC_EXTI_IRQ(UART_SOFT_RX2_GPIO); // save receive interrupt request
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#endif
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#if defined(UART_SOFT_RX3_GPIO)
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uart_soft_rx_states[3].port = GPIO_PORT(UART_SOFT_RX3_GPIO); // save receive port
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uart_soft_rx_states[3].pin = GPIO_PIN(UART_SOFT_RX3_GPIO); // save receive pin
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uart_soft_rx_states[3].rcc = GPIO_RCC(UART_SOFT_RX3_GPIO); // save receive port peripheral clock
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uart_soft_rx_states[3].exti = GPIO_EXTI(UART_SOFT_RX3_GPIO); // save receive external interrupt
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uart_soft_rx_states[3].irq = GPIO_NVIC_EXTI_IRQ(UART_SOFT_RX3_GPIO); // save receive interrupt request
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#endif
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// setup UART receive GPIO
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for (uint8_t rx = 0; rx < 4; rx++) {
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if (!uart_soft_rx_states[rx]) { // verify is receive UART is defined
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for (uint8_t rx = 0; rx < UART_NB; rx++) {
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if (0 == uart_soft_rx_states[rx].port) { // verify is receive UART is defined
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continue; // skip configuration if not defined
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}
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if (!rx_baudrates || 0 == rx_baudrates[rx]) { // verify if receive baud rate has been defined
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return false;
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}
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uart_soft_rx_states[rx]->baudrate = rx_baudrates[rx]; // save baud rate
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rcc_periph_clock_enable(uart_soft_rx_states[rx]->rcc); // enable clock for GPIO peripheral
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gpio_set_mode(uart_soft_rx_states[rx]->port, GPIO_MODE_INPUT, GPIO_CNF_INPUT_PULL_UPDOWN, uart_soft_rx_states[rx]->pin); // setup GPIO pin UART receive
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gpio_set(uart_soft_rx_states[rx]->port, uart_soft_rx_states[rx]->pin); // pull up to avoid noise when not connected
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uart_soft_rx_states[rx].baudrate = rcc_ahb_frequency / rx_baudrates[rx] - 1; // save baud rate
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rcc_periph_clock_enable(uart_soft_rx_states[rx].rcc); // enable clock for GPIO peripheral
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gpio_set(uart_soft_rx_states[rx].port, uart_soft_rx_states[rx].pin); // pull up to avoid noise when not connected
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gpio_set_mode(uart_soft_rx_states[rx].port, GPIO_MODE_INPUT, GPIO_CNF_INPUT_PULL_UPDOWN, uart_soft_rx_states[rx].pin); // setup GPIO pin UART receive
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rcc_periph_clock_enable(RCC_AFIO); // enable alternate function clock for external interrupt
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exti_select_source(uart_soft_rx_states[rx]->exti, uart_soft_rx_states[rx]->port); // mask external interrupt of this pin only for this port
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exti_enable_request(uart_soft_rx_states[rx]->exti); // enable external interrupt
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exti_set_trigger(uart_soft_rx_states[rx]->exti, EXTI_TRIGGER_BOTH); // trigger when button is pressed
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nvic_enable_irq(uart_soft_rx_states[rx]->irq); // enable interrupt
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uart_soft_rx_states[rx]->state = gpio_get(uart_soft_rx_states[rx]->port, uart_soft_rx_states[rx]->pin); // save state of GPIO
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uart_soft_rx_states[rx]->bit = 0; // reset bits received
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exti_select_source(uart_soft_rx_states[rx].exti, uart_soft_rx_states[rx].port); // mask external interrupt of this pin only for this port
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exti_enable_request(uart_soft_rx_states[rx].exti); // enable external interrupt
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exti_set_trigger(uart_soft_rx_states[rx].exti, EXTI_TRIGGER_BOTH); // trigger when button is pressed
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nvic_enable_irq(uart_soft_rx_states[rx].irq); // enable interrupt
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uart_soft_rx_states[rx].state = gpio_get(uart_soft_rx_states[rx].port, uart_soft_rx_states[rx].pin); // save state of GPIO
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uart_soft_rx_states[rx].bit = 0; // reset bits received
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}
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// save UART transmit definition
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#if defined(UART_SOFT_TX_PORT0) && defined(UART_SOFT_TX_PIN0)
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uart_soft_tx_states[0] = calloc(1, sizeof(struct soft_uart_tx_state)); // create state definition
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uart_soft_tx_states[0]->port = GPIO(UART_SOFT_TX_PORT0); // save receive port
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uart_soft_tx_states[0]->pin = GPIO(UART_SOFT_TX_PIN0); // save receive pin
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uart_soft_tx_states[0]->rcc = RCC_GPIO(UART_SOFT_TX_PORT0); // save receive port peripheral clock
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memset(&uart_soft_tx_states, 0, sizeof(uart_soft_tx_states)); // initialize transmitter configuration array
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#if defined(UART_SOFT_TX0_GPIO)
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uart_soft_tx_states[0].port = GPIO_PORT(UART_SOFT_TX0_GPIO); // save receive port
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uart_soft_tx_states[0].pin = GPIO_PIN(UART_SOFT_TX0_GPIO); // save receive pin
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uart_soft_tx_states[0].rcc = GPIO_RCC(UART_SOFT_TX0_GPIO); // save receive port peripheral clock
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#endif
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#if defined(UART_SOFT_TX1_GPIO)
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uart_soft_tx_states[1].port = GPIO_PORT(UART_SOFT_TX1_GPIO); // save receive port
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uart_soft_tx_states[1].pin = GPIO_PIN(UART_SOFT_TX1_GPIO); // save receive pin
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uart_soft_tx_states[1].rcc = GPIO_RCC(UART_SOFT_TX1_GPIO); // save receive port peripheral clock
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#endif
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#if defined(UART_SOFT_TX2_GPIO)
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uart_soft_tx_states[2].port = GPIO_PORT(UART_SOFT_TX2_GPIO); // save receive port
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uart_soft_tx_states[2].pin = GPIO_PIN(UART_SOFT_TX2_GPIO); // save receive pin
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uart_soft_tx_states[2].rcc = GPIO_RCC(UART_SOFT_TX2_GPIO); // save receive port peripheral clock
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#endif
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#if defined(UART_SOFT_TX3_GPIO)
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uart_soft_tx_states[3].port = GPIO_PORT(UART_SOFT_TX3_GPIO); // save receive port
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uart_soft_tx_states[3].pin = GPIO_PIN(UART_SOFT_TX3_GPIO); // save receive pin
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uart_soft_tx_states[3].rcc = GPIO_RCC(UART_SOFT_TX3_GPIO); // save receive port peripheral clock
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#endif
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// setup UART transmit GPIO
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for (uint8_t tx = 0; tx < 4; tx++) {
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if (!uart_soft_tx_states[tx]) { // verify is transmit UART is defined
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for (uint8_t tx = 0; tx < UART_NB; tx++) {
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if (0 == uart_soft_tx_states[tx].port) { // verify is transmit UART is defined
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continue; // skip configuration if not defined
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}
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if (!tx_baudrates || 0 == tx_baudrates[tx]) { // verify if transmit baud rate has been defined
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return false;
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}
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uart_soft_tx_states[tx]->baudrate = tx_baudrates[tx]; // save baud rate
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rcc_periph_clock_enable(uart_soft_tx_states[tx]->rcc); // enable clock for GPIO peripheral
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gpio_set_mode(uart_soft_tx_states[tx]->port, GPIO_MODE_OUTPUT_2_MHZ, GPIO_CNF_OUTPUT_PUSHPULL, uart_soft_tx_states[tx]->pin); // setup GPIO UART transmit pin
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gpio_set(uart_soft_tx_states[tx]->port, uart_soft_tx_states[tx]->pin); // idle high
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uart_soft_tx_states[tx].baudrate = rcc_ahb_frequency / tx_baudrates[tx] - 1; // save baud rate
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rcc_periph_clock_enable(uart_soft_tx_states[tx].rcc); // enable clock for GPIO peripheral
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gpio_set_mode(uart_soft_tx_states[tx].port, GPIO_MODE_OUTPUT_2_MHZ, GPIO_CNF_OUTPUT_PUSHPULL, uart_soft_tx_states[tx].pin); // setup GPIO UART transmit pin
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gpio_set(uart_soft_tx_states[tx].port, uart_soft_tx_states[tx].pin); // idle high
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}
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rcc_periph_clock_enable(GPIO_RCC(PB12));
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gpio_set_mode(GPIO_PORT(PB12), GPIO_MODE_OUTPUT_2_MHZ, GPIO_CNF_OUTPUT_PUSHPULL, GPIO_PIN(PB12));
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// setup timer
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#if defined(UART_SOFT_RX_TIMER)
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rcc_periph_clock_enable(RCC_TIM(UART_SOFT_RX_TIMER)); // enable clock for timer peripheral
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@ -181,55 +220,45 @@ bool uart_soft_setup(uint32_t *rx_baudrates, uint32_t *tx_baudrates)
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#if defined(UART_SOFT_RX_TIMER)
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uint8_t uart_soft_getbyte(uint8_t uart)
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{
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if (uart >= 4 || !uart_soft_rx_states[uart]) { // ensure receive UART port is defined
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return 0; // return
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if (uart >= UART_NB || 0 == uart_soft_rx_states[uart].port) { // ensure receive UART port is defined
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return 0;
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}
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while (!uart_soft_rx_states[uart]->buffer_used) { // idle until data is available
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__WFI(); // sleep until interrupt
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if (0 == uart_soft_rx_states[uart].buffer_used) { // there is no data in the buffer
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return 0;
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}
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uart_soft_rx_states[uart]->lock = true; // set lock
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uint8_t to_return = uart_soft_rx_states[uart]->buffer[uart_soft_rx_states[uart]->buffer_i]; // get the next available character
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uart_soft_rx_states[uart]->buffer_i = (uart_soft_rx_states[uart]->buffer_i + 1) % LENGTH(uart_soft_rx_states[uart]->buffer); // update used buffer
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uart_soft_rx_states[uart]->buffer_used--; // update used buffer
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uart_soft_rx_states[uart]->lock = false; // free lock
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if (uart_soft_rx_states[uart]->buffer_byte_used) { // temporary byte has been stored
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uart_soft_rx_states[uart]->buffer[(uart_soft_rx_states[uart]->buffer_i + uart_soft_rx_states[uart]->buffer_used) % LENGTH(uart_soft_rx_states[uart]->buffer)] = uart_soft_rx_states[uart]->buffer_byte; // put byte in buffer
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uart_soft_rx_states[uart]->buffer_used++; // update used buffer
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uart_soft_rx_states[uart]->buffer_byte_used = false; // buffer byte is now in buffer
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}
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||||
uart_soft_received[uart] = (0 != uart_soft_rx_states[uart]->buffer_used); // notify user if data is available
|
||||
uart_soft_rx_states[uart]->lock = false; // free lock
|
||||
nvic_disable_irq(uart_soft_rx_states[uart].irq); // disable interrupt to protect the state of the buffer (interrupt can still get pending)
|
||||
uint8_t to_return = uart_soft_rx_states[uart].buffer[uart_soft_rx_states[uart].buffer_i]; // get the next available character
|
||||
uart_soft_rx_states[uart].buffer_i = (uart_soft_rx_states[uart].buffer_i + 1) & (LENGTH(uart_soft_rx_states[uart].buffer) - 1); // update used buffer
|
||||
uart_soft_rx_states[uart].buffer_used--; // update used buffer
|
||||
nvic_enable_irq(uart_soft_rx_states[uart].irq); // re-enable interrupt since critical part is finished
|
||||
uart_soft_received[uart] = (0 != uart_soft_rx_states[uart].buffer_used); // notify user if data is available
|
||||
return to_return;
|
||||
}
|
||||
|
||||
/** timer interrupt service routine to generate UART transmit signals */
|
||||
/** timer interrupt service routine to generate parse receive signal */
|
||||
void TIM_ISR(UART_SOFT_RX_TIMER)(void)
|
||||
{
|
||||
for (uint8_t rx = 0; rx < 4; rx++) {
|
||||
if (timer_interrupt_source(TIM(UART_SOFT_RX_TIMER),timer_flags[rx])) { // got a match on compare for receive pin
|
||||
timer_clear_flag(TIM(UART_SOFT_RX_TIMER),timer_flags[rx]); // clear flag
|
||||
if (!uart_soft_rx_states[rx]) { // verify if RX exists
|
||||
for (uint8_t rx = 0; rx < UART_NB; rx++) {
|
||||
if (timer_interrupt_source(TIM(UART_SOFT_RX_TIMER), timer_flags[rx])) { // got a match on compare for receive pin
|
||||
timer_clear_flag(TIM(UART_SOFT_RX_TIMER), timer_flags[rx]); // clear flag
|
||||
if (0 == uart_soft_rx_states[rx].port) { // verify if RX exists
|
||||
continue; // skip if receive port is not defined it
|
||||
}
|
||||
uart_soft_rx_states[rx]->byte += (0 == (gpio_get(uart_soft_rx_states[rx]->port, uart_soft_rx_states[rx]->pin) ? 0 : 1)<<(uart_soft_rx_states[rx]->bit - 1)); // save bit value
|
||||
if (uart_soft_rx_states[rx]->bit < 8) { // not the last bit received
|
||||
timer_set_oc_value(TIM(UART_SOFT_RX_TIMER), timer_oc[rx], timer_get_counter(TIM(UART_SOFT_RX_TIMER)) + rcc_ahb_frequency / uart_soft_rx_states[rx]->baudrate); // set timer to next bit
|
||||
uart_soft_rx_states[rx]->bit++; // wait for next bit
|
||||
gpio_toggle(GPIO_PORT(PB12), GPIO_PIN(PB12));
|
||||
uart_soft_rx_states[rx].byte += ((0 == gpio_get(uart_soft_rx_states[rx].port, uart_soft_rx_states[rx].pin) ? 0 : 1) << (uart_soft_rx_states[rx].bit - 1)); // save bit value
|
||||
if (uart_soft_rx_states[rx].bit < 8) { // not the last bit received
|
||||
timer_set_oc_value(TIM(UART_SOFT_RX_TIMER), timer_oc[rx], timer_get_counter(TIM(UART_SOFT_RX_TIMER)) + uart_soft_rx_states[rx].baudrate); // set timer to next bit
|
||||
uart_soft_rx_states[rx].bit++; // wait for next bit
|
||||
} else { // last bit received
|
||||
if (uart_soft_rx_states[rx]->lock) { // someone is already reading data
|
||||
uart_soft_rx_states[rx]->buffer_byte = uart_soft_rx_states[rx]->byte; // save byte
|
||||
uart_soft_rx_states[rx]->buffer_byte_used = true; // notify reader there is a temporary byte
|
||||
} else { // buffer can be updated
|
||||
if (uart_soft_rx_states[rx]->buffer_used >= LENGTH(uart_soft_rx_states[rx]->buffer)) { // buffer is full
|
||||
uart_soft_rx_states[rx]->buffer_i = (uart_soft_rx_states[rx]->buffer_i + 1) % LENGTH(uart_soft_rx_states[rx]->buffer); // drop oldest byte
|
||||
uart_soft_rx_states[rx]->buffer_used--; // update buffer usage
|
||||
}
|
||||
uart_soft_rx_states[rx]->buffer[(uart_soft_rx_states[rx]->buffer_i + uart_soft_rx_states[rx]->buffer_used) % LENGTH(uart_soft_rx_states[rx]->buffer)] = uart_soft_rx_states[rx]->byte; // put byte in buffer
|
||||
uart_soft_rx_states[rx]->buffer_used++; // update used buffer
|
||||
uart_soft_received[rx] = true; // notify user data is available
|
||||
if (uart_soft_rx_states[rx].buffer_used >= LENGTH(uart_soft_rx_states[rx].buffer)) { // buffer is full
|
||||
uart_soft_rx_states[rx].buffer_i = (uart_soft_rx_states[rx].buffer_i + 1) & (LENGTH(uart_soft_rx_states[rx].buffer) - 1); // drop oldest byte
|
||||
uart_soft_rx_states[rx].buffer_used--; // update buffer usage
|
||||
}
|
||||
timer_disable_irq(TIM(UART_SOFT_RX_TIMER), timer_interrupt[rx]); // stop_interrupting
|
||||
uart_soft_rx_states[rx]->bit = 0; // next bit should be first bit of next byte
|
||||
uart_soft_rx_states[rx].buffer[(uart_soft_rx_states[rx].buffer_i + uart_soft_rx_states[rx].buffer_used) & (LENGTH(uart_soft_rx_states[rx].buffer) - 1)] = uart_soft_rx_states[rx].byte; // put byte in buffer
|
||||
uart_soft_rx_states[rx].buffer_used++; // update used buffer
|
||||
uart_soft_received[rx] = true; // notify user data is available
|
||||
timer_disable_irq(TIM(UART_SOFT_RX_TIMER), timer_interrupt[rx]); // stop interrupting
|
||||
uart_soft_rx_states[rx].bit = 0; // next bit should be first bit of next byte
|
||||
}
|
||||
}
|
||||
}
|
||||
|
@ -239,13 +268,13 @@ void TIM_ISR(UART_SOFT_RX_TIMER)(void)
|
|||
#if defined(UART_SOFT_TX_TIMER)
|
||||
void uart_soft_flush(uint8_t uart)
|
||||
{
|
||||
if (uart >= 4 || !uart_soft_tx_states[uart]) { // ensure transmit UART port is defined
|
||||
if (uart >= UART_NB || 0 == uart_soft_tx_states[uart].port) { // ensure transmit UART port is defined
|
||||
return; // return
|
||||
}
|
||||
while (uart_soft_tx_states[uart]->buffer_used) { // idle until buffer is empty
|
||||
while (uart_soft_tx_states[uart].buffer_used) { // idle until buffer is empty
|
||||
__WFI(); // sleep until interrupt
|
||||
}
|
||||
while (uart_soft_tx_states[uart]->transmit) { // idle until transmission is complete
|
||||
while (uart_soft_tx_states[uart].transmit) { // idle until transmission is complete
|
||||
__WFI(); // sleep until interrupt
|
||||
}
|
||||
}
|
||||
|
@ -254,69 +283,73 @@ void uart_soft_flush(uint8_t uart)
|
|||
* @param[in] uart UART port used for transmission
|
||||
*/
|
||||
static void uart_soft_transmit(uint8_t uart) {
|
||||
if (uart>=4 || !uart_soft_tx_states[uart]) { // ensure transmit UART port is defined
|
||||
if (uart >= UART_NB || 0 == uart_soft_tx_states[uart].port) { // ensure transmit UART port is defined
|
||||
return; // UART transmit port not defined
|
||||
}
|
||||
if (uart_soft_tx_states[uart]->transmit) { // already transmitting
|
||||
if (uart_soft_tx_states[uart].transmit) { // already transmitting
|
||||
return; // transmission is already ongoing
|
||||
}
|
||||
if (!uart_soft_tx_states[uart]->buffer_used) { // no buffered data to transmit
|
||||
if (!uart_soft_tx_states[uart].buffer_used) { // no buffered data to transmit
|
||||
return; // nothing to transmit
|
||||
}
|
||||
uart_soft_tx_states[uart]->byte = uart_soft_tx_states[uart]->buffer[uart_soft_tx_states[uart]->buffer_i]; // get byte
|
||||
uart_soft_tx_states[uart]->buffer_i = (uart_soft_tx_states[uart]->buffer_i + 1) % LENGTH(uart_soft_tx_states[uart]->buffer); // update index
|
||||
uart_soft_tx_states[uart]->buffer_used--; // update used buffer
|
||||
uart_soft_tx_states[uart]->bit = 0; // LSb is transmitted first
|
||||
uart_soft_tx_states[uart]->transmit = true; // start transmission
|
||||
gpio_clear(uart_soft_tx_states[uart]->port, uart_soft_tx_states[uart]->pin); // output start bit
|
||||
timer_set_oc_value(TIM(UART_SOFT_TX_TIMER), timer_oc[uart], timer_get_counter(TIM(UART_SOFT_TX_TIMER)) + (rcc_ahb_frequency / uart_soft_tx_states[uart]->baudrate)); // set timer to output UART frame 1 (data bit 0) in 1 bit
|
||||
timer_disable_irq(TIM(UART_SOFT_TX_TIMER), timer_interrupt[uart]); // disable interrupt to protect the state of the buffer (interrupt can still get pending)
|
||||
uart_soft_tx_states[uart].byte = uart_soft_tx_states[uart].buffer[uart_soft_tx_states[uart].buffer_i]; // get byte
|
||||
uart_soft_tx_states[uart].buffer_i = (uart_soft_tx_states[uart].buffer_i + 1) & (LENGTH(uart_soft_tx_states[uart].buffer) - 1); // update index
|
||||
uart_soft_tx_states[uart].buffer_used--; // update used buffer
|
||||
uart_soft_tx_states[uart].bit = 0; // LSb is transmitted first
|
||||
uart_soft_tx_states[uart].transmit = true; // start transmission
|
||||
gpio_clear(uart_soft_tx_states[uart].port, uart_soft_tx_states[uart].pin); // output start bit
|
||||
timer_set_oc_value(TIM(UART_SOFT_TX_TIMER), timer_oc[uart], timer_get_counter(TIM(UART_SOFT_TX_TIMER)) + uart_soft_tx_states[uart].baudrate); // set timer to output UART frame 1 (data bit 0) in 1 bit
|
||||
timer_clear_flag(TIM(UART_SOFT_TX_TIMER), timer_flags[uart]); // clear flag before enabling interrupt
|
||||
timer_enable_irq(TIM(UART_SOFT_TX_TIMER), timer_interrupt[uart]);// enable timer IRQ for TX for this UART
|
||||
timer_enable_irq(TIM(UART_SOFT_TX_TIMER), timer_interrupt[uart]); // enable timer IRQ for TX for this UART
|
||||
}
|
||||
|
||||
void uart_soft_putbyte_nonblocking(uint8_t uart, uint8_t byte)
|
||||
{
|
||||
if (uart >= 4 || !uart_soft_tx_states[uart]) { // ensure transmit UART port is defined
|
||||
if (uart >= UART_NB || 0 == uart_soft_tx_states[uart].port) { // ensure transmit UART port is defined
|
||||
return; // return
|
||||
}
|
||||
while (uart_soft_tx_states[uart]->buffer_used >= LENGTH(uart_soft_tx_states[uart]->buffer)) { // idle until there is place in the buffer
|
||||
__WFI(); // sleep until something happened
|
||||
}
|
||||
uart_soft_tx_states[uart]->buffer[(uart_soft_tx_states[uart]->buffer_i + uart_soft_tx_states[uart]->buffer_used) % LENGTH(uart_soft_tx_states[uart]->buffer)] = byte; // save byte to be transmitted
|
||||
uart_soft_tx_states[uart]->buffer_used++; // update used buffer
|
||||
while (uart_soft_tx_states[uart].buffer_used >= LENGTH(uart_soft_tx_states[uart].buffer)); // wait until there is place in the buffer
|
||||
timer_disable_irq(TIM(UART_SOFT_TX_TIMER), timer_interrupt[uart]); // disable interrupt to protect the state of the buffer (interrupt can still get pending)
|
||||
uart_soft_tx_states[uart].buffer[(uart_soft_tx_states[uart].buffer_i + uart_soft_tx_states[uart].buffer_used) & (LENGTH(uart_soft_tx_states[uart].buffer) - 1)] = byte; // save byte to be transmitted
|
||||
uart_soft_tx_states[uart].buffer_used++; // update used buffer
|
||||
timer_enable_irq(TIM(UART_SOFT_TX_TIMER), timer_interrupt[uart]); // re-enable interrupts to resume transmission
|
||||
uart_soft_transmit(uart); // start transmission
|
||||
}
|
||||
|
||||
void uart_soft_putbyte_blocking(uint8_t uart, uint8_t byte)
|
||||
{
|
||||
if (uart >= UART_NB || 0 == uart_soft_tx_states[uart].port) { // ensure transmit UART port is defined
|
||||
return; // return
|
||||
}
|
||||
uart_soft_putbyte_nonblocking(uart, byte); // put byte in queue
|
||||
uart_soft_flush(uart); // wait for all byte to be transmitted
|
||||
}
|
||||
|
||||
/** timer interrupt service routine to sample UART receive signals */
|
||||
/** timer interrupt service routine to transmit data */
|
||||
void TIM_ISR(UART_SOFT_TX_TIMER)(void)
|
||||
{
|
||||
for (uint8_t tx = 0; tx < 4; tx++) {
|
||||
for (uint8_t tx = 0; tx < UART_NB; tx++) {
|
||||
if (timer_interrupt_source(TIM(UART_SOFT_TX_TIMER), timer_flags[tx])) { // got a match on compare for transmit pin
|
||||
timer_clear_flag(TIM(UART_SOFT_TX_TIMER), timer_flags[tx]); // clear flag
|
||||
if (!uart_soft_tx_states[tx]) { // verify if transmit is defined
|
||||
if (0 == uart_soft_tx_states[tx].port) { // verify if transmit is defined
|
||||
continue; // skip if transmit port is not defined it
|
||||
}
|
||||
if (uart_soft_tx_states[tx]->bit < 8) { // there is a data bit to transmit
|
||||
if ((uart_soft_tx_states[tx]->byte >> uart_soft_tx_states[tx]->bit) & 0x01) { // bit to transmit is a 1
|
||||
gpio_set(uart_soft_tx_states[tx]->port, uart_soft_tx_states[tx]->pin); // set output to high
|
||||
if (uart_soft_tx_states[tx].bit < 8) { // there is a data bit to transmit
|
||||
if ((uart_soft_tx_states[tx].byte >> uart_soft_tx_states[tx].bit) & 0x01) { // bit to transmit is a 1
|
||||
gpio_set(uart_soft_tx_states[tx].port, uart_soft_tx_states[tx].pin); // set output to high
|
||||
} else { // bit to transmit is a 0
|
||||
gpio_clear(uart_soft_tx_states[tx]->port, uart_soft_tx_states[tx]->pin); // set output to low
|
||||
gpio_clear(uart_soft_tx_states[tx].port, uart_soft_tx_states[tx].pin); // set output to low
|
||||
}
|
||||
timer_set_oc_value(TIM(UART_SOFT_TX_TIMER), timer_oc[tx], timer_get_counter(TIM(UART_SOFT_TX_TIMER)) + (rcc_ahb_frequency / uart_soft_tx_states[tx]->baudrate)); // wait for the next frame bit
|
||||
uart_soft_tx_states[tx]->bit++; // go to next bit
|
||||
} else if (8 == uart_soft_tx_states[tx]->bit) { // transmit stop bit
|
||||
gpio_set(uart_soft_tx_states[tx]->port, uart_soft_tx_states[tx]->pin); // go idle high
|
||||
timer_set_oc_value(TIM(UART_SOFT_TX_TIMER), timer_oc[tx], timer_get_counter(TIM(UART_SOFT_TX_TIMER)) + (rcc_ahb_frequency / uart_soft_tx_states[tx]->baudrate)); // wait for 1 stop bit
|
||||
uart_soft_tx_states[tx]->bit++; // go to next bit
|
||||
timer_set_oc_value(TIM(UART_SOFT_TX_TIMER), timer_oc[tx], timer_get_counter(TIM(UART_SOFT_TX_TIMER)) + uart_soft_tx_states[tx].baudrate); // wait for the next frame bit
|
||||
uart_soft_tx_states[tx].bit++; // go to next bit
|
||||
} else if (8 == uart_soft_tx_states[tx].bit) { // transmit stop bit
|
||||
gpio_set(uart_soft_tx_states[tx].port, uart_soft_tx_states[tx].pin); // go idle high
|
||||
timer_set_oc_value(TIM(UART_SOFT_TX_TIMER), timer_oc[tx], timer_get_counter(TIM(UART_SOFT_TX_TIMER)) + uart_soft_tx_states[tx].baudrate); // wait for 1 stop bit
|
||||
uart_soft_tx_states[tx].bit++; // go to next bit
|
||||
} else { // UART frame is complete
|
||||
timer_disable_irq(TIM(UART_SOFT_TX_TIMER), timer_interrupt[tx]);// enable timer IRQ for TX for this UART
|
||||
uart_soft_tx_states[tx]->transmit = false; // transmission finished
|
||||
uart_soft_tx_states[tx].transmit = false; // transmission finished
|
||||
uart_soft_transmit(tx); // start next transmission (if there is)
|
||||
}
|
||||
} // compare match
|
||||
|
@ -327,71 +360,72 @@ void TIM_ISR(UART_SOFT_TX_TIMER)(void)
|
|||
/** central function handling receive signal activity */
|
||||
static void uart_soft_receive_activity(void)
|
||||
{
|
||||
for (uint8_t rx = 0; rx < 4; rx++) {
|
||||
if (!uart_soft_rx_states[rx]) { // verify if receive port is not configured
|
||||
for (uint8_t rx = 0; rx < UART_NB; rx++) {
|
||||
if (0 == uart_soft_rx_states[rx].port) { // verify if receive port is not configured
|
||||
continue; // skip if receive port is not defined it
|
||||
}
|
||||
if (uart_soft_rx_states[rx]->state!=gpio_get(uart_soft_rx_states[rx]->port, uart_soft_rx_states[rx]->pin)) { // only do something if state changed
|
||||
uart_soft_rx_states[rx]->state = gpio_get(uart_soft_rx_states[rx]->port, uart_soft_rx_states[rx]->pin); // save new state
|
||||
if (0 == uart_soft_rx_states[rx]->bit) { // start bit edge detected
|
||||
if (0 == uart_soft_rx_states[rx]->state) { // start bit has to be low
|
||||
timer_set_oc_value(TIM(UART_SOFT_RX_TIMER), timer_oc[rx], timer_get_counter(TIM(UART_SOFT_RX_TIMER)) + (rcc_ahb_frequency / uart_soft_rx_states[rx]->baudrate) * 1.5); // set timer to sample data bit 0 in 1.5 bits
|
||||
const uint16_t state_new = gpio_get(uart_soft_rx_states[rx].port, uart_soft_rx_states[rx].pin); // get new state
|
||||
if (uart_soft_rx_states[rx].state != state_new) { // only do something if state changed
|
||||
uart_soft_rx_states[rx].state = state_new; // save new state
|
||||
if (0 == uart_soft_rx_states[rx].bit) { // start bit edge detected
|
||||
if (0 == uart_soft_rx_states[rx].state) { // start bit has to be low
|
||||
timer_set_oc_value(TIM(UART_SOFT_RX_TIMER), timer_oc[rx], timer_get_counter(TIM(UART_SOFT_RX_TIMER)) + (uart_soft_rx_states[rx].baudrate) * 3 / 2); // set timer to sample data bit 0 in 1.5 bits
|
||||
timer_clear_flag(TIM(UART_SOFT_RX_TIMER), timer_flags[rx]); // clear flag before enabling interrupt
|
||||
timer_enable_irq(TIM(UART_SOFT_RX_TIMER), timer_interrupt[rx]);// enable timer IRQ for RX for this UART
|
||||
uart_soft_rx_states[rx]->byte = 0; // reset byte value
|
||||
uart_soft_rx_states[rx]->bit++; // wait for first bit
|
||||
uart_soft_rx_states[rx].byte = 0; // reset byte value
|
||||
uart_soft_rx_states[rx].bit = 1; // wait for first bit
|
||||
}
|
||||
} else { // data bit detected
|
||||
timer_set_oc_value(TIM(UART_SOFT_RX_TIMER), timer_oc[rx], timer_get_counter(TIM(UART_SOFT_RX_TIMER)) + (rcc_ahb_frequency / uart_soft_rx_states[rx]->baudrate) / 2); // resync timer to half a bit (good for drifting transmission, bad if the line is noisy)
|
||||
timer_set_oc_value(TIM(UART_SOFT_RX_TIMER), timer_oc[rx], timer_get_counter(TIM(UART_SOFT_RX_TIMER)) + (uart_soft_rx_states[rx].baudrate) / 2); // resync timer to half a bit (good for drifting transmission, bad if the line is noisy)
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/** GPIO interrupt service routine to detect UART receive activity */
|
||||
#if (defined(UART_SOFT_RX_PORT0) && defined(UART_SOFT_RX_PIN0) && UART_SOFT_RX_PIN0==0) || (defined(UART_SOFT_RX_PORT1) && defined(UART_SOFT_RX_PIN1) && UART_SOFT_RX_PIN1==0) || (defined(UART_SOFT_RX_PORT2) && defined(UART_SOFT_RX_PIN2) && UART_SOFT_RX_PIN2==0) || (defined(UART_SOFT_RX_PORT3) && defined(UART_SOFT_RX_PIN3) && UART_SOFT_RX_PIN3==0)
|
||||
#if (defined(UART_SOFT_RX0_GPIO) && NVIC_EXTI0_IRQ == GPIO_NVIC_EXTI_IRQ(UART_SOFT_RX0_GPIO)) || (defined(UART_SOFT_RX1_GPIO) && NVIC_EXTI0_IRQ == GPIO_NVIC_EXTI_IRQ(UART_SOFT_RX1_GPIO)) || (defined(UART_SOFT_RX2_GPIO) && NVIC_EXTI0_IRQ == GPIO_NVIC_EXTI_IRQ(UART_SOFT_RX2_GPIO)) || (defined(UART_SOFT_RX3_GPIO) && NVIC_EXTI0_IRQ == GPIO_NVIC_EXTI_IRQ(UART_SOFT_RX3_GPIO))
|
||||
void exti0_isr(void)
|
||||
{
|
||||
exti_reset_request(EXTI0); // clear interrupt flag for pin triggers this ISR (pin state will be checked independently)
|
||||
uart_soft_receive_activity(); // check which GPIO changed
|
||||
}
|
||||
#endif
|
||||
#if (defined(UART_SOFT_RX_PORT0) && defined(UART_SOFT_RX_PIN0) && UART_SOFT_RX_PIN0==1) || (defined(UART_SOFT_RX_PORT1) && defined(UART_SOFT_RX_PIN1) && UART_SOFT_RX_PIN1==1) || (defined(UART_SOFT_RX_PORT2) && defined(UART_SOFT_RX_PIN2) && UART_SOFT_RX_PIN2==1) || (defined(UART_SOFT_RX_PORT3) && defined(UART_SOFT_RX_PIN3) && UART_SOFT_RX_PIN3==1)
|
||||
#if (defined(UART_SOFT_RX0_GPIO) && NVIC_EXTI1_IRQ == GPIO_NVIC_EXTI_IRQ(UART_SOFT_RX0_GPIO)) || (defined(UART_SOFT_RX1_GPIO) && NVIC_EXTI1_IRQ == GPIO_NVIC_EXTI_IRQ(UART_SOFT_RX1_GPIO)) || (defined(UART_SOFT_RX2_GPIO) && NVIC_EXTI1_IRQ == GPIO_NVIC_EXTI_IRQ(UART_SOFT_RX2_GPIO)) || (defined(UART_SOFT_RX3_GPIO) && NVIC_EXTI1_IRQ == GPIO_NVIC_EXTI_IRQ(UART_SOFT_RX3_GPIO))
|
||||
void exti1_isr(void)
|
||||
{
|
||||
exti_reset_request(EXTI1); // clear interrupt flag for pin triggers this ISR (pin state will be checked independently)
|
||||
uart_soft_receive_activity(); // check which GPIO changed
|
||||
}
|
||||
#endif
|
||||
#if (defined(UART_SOFT_RX_PORT0) && defined(UART_SOFT_RX_PIN0) && UART_SOFT_RX_PIN0==2) || (defined(UART_SOFT_RX_PORT1) && defined(UART_SOFT_RX_PIN1) && UART_SOFT_RX_PIN1==2) || (defined(UART_SOFT_RX_PORT2) && defined(UART_SOFT_RX_PIN2) && UART_SOFT_RX_PIN2==2) || (defined(UART_SOFT_RX_PORT3) && defined(UART_SOFT_RX_PIN3) && UART_SOFT_RX_PIN3==2)
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||||
#if (defined(UART_SOFT_RX0_GPIO) && NVIC_EXTI2_IRQ == GPIO_NVIC_EXTI_IRQ(UART_SOFT_RX0_GPIO)) || (defined(UART_SOFT_RX1_GPIO) && NVIC_EXTI2_IRQ == GPIO_NVIC_EXTI_IRQ(UART_SOFT_RX1_GPIO)) || (defined(UART_SOFT_RX2_GPIO) && NVIC_EXTI2_IRQ == GPIO_NVIC_EXTI_IRQ(UART_SOFT_RX2_GPIO)) || (defined(UART_SOFT_RX3_GPIO) && NVIC_EXTI2_IRQ == GPIO_NVIC_EXTI_IRQ(UART_SOFT_RX3_GPIO))
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||||
void exti2_isr(void)
|
||||
{
|
||||
exti_reset_request(EXTI2); // clear interrupt flag for pin triggers this ISR (pin state will be checked independently)
|
||||
uart_soft_receive_activity(); // check which GPIO changed
|
||||
}
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#endif
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||||
#if (defined(UART_SOFT_RX_PORT0) && defined(UART_SOFT_RX_PIN0) && UART_SOFT_RX_PIN0==3) || (defined(UART_SOFT_RX_PORT1) && defined(UART_SOFT_RX_PIN1) && UART_SOFT_RX_PIN1==3) || (defined(UART_SOFT_RX_PORT2) && defined(UART_SOFT_RX_PIN2) && UART_SOFT_RX_PIN2==3) || (defined(UART_SOFT_RX_PORT3) && defined(UART_SOFT_RX_PIN3) && UART_SOFT_RX_PIN3==3)
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||||
#if (defined(UART_SOFT_RX0_GPIO) && NVIC_EXTI3_IRQ == GPIO_NVIC_EXTI_IRQ(UART_SOFT_RX0_GPIO)) || (defined(UART_SOFT_RX1_GPIO) && NVIC_EXTI3_IRQ == GPIO_NVIC_EXTI_IRQ(UART_SOFT_RX1_GPIO)) || (defined(UART_SOFT_RX2_GPIO) && NVIC_EXTI3_IRQ == GPIO_NVIC_EXTI_IRQ(UART_SOFT_RX2_GPIO)) || (defined(UART_SOFT_RX3_GPIO) && NVIC_EXTI3_IRQ == GPIO_NVIC_EXTI_IRQ(UART_SOFT_RX3_GPIO))
|
||||
void exti3_isr(void)
|
||||
{
|
||||
exti_reset_request(EXTI3); // clear interrupt flag for pin triggers this ISR (pin state will be checked independently)
|
||||
uart_soft_receive_activity(); // check which GPIO changed
|
||||
}
|
||||
#endif
|
||||
#if (defined(UART_SOFT_RX_PORT0) && defined(UART_SOFT_RX_PIN0) && UART_SOFT_RX_PIN0==4) || (defined(UART_SOFT_RX_PORT1) && defined(UART_SOFT_RX_PIN1) && UART_SOFT_RX_PIN1==4) || (defined(UART_SOFT_RX_PORT2) && defined(UART_SOFT_RX_PIN2) && UART_SOFT_RX_PIN2==4) || (defined(UART_SOFT_RX_PORT3) && defined(UART_SOFT_RX_PIN3) && UART_SOFT_RX_PIN3==4)
|
||||
#if (defined(UART_SOFT_RX0_GPIO) && NVIC_EXTI4_IRQ == GPIO_NVIC_EXTI_IRQ(UART_SOFT_RX0_GPIO)) || (defined(UART_SOFT_RX1_GPIO) && NVIC_EXTI4_IRQ == GPIO_NVIC_EXTI_IRQ(UART_SOFT_RX1_GPIO)) || (defined(UART_SOFT_RX2_GPIO) && NVIC_EXTI4_IRQ == GPIO_NVIC_EXTI_IRQ(UART_SOFT_RX2_GPIO)) || (defined(UART_SOFT_RX3_GPIO) && NVIC_EXTI4_IRQ == GPIO_NVIC_EXTI_IRQ(UART_SOFT_RX3_GPIO))
|
||||
void exti4_isr(void)
|
||||
{
|
||||
exti_reset_request(EXTI4); // clear interrupt flag for pin triggers this ISR (pin state will be checked independently)
|
||||
uart_soft_receive_activity(); // check which GPIO changed
|
||||
}
|
||||
#endif
|
||||
#if (defined(UART_SOFT_RX_PORT0) && defined(UART_SOFT_RX_PIN0) && (UART_SOFT_RX_PIN0==5 || UART_SOFT_RX_PIN0==6 || UART_SOFT_RX_PIN0==7 || UART_SOFT_RX_PIN0==8 || UART_SOFT_RX_PIN0==9)) || (defined(UART_SOFT_RX_PORT1) && defined(UART_SOFT_RX_PIN1) && (UART_SOFT_RX_PIN1==5 || UART_SOFT_RX_PIN1==6 || UART_SOFT_RX_PIN1==7 || UART_SOFT_RX_PIN1==8 || UART_SOFT_RX_PIN1==9)) || (defined(UART_SOFT_RX_PORT2) && defined(UART_SOFT_RX_PIN2) && (UART_SOFT_RX_PIN2==5 || UART_SOFT_RX_PIN2==6 || UART_SOFT_RX_PIN2==7 || UART_SOFT_RX_PIN2==8 || UART_SOFT_RX_PIN2==9)) || (defined(UART_SOFT_RX_PORT3) && defined(UART_SOFT_RX_PIN3) && (UART_SOFT_RX_PIN3==5 || UART_SOFT_RX_PIN3==6 || UART_SOFT_RX_PIN3==7 || UART_SOFT_RX_PIN3==8 || UART_SOFT_RX_PIN3==9))
|
||||
#if (defined(UART_SOFT_RX0_GPIO) && NVIC_EXTI9_5_IRQ == GPIO_NVIC_EXTI_IRQ(UART_SOFT_RX0_GPIO)) || (defined(UART_SOFT_RX1_GPIO) && NVIC_EXTI9_5_IRQ == GPIO_NVIC_EXTI_IRQ(UART_SOFT_RX1_GPIO)) || (defined(UART_SOFT_RX2_GPIO) && NVIC_EXTI9_5_IRQ == GPIO_NVIC_EXTI_IRQ(UART_SOFT_RX2_GPIO)) || (defined(UART_SOFT_RX3_GPIO) && NVIC_EXTI9_5_IRQ == GPIO_NVIC_EXTI_IRQ(UART_SOFT_RX3_GPIO))
|
||||
void exti9_5_isr(void)
|
||||
{
|
||||
exti_reset_request(EXTI5 | EXTI6 | EXTI7 | EXTI8 | EXTI9); // clear interrupt flag for pin triggers this ISR (pin state will be checked independently)
|
||||
uart_soft_receive_activity(); // check which GPIO changed
|
||||
}
|
||||
#endif
|
||||
#if (defined(UART_SOFT_RX_PORT0) && defined(UART_SOFT_RX_PIN0) && (UART_SOFT_RX_PIN0==10 || UART_SOFT_RX_PIN0==11 || UART_SOFT_RX_PIN0==12 || UART_SOFT_RX_PIN0==13 || UART_SOFT_RX_PIN0==14 || UART_SOFT_RX_PIN0==15)) || (defined(UART_SOFT_RX_PORT1) && defined(UART_SOFT_RX_PIN1) && (UART_SOFT_RX_PIN1==10 || UART_SOFT_RX_PIN1==11 || UART_SOFT_RX_PIN1==12 || UART_SOFT_RX_PIN1==13 || UART_SOFT_RX_PIN1==14 || UART_SOFT_RX_PIN1==15)) || (defined(UART_SOFT_RX_PORT2) && defined(UART_SOFT_RX_PIN2) && (UART_SOFT_RX_PIN2==10 || UART_SOFT_RX_PIN2==11 || UART_SOFT_RX_PIN2==12 || UART_SOFT_RX_PIN2==13 || UART_SOFT_RX_PIN2==14 || UART_SOFT_RX_PIN2==15)) || (defined(UART_SOFT_RX_PORT3) && defined(UART_SOFT_RX_PIN3) && (UART_SOFT_RX_PIN3==10 || UART_SOFT_RX_PIN3==11 || UART_SOFT_RX_PIN3==12 || UART_SOFT_RX_PIN3==13 || UART_SOFT_RX_PIN3==14 || UART_SOFT_RX_PIN3==15))
|
||||
#if (defined(UART_SOFT_RX0_GPIO) && NVIC_EXTI15_10_IRQ == GPIO_NVIC_EXTI_IRQ(UART_SOFT_RX0_GPIO)) || (defined(UART_SOFT_RX1_GPIO) && NVIC_EXTI15_10_IRQ == GPIO_NVIC_EXTI_IRQ(UART_SOFT_RX1_GPIO)) || (defined(UART_SOFT_RX2_GPIO) && NVIC_EXTI15_10_IRQ == GPIO_NVIC_EXTI_IRQ(UART_SOFT_RX2_GPIO)) || (defined(UART_SOFT_RX3_GPIO) && NVIC_EXTI15_10_IRQ == GPIO_NVIC_EXTI_IRQ(UART_SOFT_RX3_GPIO))
|
||||
void exti15_10_isr(void)
|
||||
{
|
||||
exti_reset_request(EXTI10 | EXTI11 | EXTI12 | EXTI13 | EXTI14 | EXTI15); // clear interrupt flag for pin triggers this ISR (pin state will be checked independently)
|
||||
|
|
|
@ -14,7 +14,7 @@ extern volatile bool uart_soft_received[4];
|
|||
* @param[in] tx_baudrates baud rates of the 4 UART TX ports (0 if unused)
|
||||
* @return is setup succeeded, else the configuration is wrong
|
||||
*/
|
||||
bool uart_soft_setup(uint32_t *rx_baudrates, uint32_t *tx_baudrates);
|
||||
bool uart_soft_setup(const uint32_t* rx_baudrates, const uint32_t* tx_baudrates);
|
||||
/** get received byte from UART port
|
||||
* @param[in] uart UART receive port to read byte from
|
||||
* @return received byte (0 if no byte is available)
|
||||
|
|
Loading…
Reference in New Issue