From 77415cb41fe0234e8b3925e109fd17e56831c9c1 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?King=20K=C3=A9vin?= Date: Fri, 11 Dec 2020 20:53:21 +0100 Subject: [PATCH] onewire_master: minor, fix spacing --- lib/onewire_master.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/lib/onewire_master.c b/lib/onewire_master.c index b00d5e1..7d12336 100644 --- a/lib/onewire_master.c +++ b/lib/onewire_master.c @@ -77,7 +77,7 @@ void TIM_ISR(ONEWIRE_MASTER_TIMER)(void) case ONEWIRE_STATE_MASTER_RESET: // reset pulse has been started timer_clear_flag(TIM(ONEWIRE_MASTER_TIMER), TIM_SR_CC4IF); // clear output compare flag timer_enable_irq(TIM(ONEWIRE_MASTER_TIMER), TIM_DIER_CC4IE); // enable compare interrupt for presence detection - gpio_set(GPIO_PORT(ONEWIRE_MASTER_PIN),GPIO_PIN(ONEWIRE_MASTER_PIN)); // set signal high again for slaves to respond + gpio_set(GPIO_PORT(ONEWIRE_MASTER_PIN), GPIO_PIN(ONEWIRE_MASTER_PIN)); // set signal high again for slaves to respond onewire_master_state = ONEWIRE_STATE_SLAVE_PRESENCE; // set new state break; case ONEWIRE_STATE_SLAVE_PRESENCE: // waiting for slave presence but none received @@ -88,7 +88,7 @@ void TIM_ISR(ONEWIRE_MASTER_TIMER)(void) case ONEWIRE_STATE_MASTER_READ: // end of time slot and recovery time for reading bit case ONEWIRE_STATE_MASTER_WRITE: // end of time slot and recovery time for writing bit if (buffer_bit < buffer_size) { // check if byte to read/write are remaining - gpio_clear(GPIO_PORT(ONEWIRE_MASTER_PIN),GPIO_PIN(ONEWIRE_MASTER_PIN)); // pull signal low to start next slot + gpio_clear(GPIO_PORT(ONEWIRE_MASTER_PIN), GPIO_PIN(ONEWIRE_MASTER_PIN)); // pull signal low to start next slot } else { // all bytes read/written timer_disable_counter(TIM(ONEWIRE_MASTER_TIMER)); // disable timer timer_disable_irq(TIM(ONEWIRE_MASTER_TIMER), TIM_DIER_CC1IE); // disable compare interrupt for master pull low @@ -103,14 +103,14 @@ void TIM_ISR(ONEWIRE_MASTER_TIMER)(void) timer_disable_irq(TIM(ONEWIRE_MASTER_TIMER), TIM_DIER_CC2IE); // disable all compare interrupt timer_disable_irq(TIM(ONEWIRE_MASTER_TIMER), TIM_DIER_CC3IE); // disable all compare interrupt timer_disable_irq(TIM(ONEWIRE_MASTER_TIMER), TIM_DIER_CC4IE); // disable all compare interrupt - gpio_set(GPIO_PORT(ONEWIRE_MASTER_PIN),GPIO_PIN(ONEWIRE_MASTER_PIN)); // pull signal high (idle state) + gpio_set(GPIO_PORT(ONEWIRE_MASTER_PIN), GPIO_PIN(ONEWIRE_MASTER_PIN)); // pull signal high (idle state) onewire_master_state = ONEWIRE_STATE_ERROR; // indicate error } } else if (timer_get_flag(TIM(ONEWIRE_MASTER_TIMER), TIM_SR_CC1IF)) { // compare event happened for master pull low end for read timer_clear_flag(TIM(ONEWIRE_MASTER_TIMER), TIM_SR_CC1IF); // clear flag switch (onewire_master_state) { case ONEWIRE_STATE_MASTER_READ: // master has to read a bit - gpio_set(GPIO_PORT(ONEWIRE_MASTER_PIN),GPIO_PIN(ONEWIRE_MASTER_PIN)); // pull signal high to end time slot + gpio_set(GPIO_PORT(ONEWIRE_MASTER_PIN), GPIO_PIN(ONEWIRE_MASTER_PIN)); // pull signal high to end time slot break; default: // unknown state for this stage break; // let the overflow handle the error if any @@ -121,7 +121,7 @@ void TIM_ISR(ONEWIRE_MASTER_TIMER)(void) case ONEWIRE_STATE_MASTER_WRITE: // master has to write a bit if (buffer_bit < buffer_size) { // check if byte to send are remaining if (buffer[buffer_bit / 8] & (1 << (buffer_bit % 8))) { // check bit (LSb first) - gpio_set(GPIO_PORT(ONEWIRE_MASTER_PIN),GPIO_PIN(ONEWIRE_MASTER_PIN)); // set signal high again to write "1" + gpio_set(GPIO_PORT(ONEWIRE_MASTER_PIN), GPIO_PIN(ONEWIRE_MASTER_PIN)); // set signal high again to write "1" } buffer_bit++; // got to next bit } else { @@ -131,7 +131,7 @@ void TIM_ISR(ONEWIRE_MASTER_TIMER)(void) break; case ONEWIRE_STATE_MASTER_READ: // master has to read a bit set by slave if (buffer_bit