From 5f4b03f6e1d4c51654cd22bb6ba6d6ba438932d5 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?King=20K=C3=A9vin?= Date: Fri, 4 Aug 2017 07:43:05 +0200 Subject: [PATCH] onewire_slave: remove debug code --- lib/onewire_slave.c | 27 +++++---------------------- 1 file changed, 5 insertions(+), 22 deletions(-) diff --git a/lib/onewire_slave.c b/lib/onewire_slave.c index 039423b..f712a0b 100644 --- a/lib/onewire_slave.c +++ b/lib/onewire_slave.c @@ -134,8 +134,7 @@ void onewire_slave_setup(uint8_t family, uint64_t serial) timer_set_oc_mode(TIM(ONEWIRE_SLAVE_TIMER), TIM_OC2, TIM_OCM_FROZEN); timer_set_oc_value(TIM(ONEWIRE_SLAVE_TIMER), TIM_OC2, 45*(rcc_ahb_frequency/1000000)-1-350); // time to sample the bit after being set (1 < Tlow1 < 15, 60 < Tslot < 120), or stop sending the bit use compare function to detect slave presence (15 = Trdv + 0 < Trelease < 45), plus hand tuning timer_set_oc_value(TIM(ONEWIRE_SLAVE_TIMER), TIM_OC3, 90*(rcc_ahb_frequency/1000000)-1); // time to stop the presence pulse (60 < Tpdl < 120) - timer_set_oc_value(TIM(ONEWIRE_SLAVE_TIMER), TIM_OC4, 121*(rcc_ahb_frequency/1000000)-1); // time end of slot (60 < Tslot < 120) - timer_clear_flag(TIM(ONEWIRE_SLAVE_TIMER), TIM_SR_UIF | TIM_SR_CC1IF | TIM_SR_CC2IF | TIM_SR_CC3IF | TIM_SR_CC4IF); // clear all interrupt flags + timer_clear_flag(TIM(ONEWIRE_SLAVE_TIMER), TIM_SR_UIF | TIM_SR_CC1IF | TIM_SR_CC2IF | TIM_SR_CC3IF); // clear all interrupt flags timer_update_on_overflow(TIM(ONEWIRE_SLAVE_TIMER)); // only use counter overflow as UEV source (use overflow as start time or timeout) timer_enable_irq(TIM(ONEWIRE_SLAVE_TIMER), TIM_DIER_UIE); // enable update interrupt for overflow nvic_enable_irq(NVIC_TIM_IRQ(ONEWIRE_SLAVE_TIMER)); // catch interrupt in service routine @@ -144,14 +143,6 @@ void onewire_slave_setup(uint8_t family, uint64_t serial) onewire_slave_state = ONEWIRE_STATE_IDLE; // reset state onewire_slave_transfer_complete = false; // reset state -#define TIMDBG_PORT B -#define TIMDBG_PIN1 12 -#define TIMDBG_PIN2 13 -#define TIMDBG_PIN3 14 -#define TIMDBG_PIN4 15 -rcc_periph_clock_enable(RCC_GPIO(TIMDBG_PORT)); -gpio_set_mode(GPIO(TIMDBG_PORT), GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_PUSHPULL, GPIO(TIMDBG_PIN1) | GPIO(TIMDBG_PIN2) | GPIO(TIMDBG_PIN3) | GPIO(TIMDBG_PIN4)); - // setup GPIO with external interrupt rcc_periph_clock_enable(RCC_GPIO(ONEWIRE_SLAVE_PORT)); // enable clock for GPIO peripheral gpio_set(GPIO(ONEWIRE_SLAVE_PORT), GPIO(ONEWIRE_SLAVE_PIN)); // idle is high (using pull-up resistor) @@ -218,7 +209,7 @@ void EXTI_ISR(ONEWIRE_SLAVE_PIN)(void) } else { // it's a falling edge, the beginning of a new signal timer_disable_counter(TIM(ONEWIRE_SLAVE_TIMER)); // stop timer for reconfiguration timer_set_counter(TIM(ONEWIRE_SLAVE_TIMER), 0); // reset timer counter - timer_disable_irq(TIM(ONEWIRE_SLAVE_TIMER), TIM_DIER_CC1IE | TIM_DIER_CC2IE | TIM_DIER_CC3IE | TIM_DIER_CC4IE); // disable all timers + timer_disable_irq(TIM(ONEWIRE_SLAVE_TIMER), TIM_DIER_CC1IE | TIM_DIER_CC2IE | TIM_DIER_CC3IE); // disable all timers switch (onewire_slave_state) { case ONEWIRE_STATE_PULSE_PRESENCE: // we started sending the presence pulse timer_enable_irq(TIM(ONEWIRE_SLAVE_TIMER), TIM_DIER_CC3IE); // enable timer for end of pulse @@ -244,7 +235,7 @@ void EXTI_ISR(ONEWIRE_SLAVE_PIN)(void) onewire_slave_state = ONEWIRE_STATE_IDLE; // unexpected signal, reset to idle state break; // the timer overflow will confirm detect reset pulses } - timer_clear_flag(TIM(ONEWIRE_SLAVE_TIMER), TIM_SR_UIF | TIM_SR_CC1IF | TIM_SR_CC2IF | TIM_SR_CC3IF | TIM_SR_CC4IF); // clear all flags + timer_clear_flag(TIM(ONEWIRE_SLAVE_TIMER), TIM_SR_UIF | TIM_SR_CC1IF | TIM_SR_CC2IF | TIM_SR_CC3IF); // clear all flags timer_enable_counter(TIM(ONEWIRE_SLAVE_TIMER)); // start timer to measure the configured timeouts } } @@ -253,16 +244,14 @@ void EXTI_ISR(ONEWIRE_SLAVE_PIN)(void) void TIM_ISR(ONEWIRE_SLAVE_TIMER)(void) { if (timer_interrupt_source(TIM(ONEWIRE_SLAVE_TIMER), TIM_SR_UIF)) { // reset timer triggered, verify if it's a reset -gpio_toggle(GPIO(TIMDBG_PORT), GPIO(TIMDBG_PIN1) | GPIO(TIMDBG_PIN2) | GPIO(TIMDBG_PIN3) | GPIO(TIMDBG_PIN4)); if (0==gpio_get(GPIO(ONEWIRE_SLAVE_PORT), GPIO(ONEWIRE_SLAVE_PIN))) { // signal it still low, thus it must be a reset onewire_slave_state = ONEWIRE_STATE_RESET; // update state } timer_disable_counter(TIM(ONEWIRE_SLAVE_TIMER)); // stop timer since there is nothing more to measure - timer_disable_irq(TIM(ONEWIRE_SLAVE_TIMER), TIM_DIER_CC1IE | TIM_DIER_CC2IE | TIM_DIER_CC3IE | TIM_DIER_CC4IE); // disable all timers - timer_clear_flag(TIM(ONEWIRE_SLAVE_TIMER), TIM_SR_UIF | TIM_SR_CC1IF | TIM_SR_CC2IF | TIM_SR_CC3IF | TIM_SR_CC4IF); // clear all flag (I have no idea why the others are get too, even when the interrupt is not enabled) + timer_disable_irq(TIM(ONEWIRE_SLAVE_TIMER), TIM_DIER_CC1IE | TIM_DIER_CC2IE | TIM_DIER_CC3IE); // disable all timers + timer_clear_flag(TIM(ONEWIRE_SLAVE_TIMER), TIM_SR_UIF | TIM_SR_CC1IF | TIM_SR_CC2IF | TIM_SR_CC3IF); // clear all flag (I have no idea why the others are get too, even when the interrupt is not enabled) } if (timer_interrupt_source(TIM(ONEWIRE_SLAVE_TIMER), TIM_SR_CC1IF)) { // wait for presence pulse timer triggered -gpio_toggle(GPIO(TIMDBG_PORT), GPIO(TIMDBG_PIN1)); timer_clear_flag(TIM(ONEWIRE_SLAVE_TIMER), TIM_SR_CC1IF); // clear flag if (ONEWIRE_STATE_WAIT_PRESENCE==onewire_slave_state) { // we can now send the pulse onewire_slave_state = ONEWIRE_STATE_PULSE_PRESENCE; // save new state @@ -271,7 +260,6 @@ gpio_toggle(GPIO(TIMDBG_PORT), GPIO(TIMDBG_PIN1)); } if (timer_interrupt_source(TIM(ONEWIRE_SLAVE_TIMER), TIM_SR_CC2IF)) { // time to read the bit, or stop writing it // read/write bit depending on bit -gpio_toggle(GPIO(TIMDBG_PORT), GPIO(TIMDBG_PIN2)); switch (onewire_slave_state) { case ONEWIRE_STATE_ROM_COMMAND: // read ROM command code bit case ONEWIRE_STATE_ROM_MATCH: // read ROM code @@ -404,15 +392,10 @@ gpio_toggle(GPIO(TIMDBG_PORT), GPIO(TIMDBG_PIN2)); timer_clear_flag(TIM(ONEWIRE_SLAVE_TIMER), TIM_SR_CC2IF); // clear flag } if (timer_interrupt_source(TIM(ONEWIRE_SLAVE_TIMER), TIM_SR_CC3IF)) { // end of presence pulse timer triggered -gpio_toggle(GPIO(TIMDBG_PORT), GPIO(TIMDBG_PIN3)); timer_clear_flag(TIM(ONEWIRE_SLAVE_TIMER), TIM_SR_CC3IF); // clear flag if (ONEWIRE_STATE_PULSE_PRESENCE==onewire_slave_state) { gpio_set(GPIO(ONEWIRE_SLAVE_PORT), GPIO(ONEWIRE_SLAVE_PIN)); // stop sending presence pulse // if the pin stays low the reset timer will catch it } } - if (timer_get_flag(TIM(ONEWIRE_SLAVE_TIMER), TIM_SR_CC4IF)) { // end of slot timer triggered (not used) -gpio_toggle(GPIO(TIMDBG_PORT), GPIO(TIMDBG_PIN4)); - timer_clear_flag(TIM(ONEWIRE_SLAVE_TIMER), TIM_SR_CC4IF); // clear flag - } }