diff --git a/lib/flash_internal.c b/lib/flash_internal.c
index 74fd838..f1cc685 100644
--- a/lib/flash_internal.c
+++ b/lib/flash_internal.c
@@ -83,16 +83,28 @@ static bool flash_internal_range(uint32_t address, size_t size)
 uint16_t flash_internal_page_size(void)
 {
 	if (0 == flash_internal_page) { // we don't know the page size yet
-		if ((0x410 == (DBGMCU_IDCODE & DBGMCU_IDCODE_DEV_ID_MASK)) || (0x412 == (DBGMCU_IDCODE & DBGMCU_IDCODE_DEV_ID_MASK))) { // low-density (16-32 KB flash) and medium-density (64-128 KB flash) devices have 1 KB flash pages
+		switch (DBGMCU_IDCODE & DBGMCU_IDCODE_DEV_ID_MASK) { // get page size based on family code
+		case 0x412: // low-density, 16-32 kB flash
+		case 0x410: // medium-density, 64-128 kB flash
 			flash_internal_page = 1024;
-		} else if ((0x414 == (DBGMCU_IDCODE & DBGMCU_IDCODE_DEV_ID_MASK)) || (0x430 == (DBGMCU_IDCODE & DBGMCU_IDCODE_DEV_ID_MASK)) || (0x418 == (DBGMCU_IDCODE & DBGMCU_IDCODE_DEV_ID_MASK))) { // high-density (256-512 KB flash), XL-density (768-1024 KB flash) devices and connectivity line have 2 KB flash pages
+			break;
+		case 0x414: // high-density, 256-512 kB flash
+		case 0x430: // XL-density, 768-1024 kB flash
+		case 0x418: // connectivity, 64-256 kB flash
 			flash_internal_page = 2048;
-		} else { // unknown device type (or unreadable type, see errata), deduce page size from flash size
+			break;
+		case 0: // DBGMCU_IDCODE is only accessible in debug mode (this is a known issue documented in STM32F10xxC/D/E Errata sheet, without workaround)
+		default: // unknown
 			if (DESIG_FLASH_SIZE < 256) {
-				flash_internal_page = 1024;
+				if ((*(uint32_t*)0x1FFFF000 & 0xFFFE0000) == 0x20000000) { // non-connectivity system memory start detected (MSP address pointing to SRAM
+					flash_internal_page = 1024;
+				} else { // connectivity system memory start is at 0x1FFFB000
+					flash_internal_page = 2048;
+				}
 			} else {
 				flash_internal_page = 2048;
 			}
+			break;
 		}
 	}