diff --git a/arduino_nano/Makefile b/arduino_nano/Makefile
index e1b7539..86979e5 100644
--- a/arduino_nano/Makefile
+++ b/arduino_nano/Makefile
@@ -23,7 +23,7 @@ OBJCOPY = avr-objcopy
SIZE = avr-size
# library directories, compiler, and linker flags
-LIBS = lib
+LIBS = lib aes
CFLAGS = -g -Wall -Werror -Os -mcall-prologues -std=c99
CFLAGS += -I. $(patsubst %,-I%,$(LIBS))
CFLAGS += -mmcu=$(DEVICE) -DF_CPU=$(F_CPU)
@@ -34,9 +34,9 @@ LDFLAGS = -Wl,-Map=$(TARGET).map,--cref
LDFLAGS += -I. $(patsubst %,-I%,$(LIBS))
LDFLAGS += -mmcu=$(DEVICE)
# floating point printf version (requires -lm below)
-#LDFLAGS += -Wl,-u,vfprintf -lprintf_flt
+LDFLAGS += -Wl,-u,vfprintf -lprintf_flt
# math library
-#LDFLAGS += -lm
+LDFLAGS += -lm
# source files to compile
CSRC = $(wildcard *.c) $(foreach LIB,$(LIBS),$(wildcard $(LIB)/*.c))
diff --git a/arduino_nano/aes/aes128_enc.h b/arduino_nano/aes/aes128_enc.h
new file mode 100644
index 0000000..15be3e3
--- /dev/null
+++ b/arduino_nano/aes/aes128_enc.h
@@ -0,0 +1,44 @@
+/* aes128_enc.h */
+/*
+ This file is part of the AVR-Crypto-Lib.
+ Copyright (C) 2006-2015 Daniel Otte (bg@nerilex.org)
+
+ This program is free software: you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation, either version 3 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see .
+ */
+/**
+ * \file aes128_enc.h
+ * \email bg@nerilex.org
+ * \author Daniel Otte
+ * \date 2008-12-30
+ * \license GPLv3 or later
+ * \ingroup AES
+ */
+
+#ifndef AES128_ENC_H_
+#define AES128_ENC_H_
+
+#include "aes_types.h"
+#include "aes_enc.h"
+
+/**
+ * \brief encrypt with 128 bit key.
+ *
+ * This function encrypts one block with the AES algorithm under control of
+ * a keyschedule produced from a 128 bit key.
+ * \param buffer pointer to the block to encrypt
+ * \param ctx pointer to the key schedule
+ */
+void aes128_enc(void *buffer, aes128_ctx_t *ctx);
+
+#endif /* AES128_ENC_H_ */
diff --git a/arduino_nano/aes/aes_enc-asm.S b/arduino_nano/aes/aes_enc-asm.S
new file mode 100644
index 0000000..0923571
--- /dev/null
+++ b/arduino_nano/aes/aes_enc-asm.S
@@ -0,0 +1,233 @@
+/* aes_enc-asm.S */
+/*
+ This file is part of the AVR-Crypto-Lib.
+ Copyright (C) 2006-2015 Daniel Otte (bg@nerilex.org)
+
+ This program is free software: you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation, either version 3 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see .
+*/
+/**
+ * \file aes_enc-asm.S
+ * \email bg@nerilex.org
+ * \author Daniel Otte
+ * \date 2009-01-10
+ * \license GPLv3 or later
+ *
+ */
+
+#include "avr-asm-macros.S"
+
+
+/*
+ * param a: r24
+ * param b: r22
+ * param reducer: r0
+ */
+A = 28
+B = 29
+P = 0
+xREDUCER = 25
+
+.global aes256_enc
+aes256_enc:
+ ldi r20, 14
+ rjmp aes_encrypt_core
+
+.global aes192_enc
+aes192_enc:
+ ldi r20, 12
+ rjmp aes_encrypt_core
+
+.global aes128_enc
+aes128_enc:
+ ldi r20, 10
+
+
+/*
+ void aes_encrypt_core(aes_cipher_state_t *state, const aes_genctx_t *ks, uint8_t rounds)
+*/
+T0= 2
+T1= 3
+T2= 4
+T3= 5
+SBOX_SAVE0 = 6
+SBOX_SAVE1 = 7
+ST00 = 8
+ST01 = 9
+ST02 = 10
+ST03 = 11
+ST10 = 12
+ST11 = 13
+ST12 = 14
+ST13 = 15
+ST20 = 16
+ST21 = 17
+ST22 = 18
+ST23 = 19
+ST30 = 20
+ST31 = 21
+ST32 = 22
+ST33 = 23
+CTR = 24
+/*
+ * param state: r24:r25
+ * param ks: r22:r23
+ * param rounds: r20
+ */
+.global aes_encrypt_core
+aes_encrypt_core:
+ push_range 2, 17
+ push r28
+ push r29
+ push r24
+ push r25
+ movw r26, r22
+ movw r30, r24
+ mov CTR, r20
+ clt
+
+ .irp row, 0, 1, 2, 3
+ .irp col, 0, 1, 2, 3
+ ld ST\row\col, Z+
+ .endr
+ .endr
+
+ ldi xREDUCER, 0x1b /* load reducer */
+ ldi r31, hi8(aes_sbox)
+
+ /* key whitening */
+1:
+
+ .irp row, 0, 1, 2, 3
+ .irp col, 0, 1, 2, 3
+ ld r0, X+
+ eor ST\row\col, r0
+ .endr
+ .endr
+
+ brtc 2f
+exit:
+ pop r31
+ pop r30
+ .irp row, 0, 1, 2, 3
+ .irp col, 0, 1, 2, 3
+ st Z+, ST\row\col
+ .endr
+ .endr
+ pop r29
+ pop r28
+ pop_range 2, 17
+ ret
+
+2: dec CTR
+ brne 3f
+ set
+3:
+
+ /* encryption loop */
+
+ /* SBOX substitution and shifting */
+ mov r30, ST00
+ lpm ST00, Z
+ mov r30, ST10
+ lpm ST10, Z
+ mov r30, ST20
+ lpm ST20, Z
+ mov r30, ST30
+ lpm ST30, Z
+
+ mov r30, ST01
+ lpm T0, Z
+ mov r30, ST11
+ lpm ST01, Z
+ mov r30, ST21
+ lpm ST11, Z
+ mov r30, ST31
+ lpm ST21, Z
+ mov ST31, T0
+
+ mov r30, ST02
+ lpm T0, Z
+ mov r30, ST12
+ lpm T1, Z
+ mov r30, ST22
+ lpm ST02, Z
+ mov r30, ST32
+ lpm ST12, Z
+ mov ST22, T0
+ mov ST32, T1
+
+ mov r30, ST03
+ lpm T0, Z
+ mov r30, ST33
+ lpm ST03, Z
+ mov r30, ST23
+ lpm ST33, Z
+ mov r30, ST13
+ lpm ST23, Z
+ mov ST13, T0
+
+ /* mixcols (or rows in our case) */
+ brtc 2f
+ rjmp 1b
+2:
+ /* mixrows */
+ .irp row, 0, 1, 2, 3
+ mov r0, ST\row\()2
+ eor r0, ST\row\()3
+ mov T2, r0
+
+ mov T0, ST\row\()0
+ eor ST\row\()0, ST\row\()1
+ eor r0, ST\row\()0
+ lsl ST\row\()0
+ brcc 3f
+ eor ST\row\()0, xREDUCER
+3: eor ST\row\()0, r0
+ eor ST\row\()0, T0
+
+ mov T1, ST\row\()1
+ eor T1, ST\row\()2
+ lsl T1
+ brcc 3f
+ eor T1, xREDUCER
+3: eor T1, r0
+ eor ST\row\()1, T1
+
+ lsl T2
+ brcc 3f
+ eor T2, xREDUCER
+3: eor T2, r0
+ eor ST\row\()2, T2
+
+ eor T0, ST\row\()3
+ lsl T0
+ brcc 3f
+ eor T0, xREDUCER
+3: eor T0, r0
+ eor ST\row\()3, T0
+
+.endr
+ /* mix colums (rows) done */
+
+ /* add key*/
+ rjmp 1b
+
+
+
+
+
+
+
+
+
diff --git a/arduino_nano/aes/aes_enc.h b/arduino_nano/aes/aes_enc.h
new file mode 100644
index 0000000..3600b64
--- /dev/null
+++ b/arduino_nano/aes/aes_enc.h
@@ -0,0 +1,35 @@
+/* aes_enc.h */
+/*
+ This file is part of the AVR-Crypto-Lib.
+ Copyright (C) 2006-2015 Daniel Otte (bg@nerilex.org)
+
+ This program is free software: you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation, either version 3 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see .
+ */
+/**
+ * \file aes_enc.h
+ * \email bg@nerilex.org
+ * \author Daniel Otte
+ * \date 2008-12-30
+ * \license GPLv3 or later
+ *
+ */
+#ifndef AES_ENC_H_
+#define AES_ENC_H_
+#include "aes_types.h"
+#include
+
+void aes_encrypt_core(aes_cipher_state_t *state, const aes_genctx_t *ks,
+ uint8_t rounds);
+
+#endif
diff --git a/arduino_nano/aes/aes_invsbox-asm.S b/arduino_nano/aes/aes_invsbox-asm.S
new file mode 100644
index 0000000..ca844ae
--- /dev/null
+++ b/arduino_nano/aes/aes_invsbox-asm.S
@@ -0,0 +1,45 @@
+/* aes_sbox-asm.S */
+/*
+ This file is part of the AVR-Crypto-Lib.
+ Copyright (C) 2006-2015 Daniel Otte (bg@nerilex.org)
+
+ This program is free software: you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation, either version 3 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see .
+*/
+/**
+ * \file aes_dec-asm.S
+ * \email bg@nerilex.org
+ * \author Daniel Otte
+ * \date 2009-01-10
+ * \license GPLv3 or later
+ *
+ */
+.balign 256
+.global aes_invsbox
+aes_invsbox:
+.byte 0x52, 0x09, 0x6a, 0xd5, 0x30, 0x36, 0xa5, 0x38, 0xbf, 0x40, 0xa3, 0x9e, 0x81, 0xf3, 0xd7, 0xfb
+.byte 0x7c, 0xe3, 0x39, 0x82, 0x9b, 0x2f, 0xff, 0x87, 0x34, 0x8e, 0x43, 0x44, 0xc4, 0xde, 0xe9, 0xcb
+.byte 0x54, 0x7b, 0x94, 0x32, 0xa6, 0xc2, 0x23, 0x3d, 0xee, 0x4c, 0x95, 0x0b, 0x42, 0xfa, 0xc3, 0x4e
+.byte 0x08, 0x2e, 0xa1, 0x66, 0x28, 0xd9, 0x24, 0xb2, 0x76, 0x5b, 0xa2, 0x49, 0x6d, 0x8b, 0xd1, 0x25
+.byte 0x72, 0xf8, 0xf6, 0x64, 0x86, 0x68, 0x98, 0x16, 0xd4, 0xa4, 0x5c, 0xcc, 0x5d, 0x65, 0xb6, 0x92
+.byte 0x6c, 0x70, 0x48, 0x50, 0xfd, 0xed, 0xb9, 0xda, 0x5e, 0x15, 0x46, 0x57, 0xa7, 0x8d, 0x9d, 0x84
+.byte 0x90, 0xd8, 0xab, 0x00, 0x8c, 0xbc, 0xd3, 0x0a, 0xf7, 0xe4, 0x58, 0x05, 0xb8, 0xb3, 0x45, 0x06
+.byte 0xd0, 0x2c, 0x1e, 0x8f, 0xca, 0x3f, 0x0f, 0x02, 0xc1, 0xaf, 0xbd, 0x03, 0x01, 0x13, 0x8a, 0x6b
+.byte 0x3a, 0x91, 0x11, 0x41, 0x4f, 0x67, 0xdc, 0xea, 0x97, 0xf2, 0xcf, 0xce, 0xf0, 0xb4, 0xe6, 0x73
+.byte 0x96, 0xac, 0x74, 0x22, 0xe7, 0xad, 0x35, 0x85, 0xe2, 0xf9, 0x37, 0xe8, 0x1c, 0x75, 0xdf, 0x6e
+.byte 0x47, 0xf1, 0x1a, 0x71, 0x1d, 0x29, 0xc5, 0x89, 0x6f, 0xb7, 0x62, 0x0e, 0xaa, 0x18, 0xbe, 0x1b
+.byte 0xfc, 0x56, 0x3e, 0x4b, 0xc6, 0xd2, 0x79, 0x20, 0x9a, 0xdb, 0xc0, 0xfe, 0x78, 0xcd, 0x5a, 0xf4
+.byte 0x1f, 0xdd, 0xa8, 0x33, 0x88, 0x07, 0xc7, 0x31, 0xb1, 0x12, 0x10, 0x59, 0x27, 0x80, 0xec, 0x5f
+.byte 0x60, 0x51, 0x7f, 0xa9, 0x19, 0xb5, 0x4a, 0x0d, 0x2d, 0xe5, 0x7a, 0x9f, 0x93, 0xc9, 0x9c, 0xef
+.byte 0xa0, 0xe0, 0x3b, 0x4d, 0xae, 0x2a, 0xf5, 0xb0, 0xc8, 0xeb, 0xbb, 0x3c, 0x83, 0x53, 0x99, 0x61
+.byte 0x17, 0x2b, 0x04, 0x7e, 0xba, 0x77, 0xd6, 0x26, 0xe1, 0x69, 0x14, 0x63, 0x55, 0x21, 0x0c, 0x7d
diff --git a/arduino_nano/aes/aes_invsbox.h b/arduino_nano/aes/aes_invsbox.h
new file mode 100644
index 0000000..e38b153
--- /dev/null
+++ b/arduino_nano/aes/aes_invsbox.h
@@ -0,0 +1,33 @@
+/* aes_invsbox.h */
+/*
+ This file is part of the AVR-Crypto-Lib.
+ Copyright (C) 2006-2015 Daniel Otte (bg@nerilex.org)
+
+ This program is free software: you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation, either version 3 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see .
+ */
+/**
+ * \file aes_invsbox.h
+ * \email bg@nerilex.org
+ * \author Daniel Otte
+ * \date 2008-12-30
+ * \license GPLv3 or later
+ *
+ */
+#ifndef AES_INVSBOX_H_
+#define AES_INVSBOX_H_
+#include
+
+extern uint8_t aes_invsbox[];
+
+#endif
diff --git a/arduino_nano/aes/aes_keyschedule-asm.S b/arduino_nano/aes/aes_keyschedule-asm.S
new file mode 100644
index 0000000..0380849
--- /dev/null
+++ b/arduino_nano/aes/aes_keyschedule-asm.S
@@ -0,0 +1,225 @@
+/* aes_keyschedule-asm */
+/*
+ This file is part of the AVR-Crypto-Lib.
+ Copyright (C) 2006-2015 Daniel Otte (bg@nerilex.org)
+
+ This program is free software: you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation, either version 3 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see .
+*/
+/**
+ * \file aes_keyschedule-asm.S
+ * \email bg@nerilex.org
+ * \author Daniel Otte
+ * \date 2009-01-09
+ * \license GPLv3 or later
+ *
+ */
+
+#include "avr-asm-macros.S"
+
+.global aes256_init
+aes256_init:
+ movw r20, r22
+ ldi r23, hi8(256)
+ ldi r22, lo8(256)
+ rjmp aes_init
+
+.global aes192_init
+aes192_init:
+ movw r20, r22
+ ldi r23, hi8(192)
+ ldi r22, lo8(192)
+ rjmp aes_init
+
+.global aes128_init
+aes128_init:
+ movw r20, r22
+ clr r23
+ ldi r22, 128
+
+/*
+void aes_init(const void *key, uint16_t keysize_b, aes_genctx_t *ctx){
+ uint8_t hi,i,nk, next_nk;
+ uint8_t rc=1;
+ uint8_t tmp[4];
+ nk=keysize_b>>5; / * 4, 6, 8 * /
+ hi=4*(nk+6+1);
+ memcpy(ctx, key, keysize_b/8);
+ next_nk = nk;
+ for(i=nk;ikey[0].ks))[i-1];
+ if(i!=next_nk){
+ if(nk==8 && i%8==4){
+ tmp[0] = pgm_read_byte(aes_sbox+tmp[0]);
+ tmp[1] = pgm_read_byte(aes_sbox+tmp[1]);
+ tmp[2] = pgm_read_byte(aes_sbox+tmp[2]);
+ tmp[3] = pgm_read_byte(aes_sbox+tmp[3]);
+ }
+ } else {
+ next_nk += nk;
+ aes_rotword(tmp);
+ tmp[0] = pgm_read_byte(aes_sbox+tmp[0]);
+ tmp[1] = pgm_read_byte(aes_sbox+tmp[1]);
+ tmp[2] = pgm_read_byte(aes_sbox+tmp[2]);
+ tmp[3] = pgm_read_byte(aes_sbox+tmp[3]);
+ tmp[0] ^= rc;
+ rc<<=1;
+ }
+ ((uint32_t*)(ctx->key[0].ks))[i] = ((uint32_t*)(ctx->key[0].ks))[i-nk]
+ ^ *((uint32_t*)tmp);
+ }
+}
+*/
+
+SBOX_SAVE0 = 14
+SBOX_SAVE1 = 15
+XRC = 17
+NK = 22
+C1 = 18
+NEXT_NK = 19
+HI = 23
+T0 = 20
+T1 = 21
+T2 = 24
+T3 = 25
+/*
+ * param key: r24:r25
+ * param keysize_b: r22:r23
+ * param ctx: r20:r21
+ */
+.global aes_init
+aes_init:
+ push_range 14, 17
+ push r28
+ push r29
+ movw r30, r20
+ movw r28, r20
+ movw r26, r24
+ lsr r23
+ ror r22
+ lsr r22
+ lsr r22 /* r22 contains keysize_b/8 */
+ mov C1, r22
+
+1: /* copy key to ctx */
+ ld r0, X+
+ st Z+, r0
+ dec C1
+ brne 1b
+
+ lsr NK
+ lsr NK
+ bst NK,3 /* set T if NK==8 */
+ mov NEXT_NK, NK
+ mov HI, NK
+ subi HI, -7
+ lsl HI
+ lsl HI
+ movw r26, r30
+ sbiw r26, 4
+ mov C1, NK
+ ldi r30, lo8(aes_sbox)
+ ldi r31, hi8(aes_sbox)
+ movw SBOX_SAVE0, r30
+ ldi XRC, 1
+1:
+ ld T0, X+
+ ld T1, X+
+ ld T2, X+
+ ld T3, X+
+ cp NEXT_NK, C1
+ breq 2f
+ brtc 5f
+ mov r16, C1
+ andi r16, 0x07
+ cpi r16, 0x04
+ brne 5f
+ movw r30, SBOX_SAVE0
+ add r30, T0
+ adc r31, r1
+ lpm T0, Z
+ movw r30, SBOX_SAVE0
+ add r30, T1
+ adc r31, r1
+ lpm T1, Z
+ movw r30, SBOX_SAVE0
+ add r30, T2
+ adc r31, r1
+ lpm T2, Z
+ movw r30, SBOX_SAVE0
+ add r30, T3
+ adc r31, r1
+ lpm T3, Z
+ rjmp 5f
+2:
+ add NEXT_NK, NK
+ movw r30, SBOX_SAVE0
+ add r30, T0
+ adc r31, r1
+ lpm r16, Z
+ movw r30, SBOX_SAVE0
+ add r30, T1
+ adc r31, r1
+ lpm T0, Z
+ movw r30, SBOX_SAVE0
+ add r30, T2
+ adc r31, r1
+ lpm T1, Z
+ movw r30, SBOX_SAVE0
+ add r30, T3
+ adc r31, r1
+ lpm T2, Z
+ mov T3, r16
+ eor T0, XRC
+ lsl XRC
+ brcc 3f
+ ldi XRC, 0x1b
+3:
+5:
+ movw r30, r26
+
+ ld r0, Y+
+ eor r0, T0
+ st Z+, r0
+ ld r0, Y+
+ eor r0 ,T1
+ st Z+, r0
+ ld r0, Y+
+ eor r0, T2
+ st Z+, r0
+ ld r0, Y+
+ eor r0, T3
+ st Z+, r0
+
+/*
+ st Z+, T0
+ st Z+, T1
+ st Z+, T2
+ st Z+, T3
+*/
+
+ inc C1
+ cp C1, HI
+ breq 6f
+ rjmp 1b
+6:
+
+ clt
+ pop r29
+ pop r28
+ pop_range 14, 17
+ ret
+
+
+
+
diff --git a/arduino_nano/aes/aes_keyschedule.h b/arduino_nano/aes/aes_keyschedule.h
new file mode 100644
index 0000000..be83ad9
--- /dev/null
+++ b/arduino_nano/aes/aes_keyschedule.h
@@ -0,0 +1,74 @@
+/* aes_keyschedule.h */
+/*
+ This file is part of the AVR-Crypto-Lib.
+ Copyright (C) 2006-2015 Daniel Otte (bg@nerilex.org)
+
+ This program is free software: you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation, either version 3 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see .
+ */
+/**
+ * \file aes_keyschedule.h
+ * \email bg@nerilex.org
+ * \author Daniel Otte
+ * \date 2008-12-30
+ * \license GPLv3 or later
+ * \ingroup AES
+ */
+
+#ifndef AES_KEYSCHEDULE_H_
+#define AES_KEYSCHEDULE_H_
+
+#include "aes_types.h"
+/**
+ * \brief initialize the keyschedule
+ *
+ * This function computes the keyschedule from a given key with a given length
+ * and stores it in the context variable
+ * \param key pointer to the key material
+ * \param keysize_b length of the key in bits (valid are 128, 192 and 256)
+ * \param ctx pointer to the context where the keyschedule should be stored
+ */
+void aes_init(const void *key, uint16_t keysize_b, aes_genctx_t *ctx);
+
+/**
+ * \brief initialize the keyschedule for 128 bit key
+ *
+ * This function computes the keyschedule from a given 128 bit key
+ * and stores it in the context variable
+ * \param key pointer to the key material
+ * \param ctx pointer to the context where the keyschedule should be stored
+ */
+void aes128_init(const void *key, aes128_ctx_t *ctx);
+
+/**
+ * \brief initialize the keyschedule for 192 bit key
+ *
+ * This function computes the keyschedule from a given 192 bit key
+ * and stores it in the context variable
+ * \param key pointer to the key material
+ * \param ctx pointer to the context where the keyschedule should be stored
+ */
+void aes192_init(const void *key, aes192_ctx_t *ctx);
+
+/**
+ * \brief initialize the keyschedule for 256 bit key
+ *
+ * This function computes the keyschedule from a given 256 bit key
+ * and stores it in the context variable
+ * \param key pointer to the key material
+ * \param ctx pointer to the context where the keyschedule should be stored
+ */
+void aes256_init(const void *key, aes256_ctx_t *ctx);
+
+#endif /* AES_KEYSCHEDULE_H_ */
+
diff --git a/arduino_nano/aes/aes_sbox-asm.S b/arduino_nano/aes/aes_sbox-asm.S
new file mode 100644
index 0000000..f93c95f
--- /dev/null
+++ b/arduino_nano/aes/aes_sbox-asm.S
@@ -0,0 +1,47 @@
+/* aes_sbox-asm.S */
+/*
+ This file is part of the AVR-Crypto-Lib.
+ Copyright (C) 2006-2015 Daniel Otte (bg@nerilex.org)
+
+ This program is free software: you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation, either version 3 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see .
+*/
+/**
+ * \file aes_dec-asm.S
+ * \email bg@nerilex.org
+ * \author Daniel Otte
+ * \date 2009-01-10
+ * \license GPLv3 or later
+ *
+ */
+
+.balign 256
+.global aes_sbox
+aes_sbox:
+.byte 0x63, 0x7c, 0x77, 0x7b, 0xf2, 0x6b, 0x6f, 0xc5, 0x30, 0x01, 0x67, 0x2b, 0xfe, 0xd7, 0xab, 0x76
+.byte 0xca, 0x82, 0xc9, 0x7d, 0xfa, 0x59, 0x47, 0xf0, 0xad, 0xd4, 0xa2, 0xaf, 0x9c, 0xa4, 0x72, 0xc0
+.byte 0xb7, 0xfd, 0x93, 0x26, 0x36, 0x3f, 0xf7, 0xcc, 0x34, 0xa5, 0xe5, 0xf1, 0x71, 0xd8, 0x31, 0x15
+.byte 0x04, 0xc7, 0x23, 0xc3, 0x18, 0x96, 0x05, 0x9a, 0x07, 0x12, 0x80, 0xe2, 0xeb, 0x27, 0xb2, 0x75
+.byte 0x09, 0x83, 0x2c, 0x1a, 0x1b, 0x6e, 0x5a, 0xa0, 0x52, 0x3b, 0xd6, 0xb3, 0x29, 0xe3, 0x2f, 0x84
+.byte 0x53, 0xd1, 0x00, 0xed, 0x20, 0xfc, 0xb1, 0x5b, 0x6a, 0xcb, 0xbe, 0x39, 0x4a, 0x4c, 0x58, 0xcf
+.byte 0xd0, 0xef, 0xaa, 0xfb, 0x43, 0x4d, 0x33, 0x85, 0x45, 0xf9, 0x02, 0x7f, 0x50, 0x3c, 0x9f, 0xa8
+.byte 0x51, 0xa3, 0x40, 0x8f, 0x92, 0x9d, 0x38, 0xf5, 0xbc, 0xb6, 0xda, 0x21, 0x10, 0xff, 0xf3, 0xd2
+.byte 0xcd, 0x0c, 0x13, 0xec, 0x5f, 0x97, 0x44, 0x17, 0xc4, 0xa7, 0x7e, 0x3d, 0x64, 0x5d, 0x19, 0x73
+.byte 0x60, 0x81, 0x4f, 0xdc, 0x22, 0x2a, 0x90, 0x88, 0x46, 0xee, 0xb8, 0x14, 0xde, 0x5e, 0x0b, 0xdb
+.byte 0xe0, 0x32, 0x3a, 0x0a, 0x49, 0x06, 0x24, 0x5c, 0xc2, 0xd3, 0xac, 0x62, 0x91, 0x95, 0xe4, 0x79
+.byte 0xe7, 0xc8, 0x37, 0x6d, 0x8d, 0xd5, 0x4e, 0xa9, 0x6c, 0x56, 0xf4, 0xea, 0x65, 0x7a, 0xae, 0x08
+.byte 0xba, 0x78, 0x25, 0x2e, 0x1c, 0xa6, 0xb4, 0xc6, 0xe8, 0xdd, 0x74, 0x1f, 0x4b, 0xbd, 0x8b, 0x8a
+.byte 0x70, 0x3e, 0xb5, 0x66, 0x48, 0x03, 0xf6, 0x0e, 0x61, 0x35, 0x57, 0xb9, 0x86, 0xc1, 0x1d, 0x9e
+.byte 0xe1, 0xf8, 0x98, 0x11, 0x69, 0xd9, 0x8e, 0x94, 0x9b, 0x1e, 0x87, 0xe9, 0xce, 0x55, 0x28, 0xdf
+.byte 0x8c, 0xa1, 0x89, 0x0d, 0xbf, 0xe6, 0x42, 0x68, 0x41, 0x99, 0x2d, 0x0f, 0xb0, 0x54, 0xbb, 0x16
+
diff --git a/arduino_nano/aes/aes_sbox.h b/arduino_nano/aes/aes_sbox.h
new file mode 100644
index 0000000..491ba0e
--- /dev/null
+++ b/arduino_nano/aes/aes_sbox.h
@@ -0,0 +1,33 @@
+/* aes_sbox.h */
+/*
+ This file is part of the AVR-Crypto-Lib.
+ Copyright (C) 2006-2015 Daniel Otte (bg@nerilex.org)
+
+ This program is free software: you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation, either version 3 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see .
+ */
+/**
+ * \file aes_sbox.h
+ * \email bg@nerilex.org
+ * \author Daniel Otte
+ * \date 2008-12-30
+ * \license GPLv3 or later
+ *
+ */
+#ifndef AES_SBOX_H_
+#define AES_SBOX_H_
+#include
+
+extern uint8_t aes_sbox[];
+
+#endif
diff --git a/arduino_nano/aes/aes_types.h b/arduino_nano/aes/aes_types.h
new file mode 100644
index 0000000..df9ddf3
--- /dev/null
+++ b/arduino_nano/aes/aes_types.h
@@ -0,0 +1,56 @@
+/* aes.h */
+/*
+ This file is part of the AVR-Crypto-Lib.
+ Copyright (C) 2006-2015 Daniel Otte (bg@nerilex.org)
+
+ This program is free software: you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation, either version 3 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see .
+*/
+/**
+ * \file aes_types.h
+ * \email bg@nerilex.org
+ * \author Daniel Otte
+ * \date 2008-12-30
+ * \license GPLv3 or later
+ *
+ */
+#ifndef AES_TYPES_H_
+#define AES_TYPES_H_
+
+#include
+
+typedef struct{
+ uint8_t ks[16];
+} aes_roundkey_t;
+
+typedef struct{
+ aes_roundkey_t key[10+1];
+} aes128_ctx_t;
+
+typedef struct{
+ aes_roundkey_t key[12+1];
+} aes192_ctx_t;
+
+typedef struct{
+ aes_roundkey_t key[14+1];
+} aes256_ctx_t;
+
+typedef struct{
+ aes_roundkey_t key[1]; /* just to avoid the warning */
+} aes_genctx_t;
+
+typedef struct{
+ uint8_t s[16];
+} aes_cipher_state_t;
+
+#endif
diff --git a/arduino_nano/aes/avr-asm-macros.S b/arduino_nano/aes/avr-asm-macros.S
new file mode 100644
index 0000000..afaf78c
--- /dev/null
+++ b/arduino_nano/aes/avr-asm-macros.S
@@ -0,0 +1,151 @@
+/* avr-asm-macros.S */
+/*
+ This file is part of the AVR-Crypto-Lib.
+ Copyright (C) 2006-2015 Daniel Otte (bg@nerilex.org)
+
+ This program is free software: you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation, either version 3 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see .
+*/
+
+/*
+ * File: avr-asm-macros.S
+ * Author: Daniel Otte
+ * Date: 2008-08-13
+ * License: GPLv3 or later
+ * Description: some macros which are quite usefull
+ *
+ */
+
+//#ifndef AVR_ASM_MACROS__S__
+//#define AVR_ASM_MACROS__S__
+.nolist
+#include
+.list
+/*******************************************************************************
+* MACRO SECTION *
+*******************************************************************************/
+
+.macro push_ p1:req, p2:vararg
+ push \p1
+.ifnb \p2
+ push_ \p2
+.endif
+.endm
+
+.macro pop_ p1:req, p2:vararg
+ pop \p1
+.ifnb \p2
+ pop_ \p2
+.endif
+.endm
+
+.macro push_range from:req, to:req
+ push \from
+.if \to-\from
+ push_range "(\from+1)",\to
+.endif
+.endm
+
+.macro pop_range from:req, to:req
+ pop \to
+.if \to-\from
+ pop_range \from,"(\to-1)"
+.endif
+.endm
+
+.macro stack_alloc size:req, reg1=r30, reg2=r31
+ in r0, _SFR_IO_ADDR(SREG)
+ in \reg1, _SFR_IO_ADDR(SPL)
+ in \reg2, _SFR_IO_ADDR(SPH)
+ sbiw \reg1, \size
+ cli
+ out _SFR_IO_ADDR(SPH), \reg2
+ out _SFR_IO_ADDR(SREG), r0
+ out _SFR_IO_ADDR(SPL), \reg1
+.endm
+
+.macro stack_free size:req, reg1=r30, reg2=r31
+ in r0, _SFR_IO_ADDR(SREG)
+ in \reg1, _SFR_IO_ADDR(SPL)
+ in \reg2, _SFR_IO_ADDR(SPH)
+ adiw \reg1, \size
+ cli
+ out _SFR_IO_ADDR(SPH), \reg2
+ out _SFR_IO_ADDR(SREG), r0
+ out _SFR_IO_ADDR(SPL), \reg1
+.endm
+
+
+.macro stack_alloc_large size:req, reg1=r30, reg2=r31
+ in r0, _SFR_IO_ADDR(SREG)
+ in \reg1, _SFR_IO_ADDR(SPL)
+ in \reg2, _SFR_IO_ADDR(SPH)
+ subi \reg1, lo8(\size)
+ sbci \reg2, hi8(\size)
+ cli
+ out _SFR_IO_ADDR(SPH), \reg2
+ out _SFR_IO_ADDR(SREG), r0
+ out _SFR_IO_ADDR(SPL), \reg1
+.endm
+
+.macro stack_free_large size:req, reg1=r30, reg2=r31
+ in r0, _SFR_IO_ADDR(SREG)
+ in \reg1, _SFR_IO_ADDR(SPL)
+ in \reg2, _SFR_IO_ADDR(SPH)
+ adiw \reg1, 63
+ adiw \reg1, (\size-63)
+ cli
+ out _SFR_IO_ADDR(SPH), \reg2
+ out _SFR_IO_ADDR(SREG), r0
+ out _SFR_IO_ADDR(SPL), \reg1
+.endm
+
+.macro stack_free_large2 size:req, reg1=r30, reg2=r31
+ in r0, _SFR_IO_ADDR(SREG)
+ in \reg1, _SFR_IO_ADDR(SPL)
+ in \reg2, _SFR_IO_ADDR(SPH)
+ adiw \reg1, 63
+ adiw \reg1, 63
+ adiw \reg1, (\size-63*2)
+ cli
+ out _SFR_IO_ADDR(SPH), \reg2
+ out _SFR_IO_ADDR(SREG), r0
+ out _SFR_IO_ADDR(SPL), \reg1
+.endm
+
+.macro stack_free_large3 size:req, reg1=r30, reg2=r31
+ in r0, _SFR_IO_ADDR(SREG)
+ in \reg1, _SFR_IO_ADDR(SPL)
+ in \reg2, _SFR_IO_ADDR(SPH)
+ push r16
+ push r17
+ ldi r16, lo8(\size)
+ ldi r17, hi8(\size)
+ add \reg1, r16
+ adc \reg2, r17
+ pop r17
+ pop r16
+ cli
+ out _SFR_IO_ADDR(SPH), \reg2
+ out _SFR_IO_ADDR(SREG), r0
+ out _SFR_IO_ADDR(SPL), \reg1
+.endm
+
+
+/*******************************************************************************
+* END of MACRO SECTION *
+*******************************************************************************/
+
+
+//#endif /* AVR_ASM_MACROS__S__ */
+