qeda_library/mcu/st_stm8s003x3-detailed.yaml

170 lines
3.3 KiB
YAML

name: STM8S003x3
# F: 20 pins, K: 32 pins
alias: STM8S003F3, STM8S003K3
# T: LQFP, P: TSSOP, U: UFQFPN
variations: T,P,U
description: 16-MHz STM8S 8-bit MCU, 8-Kbyte Flash memory, 128-byte data EEPROM, 10-bit ADC, 3 timers, UART, SPI, I2C
keywords: IC, MCU, Micro-Controller, STM8S
datasheet: https://www.st.com/resource/en/datasheet/stm8s003f3.pdf
pinout@T:
PORTA:
PA1/OSCIN: 2
PA2/OSCOUT: 3
PA3/TIM2_CH3/SPI_NSS: 7
PORTB:
PB0/AIN0/TIM1_CH1N: 16
PB1/AIN1/TIM1_CH2N: 15
PB2/AIN2/TIM1_CH3N: 14
PB3/AIN3/TIM1_ETR: 13
PB4/I2C_SCL: 12
PB5/I2C_SDA: 11
PB6: 10
PB7: 9
PORTC:
PC1/TIM1_CH1/UART1_CK: 18
PC2/TIM1_CH2: 19
PC3/TIM1_CH3: 20
PC4/TIM1_CH4/CLK_CCO: 21
PC5/SPI_SCK: 22
PC6/SPI_MOSI: 23
PC7/SPI_MISO: 24
PORTD:
PD0/TIM1_BKIN/CLK_CCO: 25
PD1/SWIM: 26
PD2/TIM2_CH3: 27
PD3/TIM2_CH2/ADC_ETR: 28
PD4/BEEP/TIM2_CH1: 29
PD5/UART1_TX: 30
PD6/UART1_RX: 31
PD7/TLI/TIM1_CH4: 32
PORTE:
PE5/SPI_NSS: 17
PORTF:
PF4: 8
CTRL:
NRST: 1
POWER:
VCAP: 5
VDD: 6
GROUND:
VSS: 4
pinout@P:
PORTA:
PA1/OSCIN: 5
PA2/OSCOUT: 6
PA3/TIM2_CH3/SPI_NSS: 10
PORTB:
PB4/I2C_SCL: 12
PB5/I2C_SDA/TIM1_BKIN: 11
PORTC:
PC3/TIM1_CH3/TLI/TIM1_CH1N: 13
PC4/CLK_CCO/TIM1_CH4/AIN2/TIM2_CH2N: 14
PC5/SPI_SCK/TIM2_CH1: 15
PC6/SPI_MOSI/TIM1_CH1: 16
PC7/SPI_MISO/TIM1_CH2: 17
PORTD:
PD1/SWIM: 18
PD2/AIN3/TIM2_CH3: 19
PD3/AIN4/TIM2_CH2/ADC_ETR: 20
PD4/BEEP/TIM2_CH1/UART1_CK: 1
PD5/AIN5/UART1_TX: 2
PD6/AIN6/UART1_RX: 3
CTRL:
NRST: 4
POWER:
VCAP: 8
VDD: 9
GROUND:
VSS: 7
pinout@U:
PORTA:
PA1/OSCIN: 2
PA2/OSCOUT: 3
PA3/TIM2_CH3/SPI_NSS: 7
PORTB:
PB4/I2C_SCL: 9
PB5/I2C_SDA/TIM1_BKIN: 8
PORTC:
PC3/TIM1_CH3/TLI/TIM1_CH1N: 10
PC4/CLK_CCO/TIM1_CH4/AIN2/TIM2_CH2N: 11
PC5/SPI_SCK/TIM2_CH1: 12
PC6/SPI_MOSI/TIM1_CH1: 13
PC7/SPI_MISO/TIM1_CH2: 14
PORTD:
PD1/SWIM: 15
PD2/AIN3/TIM2_CH3: 16
PD3/AIN4/TIM2_CH2/ADC_ETR: 17
PD4/BEEP/TIM2_CH1/UART1_CK: 18
PD5/AIN5/UART1_TX: 19
PD6/AIN6/UART1_RX: 20
CTRL:
NRST: 1
POWER:
VCAP: 5
VDD: 6
GROUND:
VSS: 4
properties:
in: NRST
bidir: PORTA, PORTB, PORTC, PORTD, PORTE, PORTF
power: VDD, VCAP
ground: VSS
inverted: NRST
schematic@T:
symbol: IC
left: PORTA, PORTB, PORTC, CTRL
right: PORTD, PORTE, PORTF
top: POWER
bottom: GROUND
schematic@P:
symbol: IC
left: PORTA, PORTB, CTRL
right: PORTC, PORTD
top: POWER
bottom: GROUND
schematic@U:
symbol: IC
left: PORTA, PORTB, CTRL
right: PORTC, PORTD
top: POWER
bottom: GROUND
housing@T:
pattern: QFP
bodyWidth: 6.80-7.20 # D1
bodyLength: 6.80-7.20 # E1
height: 1.600 # A
leadWidth: 0.30-0.45 # b
leadLength: 0.45-0.75 # L
leadSpan: 8.80-9.2 # D
pitch: 0.80 # e
leadCount: 32
housing@P:
pattern: SOP
bodyWidth: 4.30-4.50 # E1
bodyLength: 6.40-6.60 # D
height: 1.2 # A
leadWidth: 0.19-0.30 # b
leadLength: 0.45-0.75 # L
leadSpan: 6.20-6.60 # E
pitch: 0.65 # e
leadCount: 20
housing@U:
pattern: QFN
bodyWidth: 2.90-3.10 # D
bodyLength: 2.90-3.10 # E
height: 0.50-0.60 # A
leadWidth: 0.18-0.30 # b
leadLength: 0.50-0.60 # L (not on the corner pins)
pitch: 0.50 # e
leadCount: 20