name: STM32F042 # not all variations added, just as needed variations: FxP, GxU # not verified: CxT, CxU # STM32F042xyz # x = pin count: F=20, G=28, K=32, T=36, C=48 # y = flash size: 4=16KB, 6=32KB # z = package: R=TSSOP, T=LQFP, U=UFQFPN, Y=WLCSP description: Cortex-M0 USB line MCU keywords: MCU, micro-controller datasheet: https://www.st.com/resource/en/datasheet/stm32f042g6.pdf pinout@FxP: # TSSOP20 PORTA: PA0: 6 PA1: 7 PA2: 8 PA3: 9 PA4: 10 PA5: 11 PA6: 12 PA7: 13 PA9-PA11: 17 PA10-PA12: 18 PA13-SWDIO: 19 PA14-SWCLK: 20 PORTB: PB1: 14 PB8-BOOT0: 1 PORTF: PF0-OSC_IN: 2 PF1-OSC_OUT: 3 CTRL: NRST: 4 GROUND: VSS: 15 POWER: VDD-VDDIO2: 16 VDDA: 5 pinout@GxU: # QFN28 PORTA: PA0: 6 PA1: 7 PA2: 8 PA3: 9 PA4: 10 PA5: 11 PA6: 12 PA7: 13 PA9-PA11: 19 PA10-PA12: 20 PA13-SWDIO: 21 PA14-SWCLK: 22 PA15: 23 PORTB: PB0: 14 PB1: 15 PB3: 24 PB4: 25 PB5: 26 PB6: 27 PB7: 28 PB8-BOOT0: 1 PORTF: PF0-OSC_IN: 2 PF1-OSC_OUT: 3 CTRL: NRST: 4 GROUND: VSS: 16 POWER: VDD: 17 VDDIO2: 18 VDDA: 5 pinout@CxT: # LQFP48 PORTA: PA0-WKUP: 10 PA1: 11 PA2: 12 PA3: 13 PA4: 14 PA5: 15 PA6: 16 PA7: 17 PA8: 29 PA9: 30 PA10: 31 PA11: 32 PA12: 33 PA13: 34 PA14: 37 PA15: 38 PORTB: PB0: 18 PB1: 19 PB2: 20 PB3: 39 PB4: 40 PB5: 41 PB6: 42 PB7: 43 PB8: 45 PB9: 46 PB10: 21 PB11: 22 PB12: 25 PB13: 26 PB14: 27 PB15: 28 PORTC: PC13-TAMPER-RTC: 2 PC14-OSC32_IN: 3 PC15-OSC32_OUT: 4 CTRL: BOOT0: 44 OSC_IN: 5 OSC_OUT: 6 NRST: 7 GROUND: VSS: 23, 35, 47 VSSA: 8 POWER: VDD: 24, 36, 48 VDDA: 9 VBAT: 1 pinout@CxU: # QFN48 PORTA: PA0-WKUP: 10 PA1: 11 PA2: 12 PA3: 13 PA4: 14 PA5: 15 PA6: 16 PA7: 17 PA8: 29 PA9: 30 PA10: 31 PA11: 32 PA12: 33 PA13: 34 PA14: 37 PA15: 38 PORTB: PB0: 18 PB1: 19 PB2: 20 PB3: 39 PB4: 40 PB5: 41 PB6: 42 PB7: 43 PB8: 45 PB9: 46 PB10: 21 PB11: 22 PB12: 25 PB13: 26 PB14: 27 PB15: 28 PORTC: PC13-TAMPER-RTC: 2 PC14-OSC32_IN: 3 PC15-OSC32_OUT: 4 CTRL: BOOT0: 44 OSC_IN: 5 OSC_OUT: 6 NRST: 7 GROUND: VSS: 23, 35, 47, 49 VSSA: 8 POWER: VDD: 24, 36, 48 VDDA: 9 VBAT: 1 properties: in: NRST, BOOT0 bidir: PORTA, PORTB, PORTC, PORTF power: VDD, VDDA, VDDIO2, VBAT ground: VSS, VSSA inverted: NRST schematic: symbol: IC left: PORTA, PORTF right: PORTB, PORTC, CTRL top: POWER bottom: GROUND housing@FxP: # TSSOP20 suffix: FxP pattern: SOP bodyWidth: 4.3-4.5 # E1 bodyLength: 6.4-6.6 # D height: 1.2 # A leadWidth: 0.19-0.30 # b leadLength: 0.45-0.75 # L leadSpan: 6.2-6.6 # E pitch: 0.65 # e leadCount: 20 housing@GxU: # QFN28 suffix: GxU pattern: QFN bodyWidth: 3.9-4.1 # D bodyLength: 3.9-4.1 # E height: 0.5-0.6 # A leadWidth: 0.2-0.3 # b leadLength: 0.3-0.5 # L pitch: 0.5 # e leadCount: 28 rowCount: 7 columnCount: 7 # no tab housing@CxU: # QFN48 suffix: CxU pattern: QFN bodyWidth: 7.0 bodyLength: 7.0 height: 0.85 leadWidth: 0.25 leadLength: 0.4 pitch: 0.5 leadCount: 48 tabWidth: 5.5 tabLength: 5.5 tabPosition: 0.0, 0.0 housing@CxT: # LQFP48 suffix: CxT pattern: QFP bodyWidth: 7.0 bodyLength: 7.0 height: 1.5 leadWidth: 0.2 leadLength: 0.6 leadSpan: 9.0 pitch: 0.5 leadCount: 48 rowCount: 12 columnCount: 12