From d108ea4326d824da73da0a4f9632c5da6aa2e3ec Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 22 May 2020 21:45:34 +0700 Subject: [PATCH] implement hcd_uframe_number for ohci able to get 8 byte descriptors using LPC1769 + base, but failed to reset and set address. --- .../cdc_msc_hid/ses/lpc40xx/lpc40xx.emProject | 24 ++++++++++++------- src/host/ohci/ohci.c | 15 +++++++++++- src/host/ohci/ohci.h | 2 ++ 3 files changed, 32 insertions(+), 9 deletions(-) diff --git a/examples/host/cdc_msc_hid/ses/lpc40xx/lpc40xx.emProject b/examples/host/cdc_msc_hid/ses/lpc40xx/lpc40xx.emProject index bfb7922a3..68995f1a5 100644 --- a/examples/host/cdc_msc_hid/ses/lpc40xx/lpc40xx.emProject +++ b/examples/host/cdc_msc_hid/ses/lpc40xx/lpc40xx.emProject @@ -18,8 +18,8 @@ arm_target_debug_interface_type="ADIv5" arm_target_device_name="LPC4088" arm_target_interface_type="SWD" - c_preprocessor_definitions="CORE_M4;__LPC4000_FAMILY;__LPC408x_SUBFAMILY;ARM_MATH_CM4;FLASH_PLACEMENT=1;BOARD_EA4088QS;CFG_TUSB_MCU=OPT_MCU_LPC40XX;CFG_TUSB_MEM_SECTION= __attribute__((section(".bss2")))" - c_user_include_directories="../../src;$(rootDir)/hw;$(rootDir)/src;$(lpcDir)/inc" + c_preprocessor_definitions="CORE_M4;__LPC4000_FAMILY;__LPC408x_SUBFAMILY;ARM_MATH_CM4;FLASH_PLACEMENT=1;BOARD_EA4088QS;CFG_TUSB_MCU=OPT_MCU_LPC40XX;CFG_TUSB_MEM_SECTION= __attribute__((section(".bss2")));CFG_TUSB_DEBUG=2;LOGGER_RTT" + c_user_include_directories="../../src;$(rootDir)/hw;$(rootDir)/src;$(lpcDir)/inc;$(rootDir)/lib/SEGGER_RTT/RTT" debug_register_definition_file="$(ProjectDir)/LPC408x_7x_Registers.xml" debug_target_connection="J-Link" gcc_enable_all_warnings="Yes" @@ -55,6 +55,7 @@ + @@ -91,12 +92,6 @@ - + + + + + + + + + + + + + interrupt_disable = OHCI_REG->interrupt_enable; // disable all interrupts OHCI_REG->interrupt_status = OHCI_REG->interrupt_status; // clear current set bits OHCI_REG->interrupt_enable = OHCI_INT_WRITEBACK_DONEHEAD_MASK | OHCI_INT_RESUME_DETECTED_MASK | - OHCI_INT_UNRECOVERABLE_ERROR_MASK | /*OHCI_INT_FRAME_OVERFLOW_MASK |*/ OHCI_INT_RHPORT_STATUS_CHANGE_MASK | + OHCI_INT_UNRECOVERABLE_ERROR_MASK | OHCI_INT_FRAME_OVERFLOW_MASK | OHCI_INT_RHPORT_STATUS_CHANGE_MASK | OHCI_INT_MASTER_ENABLE_MASK; OHCI_REG->control |= OHCI_CONTROL_CONTROL_BULK_RATIO | OHCI_CONTROL_LIST_CONTROL_ENABLE_MASK | @@ -181,6 +181,13 @@ bool hcd_init(void) return true; } +uint32_t hcd_uframe_number(uint8_t rhport) +{ + (void) rhport; + return (ohci_data.frame_number_hi << 16 | OHCI_REG->frame_number) << 3; +} + + //--------------------------------------------------------------------+ // PORT API //--------------------------------------------------------------------+ @@ -606,6 +613,12 @@ void hcd_isr(uint8_t hostid) if (int_status == 0) return; + // Frame number overflow + if ( int_status & OHCI_INT_FRAME_OVERFLOW_MASK ) + { + ohci_data.frame_number_hi++; + } + //------------- RootHub status -------------// if ( int_status & OHCI_INT_RHPORT_STATUS_CHANGE_MASK ) { diff --git a/src/host/ohci/ohci.h b/src/host/ohci/ohci.h index 6f6ef9676..bfcdaf9a3 100644 --- a/src/host/ohci/ohci.h +++ b/src/host/ohci/ohci.h @@ -180,6 +180,8 @@ typedef struct TU_ATTR_ALIGNED(256) ohci_ed_t ed_pool[HCD_MAX_ENDPOINT]; ohci_gtd_t gtd_pool[HCD_MAX_XFER]; + volatile uint16_t frame_number_hi; + } ohci_data_t; //--------------------------------------------------------------------+