diff --git a/src/common/tusb_mcu_attr.h b/src/common/tusb_mcu.h similarity index 59% rename from src/common/tusb_mcu_attr.h rename to src/common/tusb_mcu.h index 0341dd1bf..465e33ec7 100644 --- a/src/common/tusb_mcu_attr.h +++ b/src/common/tusb_mcu.h @@ -24,8 +24,22 @@ * This file is part of the TinyUSB stack. */ -#ifndef TUSB_MCU_ATTR_H_ -#define TUSB_MCU_ATTR_H_ +#ifndef TUSB_MCU_H_ +#define TUSB_MCU_H_ + +//--------------------------------------------------------------------+ +// Port Specific +// TUP stand for TinyUSB Port (can be renamed) +//--------------------------------------------------------------------+ + +//------------- Unaligned Memory Access -------------// + +// ARMv7+ (M3-M7, M23-M33) can access unaligned memory +#if (defined(__ARM_ARCH) && (__ARM_ARCH >= 7)) + #define TUP_ARCH_STRICT_ALIGN 0 +#else + #define TUP_ARCH_STRICT_ALIGN 1 +#endif /* USB Controller Attributes for Device, Host or MCU (both) * - ENDPOINT_MAX: max (logical) number of endpoint @@ -37,107 +51,124 @@ //------------- NXP -------------// #if TU_CHECK_MCU(OPT_MCU_LPC11UXX, OPT_MCU_LPC13XX, OPT_MCU_LPC15XX) - #define DCD_ATTR_ENDPOINT_MAX 5 + #define TUP_DCD_ENDPOINT_MAX 5 #elif TU_CHECK_MCU(OPT_MCU_LPC175X_6X, OPT_MCU_LPC177X_8X, OPT_MCU_LPC40XX) - #define DCD_ATTR_ENDPOINT_MAX 16 - #define HCD_ATTR_OHCI + #define TUP_DCD_ENDPOINT_MAX 16 + #define TUP_USBIP_OHCI #elif TU_CHECK_MCU(OPT_MCU_LPC18XX, OPT_MCU_LPC43XX) // TODO USB0 has 6, USB1 has 4 - #define MCU_ATTR_CONTROLLER_CHIPIDEA_HS - #define DCD_ATTR_ENDPOINT_MAX 6 - #define DCD_ATTR_RHPORT_HIGHSPEED 0x01 // Port0 HS, Port1 FS + #define TUP_USBIP_CHIPIDEA_HS + #define TUP_USBIP_EHCI + + #define TUP_DCD_ENDPOINT_MAX 6 + #define TUP_RHPORT_HIGHSPEED 0x01 // Port0 HS, Port1 FS - #define HCD_ATTR_EHCI #elif TU_CHECK_MCU(OPT_MCU_LPC51UXX) - #define DCD_ATTR_ENDPOINT_MAX 5 + #define TUP_DCD_ENDPOINT_MAX 5 #elif TU_CHECK_MCU(OPT_MCU_LPC54XXX) // TODO USB0 has 5, USB1 has 6 - #define DCD_ATTR_ENDPOINT_MAX 6 + #define TUP_DCD_ENDPOINT_MAX 6 #elif TU_CHECK_MCU(OPT_MCU_LPC55XX) // TODO USB0 has 5, USB1 has 6 - #define DCD_ATTR_ENDPOINT_MAX 6 + #define TUP_DCD_ENDPOINT_MAX 6 #elif TU_CHECK_MCU(OPT_MCU_MIMXRT10XX) - #define MCU_ATTR_CONTROLLER_CHIPIDEA_HS - #define DCD_ATTR_ENDPOINT_MAX 8 - #define DCD_ATTR_RHPORT_HIGHSPEED 0x03 // Port0 HS, Port1 HS + #define TUP_USBIP_CHIPIDEA_HS + #define TUP_USBIP_EHCI + + #define TUP_DCD_ENDPOINT_MAX 8 + #define TUP_RHPORT_HIGHSPEED 0x03 // Port0 HS, Port1 HS - #define HCD_ATTR_EHCI #elif TU_CHECK_MCU(OPT_MCU_MKL25ZXX, OPT_MCU_K32L2BXX) - #define DCD_ATTR_ENDPOINT_MAX 16 + #define TUP_DCD_ENDPOINT_MAX 16 #elif TU_CHECK_MCU(OPT_MCU_MM32F327X) - #define DCD_ATTR_ENDPOINT_MAX 16 + #define TUP_DCD_ENDPOINT_MAX 16 //------------- Nordic -------------// #elif TU_CHECK_MCU(OPT_MCU_NRF5X) // 8 CBI + 1 ISO - #define DCD_ATTR_ENDPOINT_MAX 9 + #define TUP_DCD_ENDPOINT_MAX 9 //------------- Microchip -------------// #elif TU_CHECK_MCU(OPT_MCU_SAMD21, OPT_MCU_SAMD51, OPT_MCU_SAME5X) || \ TU_CHECK_MCU(OPT_MCU_SAMD11, OPT_MCU_SAML21, OPT_MCU_SAML22) - #define DCD_ATTR_ENDPOINT_MAX 8 + #define TUP_DCD_ENDPOINT_MAX 8 #elif TU_CHECK_MCU(OPT_MCU_SAMG) - #define DCD_ATTR_ENDPOINT_MAX 6 - #define DCD_ATTR_ENDPOINT_EXCLUSIVE_NUMBER + #define TUP_DCD_ENDPOINT_MAX 6 + #define TUP_DCD_ENDPOINT_EXCLUSIVE_NUMBER #elif TU_CHECK_MCU(OPT_MCU_SAMX7X) - #define DCD_ATTR_ENDPOINT_MAX 10 - #define DCD_ATTR_RHPORT_HIGHSPEED 0x01 - #define DCD_ATTR_ENDPOINT_EXCLUSIVE_NUMBER + #define TUP_DCD_ENDPOINT_MAX 10 + #define TUP_RHPORT_HIGHSPEED 0x01 + #define TUP_DCD_ENDPOINT_EXCLUSIVE_NUMBER #elif TU_CHECK_MCU(OPT_MCU_PIC32MZ) - #define DCD_ATTR_ENDPOINT_MAX 8 - #define DCD_ATTR_ENDPOINT_EXCLUSIVE_NUMBER + #define TUP_DCD_ENDPOINT_MAX 8 + #define TUP_DCD_ENDPOINT_EXCLUSIVE_NUMBER //------------- ST -------------// #elif TU_CHECK_MCU(OPT_MCU_STM32F0) - #define DCD_ATTR_ENDPOINT_MAX 8 + #define TUP_DCD_ENDPOINT_MAX 8 #elif TU_CHECK_MCU(OPT_MCU_STM32F1) #if defined (STM32F105x8) || defined (STM32F105xB) || defined (STM32F105xC) || \ defined (STM32F107xB) || defined (STM32F107xC) - #define DCD_ATTR_ENDPOINT_MAX 4 - #define DCD_ATTR_DWC2_STM32 + #define TUP_USBIP_DWC2 + #define TUP_USBIP_DWC2_STM32 + + #define TUP_DCD_ENDPOINT_MAX 4 #else - #define DCD_ATTR_ENDPOINT_MAX 8 + #define TUP_DCD_ENDPOINT_MAX 8 #endif #elif TU_CHECK_MCU(OPT_MCU_STM32F2) + #define TUP_USBIP_DWC2 + #define TUP_USBIP_DWC2_STM32 + // FS has 4 ep, HS has 5 ep - #define DCD_ATTR_ENDPOINT_MAX 6 - #define DCD_ATTR_DWC2_STM32 + #define TUP_DCD_ENDPOINT_MAX 6 #elif TU_CHECK_MCU(OPT_MCU_STM32F3) - #define DCD_ATTR_ENDPOINT_MAX 8 + #define TUP_DCD_ENDPOINT_MAX 8 #elif TU_CHECK_MCU(OPT_MCU_STM32F4) + #define TUP_USBIP_DWC2 + #define TUP_USBIP_DWC2_STM32 + // For most mcu, FS has 4, HS has 6. TODO 446/469/479 HS has 9 - #define DCD_ATTR_ENDPOINT_MAX 6 - #define DCD_ATTR_DWC2_STM32 + #define TUP_DCD_ENDPOINT_MAX 6 #elif TU_CHECK_MCU(OPT_MCU_STM32F7) + #define TUP_USBIP_DWC2 + #define TUP_USBIP_DWC2_STM32 + // FS has 6, HS has 9 - #define DCD_ATTR_ENDPOINT_MAX 9 - #define DCD_ATTR_DWC2_STM32 + #define TUP_DCD_ENDPOINT_MAX 9 + + // MCU with on-chip HS Phy + #if defined(STM32F723xx) || defined(STM32F730xx) || defined(STM32F733xx) + #define TUP_RHPORT_HIGHSPEED 0x02 // Port 0: FS, Port 1: HS + #endif #elif TU_CHECK_MCU(OPT_MCU_STM32H7) - #define DCD_ATTR_ENDPOINT_MAX 9 - #define DCD_ATTR_DWC2_STM32 + #define TUP_USBIP_DWC2 + #define TUP_USBIP_DWC2_STM32 + + #define TUP_DCD_ENDPOINT_MAX 9 #elif TU_CHECK_MCU(OPT_MCU_STM32G4) - #define DCD_ATTR_ENDPOINT_MAX 8 + #define TUP_DCD_ENDPOINT_MAX 8 #elif TU_CHECK_MCU(OPT_MCU_STM32L0, OPT_MCU_STM32L1) - #define DCD_ATTR_ENDPOINT_MAX 8 + #define TUP_DCD_ENDPOINT_MAX 8 #elif TU_CHECK_MCU(OPT_MCU_STM32L4) #if defined (STM32L475xx) || defined (STM32L476xx) || \ @@ -145,85 +176,92 @@ defined (STM32L4A6xx) || defined (STM32L4P5xx) || defined (STM32L4Q5xx) || \ defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || \ defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) - #define DCD_ATTR_ENDPOINT_MAX 6 - #define DCD_ATTR_DWC2_STM32 + #define TUP_USBIP_DWC2 + #define TUP_USBIP_DWC2_STM32 + + #define TUP_DCD_ENDPOINT_MAX 6 #else - #define DCD_ATTR_ENDPOINT_MAX 8 + #define TUP_DCD_ENDPOINT_MAX 8 #endif //------------- Sony -------------// #elif TU_CHECK_MCU(OPT_MCU_CXD56) - #define DCD_ATTR_ENDPOINT_MAX 7 - #define DCD_ATTR_RHPORT_HIGHSPEED 0x01 - #define DCD_ATTR_ENDPOINT_EXCLUSIVE_NUMBER + #define TUP_DCD_ENDPOINT_MAX 7 + #define TUP_RHPORT_HIGHSPEED 0x01 + #define TUP_DCD_ENDPOINT_EXCLUSIVE_NUMBER //------------- TI -------------// #elif TU_CHECK_MCU(OPT_MCU_MSP430x5xx) - #define DCD_ATTR_ENDPOINT_MAX 8 + #define TUP_DCD_ENDPOINT_MAX 8 #elif TU_CHECK_MCU(OPT_MCU_MSP432E4, OPT_MCU_TM4C123, OPT_MCU_TM4C129) - #define DCD_ATTR_ENDPOINT_MAX 8 + #define TUP_DCD_ENDPOINT_MAX 8 //------------- ValentyUSB -------------// #elif TU_CHECK_MCU(OPT_MCU_VALENTYUSB_EPTRI) - #define DCD_ATTR_ENDPOINT_MAX 16 + #define TUP_DCD_ENDPOINT_MAX 16 //------------- Nuvoton -------------// #elif TU_CHECK_MCU(OPT_MCU_NUC121, OPT_MCU_NUC126) - #define DCD_ATTR_ENDPOINT_MAX 8 + #define TUP_DCD_ENDPOINT_MAX 8 #elif TU_CHECK_MCU(OPT_MCU_NUC120) - #define DCD_ATTR_ENDPOINT_MAX 6 + #define TUP_DCD_ENDPOINT_MAX 6 #elif TU_CHECK_MCU(OPT_MCU_NUC505) - #define DCD_ATTR_ENDPOINT_MAX 12 - #define DCD_ATTR_RHPORT_HIGHSPEED 0x01 + #define TUP_DCD_ENDPOINT_MAX 12 + #define TUP_RHPORT_HIGHSPEED 0x01 //------------- Espressif -------------// #elif TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3) - #define DCD_ATTR_ENDPOINT_MAX 6 + #define TUP_USBIP_DWC2 + #define TUP_DCD_ENDPOINT_MAX 6 //------------- Dialog -------------// #elif TU_CHECK_MCU(OPT_MCU_DA1469X) - #define DCD_ATTR_ENDPOINT_MAX 4 + #define TUP_DCD_ENDPOINT_MAX 4 //------------- Raspberry Pi -------------// #elif TU_CHECK_MCU(OPT_MCU_RP2040) - #define DCD_ATTR_ENDPOINT_MAX 16 + #define TUP_DCD_ENDPOINT_MAX 16 //------------- Silabs -------------// #elif TU_CHECK_MCU(OPT_MCU_EFM32GG) - #define DCD_ATTR_ENDPOINT_MAX 7 + #define TUP_USBIP_DWC2 + #define TUP_DCD_ENDPOINT_MAX 7 //------------- Renesas -------------// #elif TU_CHECK_MCU(OPT_MCU_RX63X, OPT_MCU_RX65X, OPT_MCU_RX72N) - #define DCD_ATTR_ENDPOINT_MAX 10 + #define TUP_DCD_ENDPOINT_MAX 10 //------------- GigaDevice -------------// #elif TU_CHECK_MCU(OPT_MCU_GD32VF103) - #define DCD_ATTR_ENDPOINT_MAX 4 + #define TUP_USBIP_DWC2 + #define TUP_DCD_ENDPOINT_MAX 4 //------------- Broadcom -------------// #elif TU_CHECK_MCU(OPT_MCU_BCM2711, OPT_MCU_BCM2835, OPT_MCU_BCM2837) - #define DCD_ATTR_ENDPOINT_MAX 8 - #define DCD_ATTR_RHPORT_HIGHSPEED 0x01 + #define TUP_USBIP_DWC2 + #define TUP_DCD_ENDPOINT_MAX 8 + #define TUP_RHPORT_HIGHSPEED 0x01 //------------- Broadcom -------------// #elif TU_CHECK_MCU(OPT_MCU_XMC4000) - #define DCD_ATTR_ENDPOINT_MAX 8 + #define TUP_USBIP_DWC2 + #define TUP_DCD_ENDPOINT_MAX 8 //------------- BridgeTek -------------// #elif TU_CHECK_MCU(OPT_MCU_FT90X) - #define DCD_ATTR_ENDPOINT_MAX 8 - #define DCD_ATTR_RHPORT_HIGHSPEED 0x01 + #define TUP_DCD_ENDPOINT_MAX 8 + #define TUP_RHPORT_HIGHSPEED 0x01 #elif TU_CHECK_MCU(OPT_MCU_FT93X) - #define DCD_ATTR_ENDPOINT_MAX 16 - #define DCD_ATTR_RHPORT_HIGHSPEED 0x01 + #define TUP_DCD_ENDPOINT_MAX 16 + #define TUP_RHPORT_HIGHSPEED 0x01 //------------ Allwinner -------------// #elif TU_CHECK_MCU(OPT_MCU_F1C100S) - #define DCD_ATTR_ENDPOINT_MAX 4 + #define TUP_DCD_ENDPOINT_MAX 4 #endif @@ -231,14 +269,14 @@ // Default Values //--------------------------------------------------------------------+ -#ifndef DCD_ATTR_ENDPOINT_MAX - #warning "DCD_ATTR_ENDPOINT_MAX is not defined for this MCU, default to 8" - #define DCD_ATTR_ENDPOINT_MAX 8 +#ifndef TUP_DCD_ENDPOINT_MAX + #warning "TUP_DCD_ENDPOINT_MAX is not defined for this MCU, default to 8" + #define TUP_DCD_ENDPOINT_MAX 8 #endif // Default to fullspeed if not defined -#ifndef DCD_ATTR_RHPORT_HIGHSPEED - #define DCD_ATTR_RHPORT_HIGHSPEED 0x00 +#ifndef TUP_RHPORT_HIGHSPEED + #define TUP_RHPORT_HIGHSPEED 0x00 #endif #endif diff --git a/src/device/dcd.h b/src/device/dcd.h index 4e725c95a..8efbc90ef 100644 --- a/src/device/dcd.h +++ b/src/device/dcd.h @@ -40,7 +40,7 @@ //--------------------------------------------------------------------+ #ifndef CFG_TUD_ENDPPOINT_MAX - #define CFG_TUD_ENDPPOINT_MAX DCD_ATTR_ENDPOINT_MAX + #define CFG_TUD_ENDPPOINT_MAX TUP_DCD_ENDPOINT_MAX #endif //--------------------------------------------------------------------+ diff --git a/src/portable/chipidea/ci_hs/dcd_ci_hs.c b/src/portable/chipidea/ci_hs/dcd_ci_hs.c index 21087681c..32c2fc029 100644 --- a/src/portable/chipidea/ci_hs/dcd_ci_hs.c +++ b/src/portable/chipidea/ci_hs/dcd_ci_hs.c @@ -26,7 +26,7 @@ #include "tusb_option.h" -#if CFG_TUD_ENABLED && defined(MCU_ATTR_CONTROLLER_CHIPIDEA_HS) +#if CFG_TUD_ENABLED && defined(TUP_USBIP_CHIPIDEA_HS) //--------------------------------------------------------------------+ // INCLUDE @@ -151,8 +151,8 @@ typedef struct { // Must be at 2K alignment // Each endpoint with direction (IN/OUT) occupies a queue head // for portability, TinyUSB only queue 1 TD for each Qhd - dcd_qhd_t qhd[DCD_ATTR_ENDPOINT_MAX][2] TU_ATTR_ALIGNED(64); - dcd_qtd_t qtd[DCD_ATTR_ENDPOINT_MAX][2] TU_ATTR_ALIGNED(32); + dcd_qhd_t qhd[TUP_DCD_ENDPOINT_MAX][2] TU_ATTR_ALIGNED(64); + dcd_qtd_t qtd[TUP_DCD_ENDPOINT_MAX][2] TU_ATTR_ALIGNED(32); }dcd_data_t; CFG_TUSB_MEM_SECTION TU_ATTR_ALIGNED(2048) @@ -619,7 +619,7 @@ void dcd_int_handler(uint8_t rhport) if ( edpt_complete ) { - for(uint8_t epnum = 0; epnum < DCD_ATTR_ENDPOINT_MAX; epnum++) + for(uint8_t epnum = 0; epnum < TUP_DCD_ENDPOINT_MAX; epnum++) { if ( tu_bit_test(edpt_complete, epnum) ) process_edpt_complete_isr(rhport, epnum, TUSB_DIR_OUT); if ( tu_bit_test(edpt_complete, epnum+16) ) process_edpt_complete_isr(rhport, epnum, TUSB_DIR_IN); diff --git a/src/portable/ehci/ehci.c b/src/portable/ehci/ehci.c index ae62144b6..e2d51dc4b 100644 --- a/src/portable/ehci/ehci.c +++ b/src/portable/ehci/ehci.c @@ -26,7 +26,7 @@ #include "tusb_option.h" -#if CFG_TUH_ENABLED && defined(HCD_ATTR_EHCI) +#if CFG_TUH_ENABLED && defined(TUP_USBIP_EHCI) //--------------------------------------------------------------------+ // INCLUDE @@ -45,7 +45,7 @@ #define EHCI_DBG 2 // Framelist size as small as possible to save SRAM -#ifdef MCU_ATTR_CONTROLLER_CHIPIDEA_HS +#ifdef TUP_USBIP_CHIPIDEA_HS // NXP Transdimension: 8 elements #define FRAMELIST_SIZE_BIT_VALUE 7u #define FRAMELIST_SIZE_USBCMD_VALUE (((FRAMELIST_SIZE_BIT_VALUE & 3) << EHCI_USBCMD_POS_FRAMELIST_SIZE) | \ diff --git a/src/portable/mentor/musb/dcd_musb.c b/src/portable/mentor/musb/dcd_musb.c index 71414e737..d36585592 100644 --- a/src/portable/mentor/musb/dcd_musb.c +++ b/src/portable/mentor/musb/dcd_musb.c @@ -170,13 +170,13 @@ static inline void print_block_list(free_block_t const *blk, unsigned num) static unsigned find_free_memory(uint_fast16_t size_in_log2_minus3) { - free_block_t free_blocks[2 * (DCD_ATTR_ENDPOINT_MAX - 1)]; + free_block_t free_blocks[2 * (TUP_DCD_ENDPOINT_MAX - 1)]; unsigned num_blocks = 1; /* Initialize free memory block list */ free_blocks[0].beg = 64 / 8; free_blocks[0].end = (4 << 10) / 8; /* 4KiB / 8 bytes */ - for (int i = 1; i < DCD_ATTR_ENDPOINT_MAX; ++i) { + for (int i = 1; i < TUP_DCD_ENDPOINT_MAX; ++i) { uint_fast16_t addr; int num; USB0->EPIDX = i; @@ -575,7 +575,7 @@ static void process_bus_reset(uint8_t rhport) USB0->RXIE = 0; /* Clear FIFO settings */ - for (unsigned i = 1; i < DCD_ATTR_ENDPOINT_MAX; ++i) { + for (unsigned i = 1; i < TUP_DCD_ENDPOINT_MAX; ++i) { USB0->EPIDX = i; USB0->TXFIFOSZ = 0; USB0->TXFIFOADD = 0; @@ -663,7 +663,7 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc) const unsigned xfer = ep_desc->bmAttributes.xfer; const unsigned mps = tu_edpt_packet_size(ep_desc); - TU_ASSERT(epn < DCD_ATTR_ENDPOINT_MAX); + TU_ASSERT(epn < TUP_DCD_ENDPOINT_MAX); pipe_state_t *pipe = &_dcd.pipe[dir_in][epn - 1]; pipe->buf = NULL; @@ -715,7 +715,7 @@ void dcd_edpt_close_all(uint8_t rhport) NVIC_DisableIRQ(USB0_IRQn); USB0->TXIE = 1; /* Enable only EP0 */ USB0->RXIE = 0; - for (unsigned i = 1; i < DCD_ATTR_ENDPOINT_MAX; ++i) { + for (unsigned i = 1; i < TUP_DCD_ENDPOINT_MAX; ++i) { regs->TXMAXP = 0; regs->TXCSRH = 0; if (regs->TXCSRL & USB_TXCSRL1_TXRDY) diff --git a/src/portable/nxp/transdimension/dcd_transdimension.c b/src/portable/nxp/transdimension/dcd_transdimension.c index 9f5979ab4..108baf99d 100644 --- a/src/portable/nxp/transdimension/dcd_transdimension.c +++ b/src/portable/nxp/transdimension/dcd_transdimension.c @@ -179,8 +179,8 @@ typedef struct { // Must be at 2K alignment // Each endpoint with direction (IN/OUT) occupies a queue head // for portability, TinyUSB only queue 1 TD for each Qhd - dcd_qhd_t qhd[DCD_ATTR_ENDPOINT_MAX][2] TU_ATTR_ALIGNED(64); - dcd_qtd_t qtd[DCD_ATTR_ENDPOINT_MAX][2] TU_ATTR_ALIGNED(32); + dcd_qhd_t qhd[TUP_DCD_ENDPOINT_MAX][2] TU_ATTR_ALIGNED(64); + dcd_qtd_t qtd[TUP_DCD_ENDPOINT_MAX][2] TU_ATTR_ALIGNED(32); }dcd_data_t; CFG_TUSB_MEM_SECTION TU_ATTR_ALIGNED(2048) @@ -647,7 +647,7 @@ void dcd_int_handler(uint8_t rhport) if ( edpt_complete ) { - for(uint8_t epnum = 0; epnum < DCD_ATTR_ENDPOINT_MAX; epnum++) + for(uint8_t epnum = 0; epnum < TUP_DCD_ENDPOINT_MAX; epnum++) { if ( tu_bit_test(edpt_complete, epnum) ) process_edpt_complete_isr(rhport, epnum, TUSB_DIR_OUT); if ( tu_bit_test(edpt_complete, epnum+16) ) process_edpt_complete_isr(rhport, epnum, TUSB_DIR_IN); diff --git a/src/portable/ohci/ohci.c b/src/portable/ohci/ohci.c index c9e1061f9..cb4e6dc4a 100644 --- a/src/portable/ohci/ohci.c +++ b/src/portable/ohci/ohci.c @@ -26,7 +26,7 @@ #include "tusb_option.h" -#if CFG_TUH_ENABLED && defined(HCD_ATTR_OHCI) +#if CFG_TUH_ENABLED && defined(TUP_USBIP_OHCI) //--------------------------------------------------------------------+ // INCLUDE diff --git a/src/portable/sunxi/dcd_sunxi_musb.c b/src/portable/sunxi/dcd_sunxi_musb.c index 447069f88..27514339b 100644 --- a/src/portable/sunxi/dcd_sunxi_musb.c +++ b/src/portable/sunxi/dcd_sunxi_musb.c @@ -426,7 +426,7 @@ static inline void print_block_list(free_block_t const *blk, unsigned num) static unsigned find_free_memory(uint_fast16_t size_in_log2_minus3) { - free_block_t free_blocks[2 * (DCD_ATTR_ENDPOINT_MAX - 1)]; + free_block_t free_blocks[2 * (TUP_DCD_ENDPOINT_MAX - 1)]; unsigned num_blocks = 1; /* Backup current EP to restore later */ u8 backup_ep = USBC_GetActiveEp(); @@ -434,7 +434,7 @@ static unsigned find_free_memory(uint_fast16_t size_in_log2_minus3) /* Initialize free memory block list */ free_blocks[0].beg = 64 / 8; free_blocks[0].end = (USB_FIFO_SIZE_KB << 10) / 8; /* 2KiB / 8 bytes */ - for (int i = 1; i < DCD_ATTR_ENDPOINT_MAX; ++i) { + for (int i = 1; i < TUP_DCD_ENDPOINT_MAX; ++i) { uint_fast16_t addr; int num; USBC_SelectActiveEp(i); @@ -974,7 +974,7 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc) const unsigned xfer = ep_desc->bmAttributes.xfer; const unsigned mps = tu_edpt_packet_size(ep_desc); - TU_ASSERT(epn < DCD_ATTR_ENDPOINT_MAX); + TU_ASSERT(epn < TUP_DCD_ENDPOINT_MAX); pipe_state_t *pipe = &_dcd.pipe[dir_in][epn - 1]; pipe->buf = NULL; @@ -1033,7 +1033,7 @@ void dcd_edpt_close_all(uint8_t rhport) musb_int_mask(); USBC_Writew(1, USBC_REG_INTTxE(USBC0_BASE)); /* Enable only EP0 */ USBC_Writew(0, USBC_REG_INTRxE(USBC0_BASE)); - for (unsigned i = 1; i < DCD_ATTR_ENDPOINT_MAX; ++i) { + for (unsigned i = 1; i < TUP_DCD_ENDPOINT_MAX; ++i) { USBC_SelectActiveEp(i); USBC_Writew(0, USBC_REG_TXMAXP(USBC0_BASE)); USBC_Writew((1 << USBC_BP_TXCSR_D_MODE) | (1 << USBC_BP_TXCSR_D_CLEAR_DATA_TOGGLE) | (1 << USBC_BP_TXCSR_D_FLUSH_FIFO), diff --git a/src/portable/synopsys/dwc2/dcd_dwc2.c b/src/portable/synopsys/dwc2/dcd_dwc2.c index ecbc36fb9..c71f38d2d 100644 --- a/src/portable/synopsys/dwc2/dcd_dwc2.c +++ b/src/portable/synopsys/dwc2/dcd_dwc2.c @@ -29,16 +29,12 @@ #include "tusb_option.h" -#if CFG_TUD_ENABLED && \ - ( defined(DCD_ATTR_DWC2_STM32) || \ - TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3, OPT_MCU_GD32VF103) || \ - TU_CHECK_MCU(OPT_MCU_EFM32GG, OPT_MCU_BCM2711, OPT_MCU_BCM2835) || \ - TU_CHECK_MCU(OPT_MCU_BCM2837, OPT_MCU_XMC4000) ) +#if CFG_TUD_ENABLED && defined(TUP_USBIP_DWC2) #include "device/dcd.h" #include "dwc2_type.h" -#if defined(DCD_ATTR_DWC2_STM32) +#if defined(TUP_USBIP_DWC2_STM32) #include "dwc2_stm32.h" #elif TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3) #include "dwc2_esp32.h" diff --git a/src/tusb_option.h b/src/tusb_option.h index 5cc362f1a..25e536787 100644 --- a/src/tusb_option.h +++ b/src/tusb_option.h @@ -172,7 +172,7 @@ #include "tusb_config.h" #endif -#include "common/tusb_mcu_attr.h" +#include "common/tusb_mcu.h" //-------------------------------------------------------------------- // RootHub Mode Configuration @@ -218,7 +218,7 @@ #endif #define CFG_TUD_ENABLED ( TUD_RHPORT_MODE & OPT_MODE_DEVICE ) -#define TUD_OPT_HIGH_SPEED ( (TUD_RHPORT_MODE & OPT_MODE_SPEED_MASK) ? (TUD_RHPORT_MODE & OPT_MODE_HIGH_SPEED) : (DCD_ATTR_RHPORT_HIGHSPEED & (1 << TUD_OPT_RHPORT)) ) +#define TUD_OPT_HIGH_SPEED ( (TUD_RHPORT_MODE & OPT_MODE_SPEED_MASK) ? (TUD_RHPORT_MODE & OPT_MODE_HIGH_SPEED) : (TUP_RHPORT_HIGHSPEED & (1 << TUD_OPT_RHPORT)) ) //------------- Roothub as Host -------------// @@ -239,6 +239,18 @@ #define TUSB_OPT_DEVICE_ENABLED CFG_TUD_ENABLED #define TUSB_OPT_HOST_ENABLED CFG_TUH_ENABLED +// TODO move later +// TUP_MCU_STRICT_ALIGN will overwrite TUP_ARCH_STRICT_ALIGN. +// In case TUP_MCU_STRICT_ALIGN = 1 and TUP_ARCH_STRICT_ALIGN =0, we will not reply on compiler +// to generate unaligned access code. +// LPC_IP3511 Highspeed cannot access unaligned memory on USB_RAM +#if TUD_OPT_HIGH_SPEED && (CFG_TUSB_MCU == OPT_MCU_LPC54XXX || CFG_TUSB_MCU == OPT_MCU_LPC55XX) + #define TUP_MCU_STRICT_ALIGN 1 +#else + #define TUP_MCU_STRICT_ALIGN 0 +#endif + + //--------------------------------------------------------------------+ // COMMON OPTIONS //--------------------------------------------------------------------+ @@ -371,31 +383,6 @@ #define CFG_TUH_VENDOR 0 #endif -//--------------------------------------------------------------------+ -// Port Specific -// TUP stand for TinyUSB Port (can be renamed) -//--------------------------------------------------------------------+ - -//------------- Unaligned Memory -------------// - -// ARMv7+ (M3-M7, M23-M33) can access unaligned memory -#if (defined(__ARM_ARCH) && (__ARM_ARCH >= 7)) - #define TUP_ARCH_STRICT_ALIGN 0 -#else - #define TUP_ARCH_STRICT_ALIGN 1 -#endif - -// TUP_MCU_STRICT_ALIGN will overwrite TUP_ARCH_STRICT_ALIGN. -// In case TUP_MCU_STRICT_ALIGN = 1 and TUP_ARCH_STRICT_ALIGN =0, we will not reply on compiler -// to generate unaligned access code. -// LPC_IP3511 Highspeed cannot access unaligned memory on USB_RAM -#if TUD_OPT_HIGH_SPEED && (CFG_TUSB_MCU == OPT_MCU_LPC54XXX || CFG_TUSB_MCU == OPT_MCU_LPC55XX) - #define TUP_MCU_STRICT_ALIGN 1 -#else - #define TUP_MCU_STRICT_ALIGN 0 -#endif - - //------------------------------------------------------------------ // Configuration Validation //------------------------------------------------------------------