From b3fda4a35433a4102743ea9719e2323e4076ff34 Mon Sep 17 00:00:00 2001 From: hathach Date: Tue, 6 Jun 2023 23:55:33 +0700 Subject: [PATCH] able to get usbpd irq handler - handle cc1, cc2 voltage changes - get order set, rx message end interrupt - add segger rtt support for cmake --- hw/bsp/family_support.cmake | 15 ++ hw/bsp/stm32g4/boards/b_g474e_dpow1/board.h | 22 +-- hw/bsp/stm32g4/family.c | 183 +++++++++++++++++--- src/common/tusb_types.h | 13 ++ 4 files changed, 196 insertions(+), 37 deletions(-) diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake index 2c0ee95d6..e9b4f2fdb 100644 --- a/hw/bsp/family_support.cmake +++ b/hw/bsp/family_support.cmake @@ -97,6 +97,18 @@ function(family_initialize_project PROJECT DIR) endfunction() +# Add segger rtt to example +function(family_add_segger_rtt TARGET) + if (NOT TARGET segger_rtt) + add_library(segger_rtt STATIC + ${TOP}/lib/SEGGER_RTT/RTT/SEGGER_RTT.c + ) + target_include_directories(segger_rtt PUBLIC ${TOP}/lib/SEGGER_RTT/RTT) + endif() + + target_link_libraries(${TARGET} PUBLIC segger_rtt) +endfunction() + #------------------------------------ # Main target configure #------------------------------------ @@ -119,6 +131,9 @@ function(family_configure_common TARGET) # LOGGER if (DEFINED LOGGER) target_compile_definitions(${TARGET} PUBLIC LOGGER_${LOGGER}) + if(LOGGER STREQUAL "RTT" OR LOGGER STREQUAL "rtt") + family_add_segger_rtt(${TARGET}) + endif () endif () endfunction() diff --git a/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.h b/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.h index 21d4e459b..b1a98ba97 100644 --- a/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.h +++ b/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.h @@ -58,7 +58,7 @@ // RCC Clock //--------------------------------------------------------------------+ -// CPU Frequency (Core Clock) is 170MHz +// CPU Frequency (Core Clock) is 150MHz static inline void board_clock_init(void) { RCC_OscInitTypeDef RCC_OscInitStruct = {0}; @@ -68,16 +68,16 @@ static inline void board_clock_init(void) HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST); /* Activate PLL with HSI as source */ - RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; + RCC_OscInitStruct.HSIState = RCC_HSI_ON; RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; - RCC_OscInitStruct.HSIState = RCC_HSI_ON; - RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; - RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; - RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4; - RCC_OscInitStruct.PLL.PLLN = 85; - RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV10; - RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2; - RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; + RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4; + RCC_OscInitStruct.PLL.PLLN = 75; + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; + RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV4; + RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2; HAL_RCC_OscConfig(&RCC_OscInitStruct); // Initializes the CPU, AHB and APB buses clocks @@ -87,7 +87,7 @@ static inline void board_clock_init(void) RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; - HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_8); + HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4); //------------- HSI48 and CRS for USB -------------// RCC_OscInitTypeDef osc_hsi48 = {0}; diff --git a/hw/bsp/stm32g4/family.c b/hw/bsp/stm32g4/family.c index 030abe0d0..8b17c0643 100644 --- a/hw/bsp/stm32g4/family.c +++ b/hw/bsp/stm32g4/family.c @@ -25,9 +25,127 @@ */ #include "stm32g4xx_hal.h" +#include "stm32g4xx_ll_bus.h" + #include "bsp/board.h" #include "board.h" + +//--------------------------------------------------------------------+ +// USB PD +//--------------------------------------------------------------------+ + +void usbpd_init(uint8_t port_num, tusb_typec_port_type_t port_type) { + (void) port_num; + + // Initialization phase: CFG1 + UCPD1->CFG1 = (0x0d << UCPD_CFG1_HBITCLKDIV_Pos) | (0x10 << UCPD_CFG1_IFRGAP_Pos) | (0x07 << UCPD_CFG1_TRANSWIN_Pos) | + (0x01 << UCPD_CFG1_PSC_UCPDCLK_Pos) | (0x1f << UCPD_CFG1_RXORDSETEN_Pos) | + ( 0 << UCPD_CFG1_TXDMAEN_Pos) | (0 << UCPD_CFG1_RXDMAEN_Pos); + UCPD1->CFG1 |= UCPD_CFG1_UCPDEN; + + // General programming sequence (with UCPD configured then enabled) + if (port_type == TUSB_TYPEC_PORT_SNK) { + // Enable both CC Phy + UCPD1->CR = (0x01 << UCPD_CR_ANAMODE_Pos) | (0x03 << UCPD_CR_CCENABLE_Pos); + + // Read Voltage State on CC1 & CC2 fore initial state + uint32_t vstate_cc[2]; + vstate_cc[0] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC1_Pos) & 0x03; + vstate_cc[1] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC2_Pos) & 0x03; + + TU_LOG1_INT(vstate_cc[0]); + TU_LOG1_INT(vstate_cc[1]); + + // Enable CC1 & CC2 Interrupt + UCPD1->IMR = UCPD_IMR_TYPECEVT1IE | UCPD_IMR_TYPECEVT2IE; + } + + // Enable interrupt + //NVIC_SetPriority(UCPD1_IRQn, 0); +// NVIC_EnableIRQ(UCPD1_IRQn); +} + +uint8_t pd_rx_buf[262]; +uint32_t pd_rx_count = 0; + +void UCPD1_IRQHandler(void) { + uint32_t sr = UCPD1->SR; + sr &= UCPD1->IMR; + + TU_LOG1("UCPD1_IRQHandler: sr = 0x%08X\n", sr); + + if (sr & (UCPD_SR_TYPECEVT1 | UCPD_SR_TYPECEVT2)) { + uint32_t vstate_cc[2]; + vstate_cc[0] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC1_Pos) & 0x03; + vstate_cc[1] = (UCPD1->SR >> UCPD_SR_TYPEC_VSTATE_CC2_Pos) & 0x03; + + TU_LOG1("VState CC1 = %u, CC2 = %u\n", vstate_cc[0], vstate_cc[1]); + + uint32_t cr = UCPD1->CR; + + if ((sr & UCPD_SR_TYPECEVT1) && (vstate_cc[0] == 3)) { + TU_LOG1("Attach CC1\n"); + cr &= ~UCPD_CR_PHYCCSEL; + cr |= UCPD_CR_PHYRXEN; + } else if ((sr & UCPD_SR_TYPECEVT2) && (vstate_cc[1] == 3)) { + TU_LOG1("Attach CC2\n"); + cr |= UCPD_CR_PHYCCSEL; + cr |= UCPD_CR_PHYRXEN; + } else { + TU_LOG1("Detach\n"); + cr &= ~UCPD_CR_PHYRXEN; + } + + // Enable Interrupt + UCPD1->IMR |= UCPD_IMR_TXMSGDISCIE | UCPD_IMR_TXMSGSENTIE | UCPD_IMR_TXMSGABTIE | UCPD_IMR_TXUNDIE | + /*UCPD_IMR_RXNEIE |*/ UCPD_IMR_RXORDDETIE | UCPD_IMR_RXHRSTDETIE | UCPD_IMR_RXOVRIE | UCPD_IMR_RXMSGENDIE | + UCPD_IMR_HRSTDISCIE | UCPD_IMR_HRSTSENTIE; + + // Enable PD RX + UCPD1->CR = cr; + + // ack + UCPD1->ICR = UCPD_ICR_TYPECEVT1CF | UCPD_ICR_TYPECEVT2CF; + } + + if (sr & UCPD_SR_RXORDDET) { + // SOP: Start of Packet + // TODO DMA later + uint8_t order_set = UCPD1->RX_ORDSET & UCPD_RX_ORDSET_RXORDSET_Msk; + TU_LOG1_HEX(order_set); + + // ack + UCPD1->ICR = UCPD_ICR_RXORDDETCF; + } + + if ( sr & UCPD_SR_RXMSGEND) { + // End of message +// uint32_t payload_size = UCPD1->RX_PAYSZ; +// TU_LOG1_HEX(payload_size); +// +// for(uint32_t i=0; iRXDR; +// +// TU_LOG1("0x%02X ", pd_rx_buf[i]); +// } +// TU_LOG1("\n"); + + // ack + UCPD1->ICR = UCPD_ICR_RXMSGENDCF; + } + +// if (sr & UCPD_SR_RXNE) { +// uint8_t data = UCPD1->RXDR; +// pd_rx_buf[pd_rx_count++] = data; +// TU_LOG1_HEX(data); +// } + +// else { +// TU_LOG_LOCATION(); +// } +} + //--------------------------------------------------------------------+ // Forward USB interrupt events to TinyUSB IRQ Handler //--------------------------------------------------------------------+ @@ -79,35 +197,35 @@ void board_init(void) NVIC_SetPriority(USBWakeUp_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY); #endif - GPIO_InitTypeDef gpio_init; + GPIO_InitTypeDef GPIO_InitStruct; // LED - memset(&gpio_init, 0, sizeof(gpio_init)); - gpio_init.Pin = LED_PIN; - gpio_init.Mode = GPIO_MODE_OUTPUT_PP; - gpio_init.Pull = GPIO_PULLUP; - gpio_init.Speed = GPIO_SPEED_FREQ_HIGH; - HAL_GPIO_Init(LED_PORT, &gpio_init); + memset(&GPIO_InitStruct, 0, sizeof(GPIO_InitStruct)); + GPIO_InitStruct.Pin = LED_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; + HAL_GPIO_Init(LED_PORT, &GPIO_InitStruct); board_led_write(false); // Button - memset(&gpio_init, 0, sizeof(gpio_init)); - gpio_init.Pin = BUTTON_PIN; - gpio_init.Mode = GPIO_MODE_INPUT; - gpio_init.Pull = BUTTON_STATE_ACTIVE ? GPIO_PULLDOWN : GPIO_PULLUP; - gpio_init.Speed = GPIO_SPEED_FREQ_HIGH; - HAL_GPIO_Init(BUTTON_PORT, &gpio_init); + memset(&GPIO_InitStruct, 0, sizeof(GPIO_InitStruct)); + GPIO_InitStruct.Pin = BUTTON_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_INPUT; + GPIO_InitStruct.Pull = BUTTON_STATE_ACTIVE ? GPIO_PULLDOWN : GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; + HAL_GPIO_Init(BUTTON_PORT, &GPIO_InitStruct); #ifdef UART_DEV // UART - memset(&gpio_init, 0, sizeof(gpio_init)); - gpio_init.Pin = UART_TX_PIN | UART_RX_PIN; - gpio_init.Mode = GPIO_MODE_AF_PP; - gpio_init.Pull = GPIO_PULLUP; - gpio_init.Speed = GPIO_SPEED_FREQ_HIGH; - gpio_init.Alternate = UART_GPIO_AF; - HAL_GPIO_Init(UART_GPIO_PORT, &gpio_init); + memset(&GPIO_InitStruct, 0, sizeof(GPIO_InitStruct)); + GPIO_InitStruct.Pin = UART_TX_PIN | UART_RX_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; + GPIO_InitStruct.Alternate = UART_GPIO_AF; + HAL_GPIO_Init(UART_GPIO_PORT, &GPIO_InitStruct); UartHandle = (UART_HandleTypeDef){ .Instance = UART_DEV, @@ -124,18 +242,31 @@ void board_init(void) // USB Pins TODO double check USB clock and pin setup // Configure USB DM and DP pins. This is optional, and maintained only for user guidance. - memset(&gpio_init, 0, sizeof(gpio_init)); - gpio_init.Pin = (GPIO_PIN_11 | GPIO_PIN_12); - gpio_init.Mode = GPIO_MODE_INPUT; - gpio_init.Pull = GPIO_NOPULL; - gpio_init.Speed = GPIO_SPEED_FREQ_HIGH; - HAL_GPIO_Init(GPIOA, &gpio_init); + memset(&GPIO_InitStruct, 0, sizeof(GPIO_InitStruct)); + GPIO_InitStruct.Pin = (GPIO_PIN_11 | GPIO_PIN_12); + GPIO_InitStruct.Mode = GPIO_MODE_INPUT; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); __HAL_RCC_USB_CLK_ENABLE(); board_vbus_sense_init(); +#if 0 // USB PD + /* PWR register access (for disabling dead battery feature) */ + LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_PWR); + LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_CRC); + + __HAL_RCC_UCPD1_CLK_ENABLE(); + + // Default CC1/CC2 is PB4/PB6 + // PB4 ------> UCPD1_CC2 + // PB6 ------> UCPD1_CC1 + + usbpd_init(0, TUSB_TYPEC_PORT_SNK); +#endif } diff --git a/src/common/tusb_types.h b/src/common/tusb_types.h index 39a2d4564..7b82c51d9 100644 --- a/src/common/tusb_types.h +++ b/src/common/tusb_types.h @@ -232,6 +232,19 @@ enum { #define TUSB_DESC_CONFIG_POWER_MA(x) ((x)/2) +//--------------------------------------------------------------------+ +// TYPE-C +//--------------------------------------------------------------------+ + +typedef enum { + TUSB_TYPEC_PORT_SRC, + TUSB_TYPEC_PORT_SNK, + TUSB_TYPEC_PORT_DRP +} tusb_typec_port_type_t; + +//--------------------------------------------------------------------+ +// +//--------------------------------------------------------------------+ typedef enum { XFER_RESULT_SUCCESS = 0,