diff --git a/hw/mcu/nxp/lpc43xx/usb/hal_lpc43xx.c b/hw/mcu/nxp/lpc43xx/usb/hal_lpc43xx.c
index a36e88625..0199934fa 100644
--- a/hw/mcu/nxp/lpc43xx/usb/hal_lpc43xx.c
+++ b/hw/mcu/nxp/lpc43xx/usb/hal_lpc43xx.c
@@ -55,7 +55,18 @@ enum {
   LPC43XX_USBMODE_VBUS_HIGH = 1
 };
 
-static tusb_error_t hal_controller_reset(uint8_t coreid)
+void hal_usb_int_enable(uint8_t coreid)
+{
+  NVIC_EnableIRQ(coreid ? USB1_IRQn : USB0_IRQn);
+}
+
+void hal_usb_int_disable(uint8_t coreid)
+{
+  NVIC_DisableIRQ(coreid ? USB1_IRQn : USB0_IRQn);
+}
+
+
+static void hal_controller_reset(uint8_t coreid)
 { // TODO timeout expired to prevent trap
   volatile uint32_t * p_reg_usbcmd;
 
@@ -68,32 +79,21 @@ static tusb_error_t hal_controller_reset(uint8_t coreid)
   while( ((*p_reg_usbcmd) & BIT_(1)) /*&& !timeout_expired(&timeout)*/) {}
 //
 //  return timeout_expired(&timeout) ? TUSB_ERROR_OSAL_TIMEOUT : TUSB_ERROR_NONE;
-  return TUSB_ERROR_NONE;
 }
 
-void hal_usb_int_enable(uint8_t coreid)
-{
-  NVIC_EnableIRQ(coreid ? USB1_IRQn : USB0_IRQn);
-}
-
-void hal_usb_int_disable(uint8_t coreid)
-{
-  NVIC_DisableIRQ(coreid ? USB1_IRQn : USB0_IRQn);
-}
-
-tusb_error_t hal_init(void)
+bool hal_init(void)
 {
   LPC_CREG->CREG0 &= ~(1<<5); /* Turn on the phy */
 
   //------------- USB0 -------------//
 #if TUSB_CFG_CONTROLLER_0_MODE
   CGU_EnableEntity(CGU_CLKSRC_PLL0, DISABLE); /* Disable PLL first */
-  ASSERT_INT( CGU_ERROR_SUCCESS, CGU_SetPLL0(), TUSB_ERROR_FAILED); /* the usb core require output clock = 480MHz */
+  VERIFY( CGU_ERROR_SUCCESS == CGU_SetPLL0()); /* the usb core require output clock = 480MHz */
   CGU_EntityConnect(CGU_CLKSRC_XTAL_OSC, CGU_CLKSRC_PLL0);
   CGU_EnableEntity(CGU_CLKSRC_PLL0, ENABLE);   /* Enable PLL after all setting is done */
 
   // reset controller & set role
-  ASSERT_STATUS( hal_controller_reset(0) );
+  hal_controller_reset(0);
 
   #if TUSB_CFG_CONTROLLER_0_MODE & TUSB_MODE_HOST
     LPC_USB0->USBMODE_H = LPC43XX_USBMODE_HOST | (LPC43XX_USBMODE_VBUS_HIGH << 5);
@@ -115,7 +115,7 @@ tusb_error_t hal_init(void)
   CGU_EntityConnect(CGU_CLKSRC_PLL1, CGU_BASE_USB1); /* FIXME Run base BASE_USB1_CLK clock from PLL1 (assume PLL1 is 60 MHz, no division required) */
   LPC_SCU->SFSUSB = (TUSB_CFG_CONTROLLER_1_MODE & TUSB_MODE_HOST) ? 0x16 : 0x12; // enable USB1 with on-chip FS PHY
 
-  ASSERT_STATUS( hal_controller_reset(1) );
+  hal_controller_reset(1);
 
   #if TUSB_CFG_CONTROLLER_1_MODE & TUSB_MODE_HOST
     LPC_USB1->USBMODE_H = LPC43XX_USBMODE_HOST | (LPC43XX_USBMODE_VBUS_HIGH << 5);
@@ -126,7 +126,7 @@ tusb_error_t hal_init(void)
   LPC_USB1->PORTSC1_D |= (1<<24); // TODO abstract, force port to fullspeed
 #endif
 
-  return TUSB_ERROR_NONE;
+  return true;
 }
 
 #if TUSB_CFG_CONTROLLER_0_MODE
diff --git a/tinyusb/hal/hal.h b/tinyusb/hal/hal.h
index f395c6d23..696c5d423 100644
--- a/tinyusb/hal/hal.h
+++ b/tinyusb/hal/hal.h
@@ -64,10 +64,10 @@ void tusb_isr(uint8_t coreid);
  *  @{ */
 
 /** \brief    Initialize USB controller hardware
- * \returns   \ref tusb_error_t type to indicate success or error condition.
+ * \returns   true if succeedded
  * \note      This function is invoked by \ref tusb_init as part of the initialization.
  */
-tusb_error_t hal_init(void);
+bool hal_init(void);
 
 /** \brief 			Enable USB Interrupt on a specific USB Controller
  * \param[in]		coreid	is a zero-based index to identify USB controller's ID
diff --git a/tinyusb/hal/hal_lpc11uxx.c b/tinyusb/hal/hal_lpc11uxx.c
index f240597cc..066679a27 100644
--- a/tinyusb/hal/hal_lpc11uxx.c
+++ b/tinyusb/hal/hal_lpc11uxx.c
@@ -53,7 +53,7 @@ void hal_usb_int_disable(uint8_t coreid)
   NVIC_DisableIRQ(USB_IRQn);
 }
 
-tusb_error_t hal_init(void)
+bool hal_init(void)
 {
 	// TODO remove magic number
   /* Enable AHB clock to the USB block and USB RAM. */
@@ -70,7 +70,7 @@ tusb_error_t hal_init(void)
   LPC_IOCON->PIO0_6   &= ~0x07;
   LPC_IOCON->PIO0_6   |= (0x01<<0);            /* Secondary function SoftConn */
 
-  return TUSB_ERROR_NONE;
+  return true;
 }
 
 void USB_IRQHandler(void)
diff --git a/tinyusb/hal/hal_lpc13uxx.c b/tinyusb/hal/hal_lpc13uxx.c
index a8969a2f7..9de859e6f 100644
--- a/tinyusb/hal/hal_lpc13uxx.c
+++ b/tinyusb/hal/hal_lpc13uxx.c
@@ -53,7 +53,7 @@ void hal_usb_int_disable(uint8_t coreid)
   NVIC_DisableIRQ(USB_IRQ_IRQn);
 }
 
-tusb_error_t hal_init(void)
+bool hal_init(void)
 {
 	// TODO remove magic number
   LPC_SYSCON->SYSAHBCLKCTRL |= ((0x1<<14) | (0x1<<27)); /* Enable AHB clock to the USB block and USB RAM. */
@@ -69,7 +69,7 @@ tusb_error_t hal_init(void)
   LPC_IOCON->PIO0_6   &= ~0x07;
   LPC_IOCON->PIO0_6   |= (0x01<<0);            /* Secondary function SoftConn */
 
-  return TUSB_ERROR_NONE;
+  return true;
 }
 
 void USB_IRQHandler(void)
diff --git a/tinyusb/hal/hal_lpc175x_6x.c b/tinyusb/hal/hal_lpc175x_6x.c
index 32be8f3fe..3463a70db 100644
--- a/tinyusb/hal/hal_lpc175x_6x.c
+++ b/tinyusb/hal/hal_lpc175x_6x.c
@@ -56,7 +56,7 @@ void hal_usb_int_disable(uint8_t coreid)
 //--------------------------------------------------------------------+
 // IMPLEMENTATION
 //--------------------------------------------------------------------+
-tusb_error_t hal_init(void)
+bool hal_init(void)
 {
   enum {
     USBCLK_DEVCIE = 0x12,     // AHB + Device
@@ -97,7 +97,7 @@ tusb_error_t hal_init(void)
   while ((LPC_USB->USBClkSt & USBCLK_DEVCIE) != USBCLK_DEVCIE);
 #endif
 
-  return TUSB_ERROR_NONE;
+  return true;
 }
 
 void USB_IRQHandler(void)
diff --git a/tinyusb/tusb.c b/tinyusb/tusb.c
index 7adb5098c..6b3842029 100644
--- a/tinyusb/tusb.c
+++ b/tinyusb/tusb.c
@@ -42,7 +42,7 @@
 
 tusb_error_t tusb_init(void)
 {
-  ASSERT_STATUS( hal_init() ) ; // hardware init
+  VERIFY( hal_init(), TUSB_ERROR_FAILED ) ; // hardware init
 
 #if MODE_HOST_SUPPORTED
   ASSERT_STATUS( usbh_init() ); // host stack init