diff --git a/examples/device/cdc_msc_hid_freertos/ses/cdc_msc_hid_freertos.emProject b/examples/device/cdc_msc_hid_freertos/ses/cdc_msc_hid_freertos.emProject index d666ec949..acd8e98c2 100644 --- a/examples/device/cdc_msc_hid_freertos/ses/cdc_msc_hid_freertos.emProject +++ b/examples/device/cdc_msc_hid_freertos/ses/cdc_msc_hid_freertos.emProject @@ -3,4 +3,5 @@ + diff --git a/lib/FreeRTOS/FreeRTOSConfig.h b/examples/device/cdc_msc_hid_freertos/ses/lpc175x_6x/FreeRTOSConfig.h similarity index 90% rename from lib/FreeRTOS/FreeRTOSConfig.h rename to examples/device/cdc_msc_hid_freertos/ses/lpc175x_6x/FreeRTOSConfig.h index 721087bcc..0fad1dc89 100644 --- a/lib/FreeRTOS/FreeRTOSConfig.h +++ b/examples/device/cdc_msc_hid_freertos/ses/lpc175x_6x/FreeRTOSConfig.h @@ -4,8 +4,9 @@ //--------------------------------------------------------------------+ // See http://www.freertos.org/a00110.html. //--------------------------------------------------------------------+ -//#include "bsp/board.h" -#include "nrf.h" +#include "LPC17xx.h" + +#define configCPU_CLOCK_HZ SystemCoreClock #if 0 #if CFG_TUSB_MCU == OPT_MCU_LPC43XX @@ -15,12 +16,10 @@ #endif #endif -#define configCPU_CLOCK_HZ SystemCoreClock - #define configUSE_PREEMPTION 1 #define configUSE_PORT_OPTIMISED_TASK_SELECTION 0 #define configTICK_RATE_HZ ( 1000 ) -#define configMAX_PRIORITIES (5) +#define configMAX_PRIORITIES (8) #define configMINIMAL_STACK_SIZE (128 ) #define configTOTAL_HEAP_SIZE ( ( size_t ) ( 16*1024 ) ) #define configMAX_TASK_NAME_LEN 32 @@ -106,13 +105,14 @@ static inline void configASSERT_breakpoint(void) //--------------------------------------------------------------------+ // Interrupt nesting behaviour configuration. //--------------------------------------------------------------------+ -/* Cortex-M specific definitions. __NVIC_PRIO_BITS is defined in core_cmx.h */ +/* Cortex-M specific definitions. __NVIC_PRIO_BITS is defined in mcu_variant.h */ #ifdef __NVIC_PRIO_BITS #define configPRIO_BITS __NVIC_PRIO_BITS #else - #define configPRIO_BITS 5 // 32 priority levels + #error "This port requires __NVIC_PRIO_BITS to be defined" #endif + /* The lowest interrupt priority that can be used in a call to a "set priority" function. */ #define configLIBRARY_LOWEST_INTERRUPT_PRIORITY 0x1f @@ -121,14 +121,14 @@ function. */ routine that makes calls to interrupt safe FreeRTOS API functions. DO NOT CALL INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER PRIORITY THAN THIS! (higher priorities are lower numeric values. */ -#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 5 +#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 2 /* Interrupt priorities used by the kernel port layer itself. These are generic to all Cortex-M ports, and do not rely on any particular library functions. */ -#define configKERNEL_INTERRUPT_PRIORITY configLIBRARY_LOWEST_INTERRUPT_PRIORITY // ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) ) +#define configKERNEL_INTERRUPT_PRIORITY ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) ) /* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!! See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */ -#define configMAX_SYSCALL_INTERRUPT_PRIORITY configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY //( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) ) +#define configMAX_SYSCALL_INTERRUPT_PRIORITY ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) ) #endif /* __FREERTOS_CONFIG__H */ diff --git a/examples/device/cdc_msc_hid_freertos/ses/lpc175x_6x/LPC1700_Startup.s b/examples/device/cdc_msc_hid_freertos/ses/lpc175x_6x/LPC1700_Startup.s new file mode 100644 index 000000000..f039ad934 --- /dev/null +++ b/examples/device/cdc_msc_hid_freertos/ses/lpc175x_6x/LPC1700_Startup.s @@ -0,0 +1,109 @@ +/***************************************************************************** + * SEGGER Microcontroller GmbH & Co. KG * + * Solutions for real time microcontroller applications * + ***************************************************************************** + * * + * (c) 2015 SEGGER Microcontroller GmbH & Co. KG * + * * + * Internet: www.segger.com Support: support@segger.com * + * * + *****************************************************************************/ + +/***************************************************************************** + * Preprocessor Definitions * + * ------------------------ * + * NO_STACK_INIT * + * * + * If defined, the stack pointer will not be initialised. * + * * + * NO_SYSTEM_INIT * + * * + * If defined, the SystemInit() function will not be called. By default * + * SystemInit() is called after reset to enable the clocks and memories to * + * be initialised prior to any C startup initialisation. * + * * + * NO_VTOR_CONFIG * + * * + * If defined, the vector table offset register will not be configured. * + * * + * MEMORY_INIT * + * * + * If defined, the MemoryInit() function will be called. By default * + * MemoryInit() is called after SystemInit() to enable an external memory * + * controller. * + * * + * STACK_INIT_VAL * + * * + * If defined, specifies the initial stack pointer value. If undefined, * + * the stack pointer will be initialised to point to the end of the * + * RAM segment. * + * * + * VECTORS_IN_RAM * + * * + * If defined, the exception vectors will be copied from Flash to RAM. * + * * + *****************************************************************************/ + + .syntax unified + + .global Reset_Handler + .extern _vectors + + .section .init, "ax" + .thumb_func + + .equ VTOR_REG, 0xE000ED08 + +#ifndef STACK_INIT_VAL +#define STACK_INIT_VAL __RAM_segment_end__ +#endif + +Reset_Handler: +#ifndef NO_STACK_INIT + /* Initialise main stack */ + ldr r0, =STACK_INIT_VAL + bic r0, #0x7 + mov sp, r0 +#endif +#ifndef NO_SYSTEM_INIT + /* Initialise system */ + ldr r0, =SystemInit + blx r0 +#endif + +#ifdef MEMORY_INIT + ldr r0, =MemoryInit + blx r0 +#endif + +#ifdef VECTORS_IN_RAM + /* Copy exception vectors into RAM */ + ldr r0, =__vectors_start__ + ldr r1, =__vectors_end__ + ldr r2, =__vectors_ram_start__ +1: + cmp r0, r1 + beq 2f + ldr r3, [r0] + str r3, [r2] + adds r0, r0, #4 + adds r2, r2, #4 + b 1b +2: +#endif + +#ifndef NO_VTOR_CONFIG + /* Configure vector table offset register */ + ldr r0, =VTOR_REG +#ifdef VECTORS_IN_RAM + ldr r1, =_vectors_ram +#else + ldr r1, =_vectors +#endif + str r1, [r0] +#endif + + /* Jump to program start */ + b _start + + diff --git a/examples/device/cdc_msc_hid_freertos/ses/lpc175x_6x/LPC1700_Target.js b/examples/device/cdc_msc_hid_freertos/ses/lpc175x_6x/LPC1700_Target.js new file mode 100644 index 000000000..7f945a3d2 --- /dev/null +++ b/examples/device/cdc_msc_hid_freertos/ses/lpc175x_6x/LPC1700_Target.js @@ -0,0 +1,19 @@ +/***************************************************************************** + * SEGGER Microcontroller GmbH & Co. KG * + * Solutions for real time microcontroller applications * + ***************************************************************************** + * * + * (c) 2015 SEGGER Microcontroller GmbH & Co. KG * + * * + * Internet: www.segger.com Support: support@segger.com * + * * + *****************************************************************************/ + +function Reset() { + TargetInterface.resetAndStop(); +} + +function EnableTrace(traceInterfaceType) { + // TODO: Enable trace +} + diff --git a/examples/device/cdc_msc_hid_freertos/ses/lpc175x_6x/LPC1769_MemoryMap.xml b/examples/device/cdc_msc_hid_freertos/ses/lpc175x_6x/LPC1769_MemoryMap.xml new file mode 100644 index 000000000..d9c07aea3 --- /dev/null +++ b/examples/device/cdc_msc_hid_freertos/ses/lpc175x_6x/LPC1769_MemoryMap.xml @@ -0,0 +1,6 @@ + + + + + + diff --git a/examples/device/cdc_msc_hid_freertos/ses/lpc175x_6x/LPC176x5x_Registers.xml b/examples/device/cdc_msc_hid_freertos/ses/lpc175x_6x/LPC176x5x_Registers.xml new file mode 100644 index 000000000..fd38966b8 --- /dev/null +++ b/examples/device/cdc_msc_hid_freertos/ses/lpc175x_6x/LPC176x5x_Registers.xml @@ -0,0 +1,11058 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + 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.weak DMA_IRQHandler + .thumb_set DMA_IRQHandler,Dummy_Handler + + .weak I2S_IRQHandler + .thumb_set I2S_IRQHandler,Dummy_Handler + + .weak ENET_IRQHandler + .thumb_set ENET_IRQHandler,Dummy_Handler + + .weak RIT_IRQHandler + .thumb_set RIT_IRQHandler,Dummy_Handler + + .weak MCPWM_IRQHandler + .thumb_set MCPWM_IRQHandler,Dummy_Handler + + .weak QEI_IRQHandler + .thumb_set QEI_IRQHandler,Dummy_Handler + + .weak PLL1_IRQHandler + .thumb_set PLL1_IRQHandler,Dummy_Handler + + .weak USBActivity_IRQHandler + .thumb_set USBActivity_IRQHandler,Dummy_Handler + + .weak CANActivity_IRQHandler + .thumb_set CANActivity_IRQHandler,Dummy_Handler + +#else + + .thumb_func + .weak WDT_IRQHandler +WDT_IRQHandler: + b . + + .thumb_func + .weak TIMER0_IRQHandler +TIMER0_IRQHandler: + b . + + .thumb_func + .weak TIMER1_IRQHandler +TIMER1_IRQHandler: + b . + + .thumb_func + .weak TIMER2_IRQHandler +TIMER2_IRQHandler: + b . + + .thumb_func + .weak TIMER3_IRQHandler +TIMER3_IRQHandler: + b . + + .thumb_func + .weak UART0_IRQHandler +UART0_IRQHandler: + b . + + .thumb_func + .weak UART1_IRQHandler +UART1_IRQHandler: + b . + + .thumb_func + .weak UART2_IRQHandler +UART2_IRQHandler: + b . + + .thumb_func + .weak UART3_IRQHandler +UART3_IRQHandler: + b . + + .thumb_func + .weak PWM1_IRQHandler +PWM1_IRQHandler: + b . + + .thumb_func + .weak I2C0_IRQHandler +I2C0_IRQHandler: + b . + + .thumb_func + .weak I2C1_IRQHandler +I2C1_IRQHandler: + b . + + .thumb_func + .weak I2C2_IRQHandler +I2C2_IRQHandler: + b . + + .thumb_func + .weak SPI_IRQHandler +SPI_IRQHandler: + b . + + .thumb_func + .weak SSP0_IRQHandler +SSP0_IRQHandler: + b . + + .thumb_func + .weak SSP1_IRQHandler +SSP1_IRQHandler: + b . + + .thumb_func + .weak PLL0_IRQHandler +PLL0_IRQHandler: + b . + + .thumb_func + .weak RTC_IRQHandler +RTC_IRQHandler: + b . + + .thumb_func + .weak EINT0_IRQHandler +EINT0_IRQHandler: + b . + + .thumb_func + .weak EINT1_IRQHandler +EINT1_IRQHandler: + b . + + .thumb_func + .weak EINT2_IRQHandler +EINT2_IRQHandler: + b . + + .thumb_func + .weak EINT3_IRQHandler +EINT3_IRQHandler: + b . + + .thumb_func + .weak ADC_IRQHandler +ADC_IRQHandler: + b . + + .thumb_func + .weak BOD_IRQHandler +BOD_IRQHandler: + b . + + .thumb_func + .weak USB_IRQHandler +USB_IRQHandler: + b . + + .thumb_func + .weak CAN_IRQHandler +CAN_IRQHandler: + b . + + .thumb_func + .weak DMA_IRQHandler +DMA_IRQHandler: + b . + + .thumb_func + .weak I2S_IRQHandler +I2S_IRQHandler: + b . + + .thumb_func + .weak ENET_IRQHandler +ENET_IRQHandler: + b . + + .thumb_func + .weak RIT_IRQHandler +RIT_IRQHandler: + b . + + .thumb_func + .weak MCPWM_IRQHandler +MCPWM_IRQHandler: + b . + + .thumb_func + .weak QEI_IRQHandler +QEI_IRQHandler: + b . + + .thumb_func + .weak PLL1_IRQHandler +PLL1_IRQHandler: + b . + + .thumb_func + .weak USBActivity_IRQHandler +USBActivity_IRQHandler: + b . + + .thumb_func + .weak CANActivity_IRQHandler +CANActivity_IRQHandler: + b . + +#endif + +/***************************************************************************** + * Vector Table * + *****************************************************************************/ + + .section .vectors, "ax" + .align 0 + .global _vectors + .extern __stack_end__ + .extern Reset_Handler + +_vectors: + .word __stack_end__ + .word Reset_Handler + .word NMI_Handler + .word HardFault_Handler + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word SVC_Handler + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word PendSV_Handler + .word SysTick_Handler + .word WDT_IRQHandler + .word TIMER0_IRQHandler + .word TIMER1_IRQHandler + .word TIMER2_IRQHandler + .word TIMER3_IRQHandler + .word UART0_IRQHandler + .word UART1_IRQHandler + .word UART2_IRQHandler + .word UART3_IRQHandler + .word PWM1_IRQHandler + .word I2C0_IRQHandler + .word I2C1_IRQHandler + .word I2C2_IRQHandler + .word SPI_IRQHandler + .word SSP0_IRQHandler + .word SSP1_IRQHandler + .word PLL0_IRQHandler + .word RTC_IRQHandler + .word EINT0_IRQHandler + .word EINT1_IRQHandler + .word EINT2_IRQHandler + .word EINT3_IRQHandler + .word ADC_IRQHandler + .word BOD_IRQHandler + .word USB_IRQHandler + .word CAN_IRQHandler + .word DMA_IRQHandler + .word I2S_IRQHandler + .word ENET_IRQHandler + .word RIT_IRQHandler + .word MCPWM_IRQHandler + .word QEI_IRQHandler + .word PLL1_IRQHandler + .word USBActivity_IRQHandler + .word CANActivity_IRQHandler +_vectors_end: + +#ifdef VECTORS_IN_RAM + .section .vectors_ram, "ax" + .align 0 + .global _vectors_ram + +_vectors_ram: + .space _vectors_end - _vectors, 0 +#endif diff --git a/examples/device/cdc_msc_hid_freertos/ses/lpc175x_6x/Output/lpc175x_6x LPCXpresso 1769/Obj/lpc175x_6x.ld b/examples/device/cdc_msc_hid_freertos/ses/lpc175x_6x/Output/lpc175x_6x LPCXpresso 1769/Obj/lpc175x_6x.ld new file mode 100644 index 000000000..80fb1406d --- /dev/null +++ b/examples/device/cdc_msc_hid_freertos/ses/lpc175x_6x/Output/lpc175x_6x LPCXpresso 1769/Obj/lpc175x_6x.ld @@ -0,0 +1,314 @@ +MEMORY +{ + UNPLACED_SECTIONS (wx) : ORIGIN = 0x100000000, LENGTH = 0 + RAM2 (wx) : ORIGIN = 0x2007c000, LENGTH = 0x00008000 + RAM (wx) : ORIGIN = 0x10000000, LENGTH = 0x00008000 + FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x00080000 +} + +SECTIONS +{ + __RAM2_segment_start__ = 0x2007c000; + __RAM2_segment_end__ = 0x20084000; + __RAM2_segment_size__ = 0x00008000; + __RAM_segment_start__ = 0x10000000; + __RAM_segment_end__ = 0x10008000; + __RAM_segment_size__ = 0x00008000; + __FLASH_segment_start__ = 0x00000000; + __FLASH_segment_end__ = 0x00080000; + __FLASH_segment_size__ = 0x00080000; + + __HEAPSIZE__ = 1024; + __STACKSIZE_PROCESS__ = 0; + __STACKSIZE__ = 1024; + + __data2_run_load_start__ = ALIGN(__RAM2_segment_start__ , 4); + .data2_run ALIGN(__RAM2_segment_start__ , 4) (NOLOAD) : AT(ALIGN(__RAM2_segment_start__ , 4)) + { + __data2_run_start__ = .; + *(.data2_run .data2_run.*) + } + __data2_run_end__ = __data2_run_start__ + SIZEOF(.data2_run); + __data2_run_size__ = SIZEOF(.data2_run); + __data2_run_load_end__ = __data2_run_end__; + + . = ASSERT(__data2_run_start__ == __data2_run_end__ || (__data2_run_end__ >= __RAM2_segment_start__ && __data2_run_end__ <= __RAM2_segment_end__) , "error: .data2_run is too large to fit in RAM2 memory segment"); + + __bss2_load_start__ = ALIGN(__data2_run_end__ , 4); + .bss2 ALIGN(__data2_run_end__ , 4) (NOLOAD) : AT(ALIGN(__data2_run_end__ , 4)) + { + __bss2_start__ = .; + *(.bss2 .bss2.*) + } + __bss2_end__ = __bss2_start__ + SIZEOF(.bss2); + __bss2_size__ = SIZEOF(.bss2); + __bss2_load_end__ = __bss2_end__; + + __RAM2_segment_used_end__ = ALIGN(__data2_run_end__ , 4) + SIZEOF(.bss2); + __RAM2_segment_used_size__ = __RAM2_segment_used_end__ - __RAM2_segment_start__; + + . = ASSERT(__bss2_start__ == __bss2_end__ || (__bss2_end__ >= __RAM2_segment_start__ && __bss2_end__ <= __RAM2_segment_end__) , "error: .bss2 is too large to fit in RAM2 memory segment"); + + __vectors_ram_load_start__ = ALIGN(__RAM_segment_start__ , 256); + .vectors_ram ALIGN(__RAM_segment_start__ , 256) (NOLOAD) : AT(ALIGN(__RAM_segment_start__ , 256)) + { + __vectors_ram_start__ = .; + *(.vectors_ram .vectors_ram.*) + } + __vectors_ram_end__ = __vectors_ram_start__ + SIZEOF(.vectors_ram); + __vectors_ram_size__ = SIZEOF(.vectors_ram); + __vectors_ram_load_end__ = __vectors_ram_end__; + + . = ASSERT(__vectors_ram_start__ == __vectors_ram_end__ || (__vectors_ram_end__ >= __RAM_segment_start__ && __vectors_ram_end__ <= __RAM_segment_end__) , "error: .vectors_ram is too large to fit in RAM memory segment"); + + __vectors_load_start__ = ALIGN(__FLASH_segment_start__ , 256); + .vectors ALIGN(__FLASH_segment_start__ , 256) : AT(ALIGN(__FLASH_segment_start__ , 256)) + { + __vectors_start__ = .; + *(.vectors .vectors.*) + } + __vectors_end__ = __vectors_start__ + SIZEOF(.vectors); + __vectors_size__ = SIZEOF(.vectors); + __vectors_load_end__ = __vectors_end__; + + . = ASSERT(__vectors_start__ == __vectors_end__ || (__vectors_end__ >= __FLASH_segment_start__ && __vectors_end__ <= __FLASH_segment_end__) , "error: .vectors is too large to fit in FLASH memory segment"); + + __init_load_start__ = ALIGN(__vectors_end__ , 4); + .init ALIGN(__vectors_end__ , 4) : AT(ALIGN(__vectors_end__ , 4)) + { + __init_start__ = .; + *(.init .init.*) + } + __init_end__ = __init_start__ + SIZEOF(.init); + __init_size__ = SIZEOF(.init); + __init_load_end__ = __init_end__; + + . = ASSERT(__init_start__ == __init_end__ || (__init_end__ >= __FLASH_segment_start__ && __init_end__ <= __FLASH_segment_end__) , "error: .init is too large to fit in FLASH memory segment"); + + __init_rodata_load_start__ = ALIGN(__init_end__ , 4); + .init_rodata ALIGN(__init_end__ , 4) : AT(ALIGN(__init_end__ , 4)) + { + __init_rodata_start__ = .; + *(.init_rodata .init_rodata.*) + } + __init_rodata_end__ = __init_rodata_start__ + SIZEOF(.init_rodata); + __init_rodata_size__ = SIZEOF(.init_rodata); + __init_rodata_load_end__ = __init_rodata_end__; + + . = ASSERT(__init_rodata_start__ == __init_rodata_end__ || (__init_rodata_end__ >= __FLASH_segment_start__ && __init_rodata_end__ <= __FLASH_segment_end__) , "error: .init_rodata is too large to fit in FLASH memory segment"); + + __text_load_start__ = ALIGN(__init_rodata_end__ , 4); + .text ALIGN(__init_rodata_end__ , 4) : AT(ALIGN(__init_rodata_end__ , 4)) + { + __text_start__ = .; + *(.text .text.* .glue_7t .glue_7 .gnu.linkonce.t.* .gcc_except_table .ARM.extab* .gnu.linkonce.armextab.*) + } + __text_end__ = __text_start__ + SIZEOF(.text); + __text_size__ = SIZEOF(.text); + __text_load_end__ = __text_end__; + + . = ASSERT(__text_start__ == __text_end__ || (__text_end__ >= __FLASH_segment_start__ && __text_end__ <= __FLASH_segment_end__) , "error: .text is too large to fit in FLASH memory segment"); + + __dtors_load_start__ = ALIGN(__text_end__ , 4); + .dtors ALIGN(__text_end__ , 4) : AT(ALIGN(__text_end__ , 4)) + { + __dtors_start__ = .; + KEEP (*(SORT(.dtors.*))) KEEP (*(.dtors)) KEEP (*(.fini_array)) KEEP (*(SORT(.fini_array.*))) + } + __dtors_end__ = __dtors_start__ + SIZEOF(.dtors); + __dtors_size__ = SIZEOF(.dtors); + __dtors_load_end__ = __dtors_end__; + + . = ASSERT(__dtors_start__ == __dtors_end__ || (__dtors_end__ >= __FLASH_segment_start__ && __dtors_end__ <= __FLASH_segment_end__) , "error: .dtors is too large to fit in FLASH memory segment"); + + __ctors_load_start__ = ALIGN(__dtors_end__ , 4); + .ctors ALIGN(__dtors_end__ , 4) : AT(ALIGN(__dtors_end__ , 4)) + { + __ctors_start__ = .; + KEEP (*(SORT(.ctors.*))) KEEP (*(.ctors)) KEEP (*(.init_array)) KEEP (*(SORT(.init_array.*))) + } + __ctors_end__ = __ctors_start__ + SIZEOF(.ctors); + __ctors_size__ = SIZEOF(.ctors); + __ctors_load_end__ = __ctors_end__; + + . = ASSERT(__ctors_start__ == __ctors_end__ || (__ctors_end__ >= __FLASH_segment_start__ && __ctors_end__ <= __FLASH_segment_end__) , "error: .ctors is too large to fit in FLASH memory segment"); + + __rodata_load_start__ = ALIGN(__ctors_end__ , 4); + .rodata ALIGN(__ctors_end__ , 4) : AT(ALIGN(__ctors_end__ , 4)) + { + __rodata_start__ = .; + *(.rodata .rodata.* .gnu.linkonce.r.*) + } + __rodata_end__ = __rodata_start__ + SIZEOF(.rodata); + __rodata_size__ = SIZEOF(.rodata); + __rodata_load_end__ = __rodata_end__; + + . = ASSERT(__rodata_start__ == __rodata_end__ || (__rodata_end__ >= __FLASH_segment_start__ && __rodata_end__ <= __FLASH_segment_end__) , "error: .rodata is too large to fit in FLASH memory segment"); + + __ARM.exidx_load_start__ = ALIGN(__rodata_end__ , 4); + .ARM.exidx ALIGN(__rodata_end__ , 4) : AT(ALIGN(__rodata_end__ , 4)) + { + __ARM.exidx_start__ = .; + __exidx_start = __ARM.exidx_start__; + *(.ARM.exidx .ARM.exidx.*) + } + __ARM.exidx_end__ = __ARM.exidx_start__ + SIZEOF(.ARM.exidx); + __ARM.exidx_size__ = SIZEOF(.ARM.exidx); + __exidx_end = __ARM.exidx_end__; + __ARM.exidx_load_end__ = __ARM.exidx_end__; + + . = ASSERT(__ARM.exidx_start__ == __ARM.exidx_end__ || (__ARM.exidx_end__ >= __FLASH_segment_start__ && __ARM.exidx_end__ <= __FLASH_segment_end__) , "error: .ARM.exidx is too large to fit in FLASH memory segment"); + + __fast_load_start__ = ALIGN(__ARM.exidx_end__ , 4); + .fast ALIGN(__vectors_ram_end__ , 4) : AT(ALIGN(__ARM.exidx_end__ , 4)) + { + __fast_start__ = .; + *(.fast .fast.*) + } + __fast_end__ = __fast_start__ + SIZEOF(.fast); + __fast_size__ = SIZEOF(.fast); + __fast_load_end__ = __fast_load_start__ + SIZEOF(.fast); + + . = ASSERT(__fast_load_start__ == __fast_load_end__ || (__fast_load_end__ >= __FLASH_segment_start__ && __fast_load_end__ <= __FLASH_segment_end__) , "error: .fast is too large to fit in FLASH memory segment"); + + .fast_run ALIGN(__vectors_ram_end__ , 4) (NOLOAD) : + { + __fast_run_start__ = .; + . = MAX(__fast_run_start__ + SIZEOF(.fast), .); + } + __fast_run_end__ = __fast_run_start__ + SIZEOF(.fast_run); + __fast_run_size__ = SIZEOF(.fast_run); + __fast_run_load_end__ = __fast_run_end__; + + . = ASSERT(__fast_run_start__ == __fast_run_end__ || (__fast_run_end__ >= __RAM_segment_start__ && __fast_run_end__ <= __RAM_segment_end__) , "error: .fast_run is too large to fit in RAM memory segment"); + + __data_load_start__ = ALIGN(__fast_load_start__ + SIZEOF(.fast) , 4); + .data ALIGN(__fast_run_end__ , 4) : AT(ALIGN(__fast_load_start__ + SIZEOF(.fast) , 4)) + { + __data_start__ = .; + *(.data .data.* .gnu.linkonce.d.*) + } + __data_end__ = __data_start__ + SIZEOF(.data); + __data_size__ = SIZEOF(.data); + __data_load_end__ = __data_load_start__ + SIZEOF(.data); + + . = ASSERT(__data_load_start__ == __data_load_end__ || (__data_load_end__ >= __FLASH_segment_start__ && __data_load_end__ <= __FLASH_segment_end__) , "error: .data is too large to fit in FLASH memory segment"); + + .data_run ALIGN(__fast_run_end__ , 4) (NOLOAD) : + { + __data_run_start__ = .; + . = MAX(__data_run_start__ + SIZEOF(.data), .); + } + __data_run_end__ = __data_run_start__ + SIZEOF(.data_run); + __data_run_size__ = SIZEOF(.data_run); + __data_run_load_end__ = __data_run_end__; + + . = ASSERT(__data_run_start__ == __data_run_end__ || (__data_run_end__ >= __RAM_segment_start__ && __data_run_end__ <= __RAM_segment_end__) , "error: .data_run is too large to fit in RAM memory segment"); + + __bss_load_start__ = ALIGN(__data_run_end__ , 4); + .bss ALIGN(__data_run_end__ , 4) (NOLOAD) : AT(ALIGN(__data_run_end__ , 4)) + { + __bss_start__ = .; + *(.bss .bss.* .gnu.linkonce.b.*) *(COMMON) + } + __bss_end__ = __bss_start__ + SIZEOF(.bss); + __bss_size__ = SIZEOF(.bss); + __bss_load_end__ = __bss_end__; + + . = ASSERT(__bss_start__ == __bss_end__ || (__bss_end__ >= __RAM_segment_start__ && __bss_end__ <= __RAM_segment_end__) , "error: .bss is too large to fit in RAM memory segment"); + + __tbss_load_start__ = ALIGN(__bss_end__ , 4); + .tbss ALIGN(__bss_end__ , 4) (NOLOAD) : AT(ALIGN(__bss_end__ , 4)) + { + __tbss_start__ = .; + *(.tbss .tbss.*) + } + __tbss_end__ = __tbss_start__ + SIZEOF(.tbss); + __tbss_size__ = SIZEOF(.tbss); + __tbss_load_end__ = __tbss_end__; + + . = ASSERT(__tbss_start__ == __tbss_end__ || (__tbss_end__ >= __RAM_segment_start__ && __tbss_end__ <= __RAM_segment_end__) , "error: .tbss is too large to fit in RAM memory segment"); + + __tdata_load_start__ = ALIGN(__data_load_start__ + SIZEOF(.data) , 4); + .tdata ALIGN(__tbss_end__ , 4) : AT(ALIGN(__data_load_start__ + SIZEOF(.data) , 4)) + { + __tdata_start__ = .; + *(.tdata .tdata.*) + } + __tdata_end__ = __tdata_start__ + SIZEOF(.tdata); + __tdata_size__ = SIZEOF(.tdata); + __tdata_load_end__ = __tdata_load_start__ + SIZEOF(.tdata); + + __FLASH_segment_used_end__ = ALIGN(__data_load_start__ + SIZEOF(.data) , 4) + SIZEOF(.tdata); + __FLASH_segment_used_size__ = __FLASH_segment_used_end__ - __FLASH_segment_start__; + + . = ASSERT(__tdata_load_start__ == __tdata_load_end__ || (__tdata_load_end__ >= __FLASH_segment_start__ && __tdata_load_end__ <= __FLASH_segment_end__) , "error: .tdata is too large to fit in FLASH memory segment"); + + .tdata_run ALIGN(__tbss_end__ , 4) (NOLOAD) : + { + __tdata_run_start__ = .; + . = MAX(__tdata_run_start__ + SIZEOF(.tdata), .); + } + __tdata_run_end__ = __tdata_run_start__ + SIZEOF(.tdata_run); + __tdata_run_size__ = SIZEOF(.tdata_run); + __tdata_run_load_end__ = __tdata_run_end__; + + . = ASSERT(__tdata_run_start__ == __tdata_run_end__ || (__tdata_run_end__ >= __RAM_segment_start__ && __tdata_run_end__ <= __RAM_segment_end__) , "error: .tdata_run is too large to fit in RAM memory segment"); + + __non_init_load_start__ = ALIGN(__tdata_run_end__ , 4); + .non_init ALIGN(__tdata_run_end__ , 4) (NOLOAD) : AT(ALIGN(__tdata_run_end__ , 4)) + { + __non_init_start__ = .; + *(.non_init .non_init.*) + } + __non_init_end__ = __non_init_start__ + SIZEOF(.non_init); + __non_init_size__ = SIZEOF(.non_init); + __non_init_load_end__ = __non_init_end__; + + . = ASSERT(__non_init_start__ == __non_init_end__ || (__non_init_end__ >= __RAM_segment_start__ && __non_init_end__ <= __RAM_segment_end__) , "error: .non_init is too large to fit in RAM memory segment"); + + __heap_load_start__ = ALIGN(__non_init_end__ , 4); + .heap ALIGN(__non_init_end__ , 4) (NOLOAD) : AT(ALIGN(__non_init_end__ , 4)) + { + __heap_start__ = .; + *(.heap .heap.*) + . = ALIGN(MAX(__heap_start__ + __HEAPSIZE__ , .), 4); + } + __heap_end__ = __heap_start__ + SIZEOF(.heap); + __heap_size__ = SIZEOF(.heap); + __heap_load_end__ = __heap_end__; + + . = ASSERT(__heap_start__ == __heap_end__ || (__heap_end__ >= __RAM_segment_start__ && __heap_end__ <= __RAM_segment_end__) , "error: .heap is too large to fit in RAM memory segment"); + + __stack_load_start__ = __RAM_segment_end__ - 1024; + .stack __RAM_segment_end__ - 1024 (NOLOAD) : AT(__RAM_segment_end__ - 1024) + { + __stack_start__ = .; + *(.stack .stack.*) + . = ALIGN(MAX(__stack_start__ + __STACKSIZE__ , .), 8); + } + __stack_end__ = __stack_start__ + SIZEOF(.stack); + __stack_size__ = SIZEOF(.stack); + __stack_load_end__ = __stack_end__; + + . = ASSERT(__stack_start__ == __stack_end__ || (__stack_end__ >= __RAM_segment_start__ && __stack_end__ <= __RAM_segment_end__) , "error: .stack is too large to fit in RAM memory segment"); + . = ASSERT(__heap_end__ <= __stack_start__ , "error: section .heap overlaps absolute placed section .stack"); + + __stack_process_load_start__ = ALIGN(__stack_end__ , 8); + .stack_process ALIGN(__stack_end__ , 8) (NOLOAD) : AT(ALIGN(__stack_end__ , 8)) + { + __stack_process_start__ = .; + *(.stack_process .stack_process.*) + . = ALIGN(MAX(__stack_process_start__ + __STACKSIZE_PROCESS__ , .), 8); + } + __stack_process_end__ = __stack_process_start__ + SIZEOF(.stack_process); + __stack_process_size__ = SIZEOF(.stack_process); + __stack_process_load_end__ = __stack_process_end__; + + __RAM_segment_used_end__ = ALIGN(__stack_end__ , 8) + SIZEOF(.stack_process); + __RAM_segment_used_size__ = __RAM_segment_used_end__ - __RAM_segment_start__; + + . = ASSERT(__stack_process_start__ == __stack_process_end__ || (__stack_process_end__ >= __RAM_segment_start__ && __stack_process_end__ <= __RAM_segment_end__) , "error: .stack_process is too large to fit in RAM memory segment"); + +} + diff --git a/examples/device/cdc_msc_hid_freertos/ses/lpc175x_6x/flash_placement.xml b/examples/device/cdc_msc_hid_freertos/ses/lpc175x_6x/flash_placement.xml new file mode 100644 index 000000000..79bedc537 --- /dev/null +++ b/examples/device/cdc_msc_hid_freertos/ses/lpc175x_6x/flash_placement.xml @@ -0,0 +1,37 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/examples/device/cdc_msc_hid_freertos/ses/lpc175x_6x/lpc175x_6x.emProject b/examples/device/cdc_msc_hid_freertos/ses/lpc175x_6x/lpc175x_6x.emProject new file mode 100644 index 000000000..a10722f0e --- /dev/null +++ b/examples/device/cdc_msc_hid_freertos/ses/lpc175x_6x/lpc175x_6x.emProject @@ -0,0 +1,141 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/examples/device/cdc_msc_hid_freertos/ses/lpc175x_6x/thumb_crt0.s b/examples/device/cdc_msc_hid_freertos/ses/lpc175x_6x/thumb_crt0.s new file mode 100644 index 000000000..17f88e0ca --- /dev/null +++ b/examples/device/cdc_msc_hid_freertos/ses/lpc175x_6x/thumb_crt0.s @@ -0,0 +1,415 @@ +// ********************************************************************** +// * SEGGER Microcontroller GmbH * +// * The Embedded Experts * +// ********************************************************************** +// * * +// * (c) 2014 - 2018 SEGGER Microcontroller GmbH * +// * (c) 2001 - 2018 Rowley Associates Limited * +// * * +// * www.segger.com Support: support@segger.com * +// * * +// ********************************************************************** +// * * +// * All rights reserved. * +// * * +// * Redistribution and use in source and binary forms, with or * +// * without modification, are permitted provided that the following * +// * conditions are met: * +// * * +// * - Redistributions of source code must retain the above copyright * +// * notice, this list of conditions and the following disclaimer. * +// * * +// * - Neither the name of SEGGER Microcontroller GmbH * +// * nor the names of its contributors may be used to endorse or * +// * promote products derived from this software without specific * +// * prior written permission. * +// * * +// * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND * +// * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, * +// * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF * +// * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * +// * DISCLAIMED. * +// * IN NO EVENT SHALL SEGGER Microcontroller GmbH BE LIABLE FOR * +// * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * +// * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT * +// * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; * +// * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * +// * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * +// * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * +// * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * +// * DAMAGE. * +// * * +// ********************************************************************** +// +// +// Preprocessor Definitions +// ------------------------ +// APP_ENTRY_POINT +// +// Defines the application entry point function, if undefined this setting +// defaults to "main". +// +// INITIALIZE_STACK +// +// If defined, the contents of the stack will be initialized to a the +// value 0xCC. +// +// INITIALIZE_SECONDARY_SECTIONS +// +// If defined, the .data2, .text2, .rodata2 and .bss2 sections will be initialized. +// +// INITIALIZE_TCM_SECTIONS +// +// If defined, the .data_tcm, .text_tcm, .rodata_tcm and .bss_tcm sections +// will be initialized. +// +// INITIALIZE_USER_SECTIONS +// +// If defined, the function InitializeUserMemorySections will be called prior +// to entering main in order to allow the user to initialize any user defined +// memory sections. +// +// FULL_LIBRARY +// +// If defined then +// - argc, argv are setup by the debug_getargs. +// - the exit symbol is defined and executes on return from main. +// - the exit symbol calls destructors, atexit functions and then debug_exit. +// +// If not defined then +// - argc and argv are zero. +// - the exit symbol is defined, executes on return from main and loops +// + +#ifndef APP_ENTRY_POINT +#define APP_ENTRY_POINT main +#endif + +#ifndef ARGSSPACE +#define ARGSSPACE 128 +#endif + .syntax unified + + .global _start + .extern APP_ENTRY_POINT + .global exit + .weak exit + +#ifdef INITIALIZE_USER_SECTIONS + .extern InitializeUserMemorySections +#endif + + .section .init, "ax" + .code 16 + .balign 2 + .thumb_func + +_start: + /* Set up main stack if size > 0 */ + ldr r1, =__stack_end__ + ldr r0, =__stack_start__ + subs r2, r1, r0 + beq 1f +#ifdef __ARM_EABI__ + movs r2, #0x7 + bics r1, r2 +#endif + mov sp, r1 +#ifdef INITIALIZE_STACK + movs r2, #0xCC + ldr r0, =__stack_start__ + bl memory_set +#endif +1: + + /* Set up process stack if size > 0 */ + ldr r1, =__stack_process_end__ + ldr r0, =__stack_process_start__ + subs r2, r1, r0 + beq 1f +#ifdef __ARM_EABI__ + movs r2, #0x7 + bics r1, r2 +#endif + msr psp, r1 + movs r2, #2 + msr control, r2 +#ifdef INITIALIZE_STACK + movs r2, #0xCC + bl memory_set +#endif +1: + + /* Copy initialized memory sections into RAM (if necessary). */ + ldr r0, =__data_load_start__ + ldr r1, =__data_start__ + ldr r2, =__data_end__ + bl memory_copy + ldr r0, =__text_load_start__ + ldr r1, =__text_start__ + ldr r2, =__text_end__ + bl memory_copy + ldr r0, =__fast_load_start__ + ldr r1, =__fast_start__ + ldr r2, =__fast_end__ + bl memory_copy + ldr r0, =__ctors_load_start__ + ldr r1, =__ctors_start__ + ldr r2, =__ctors_end__ + bl memory_copy + ldr r0, =__dtors_load_start__ + ldr r1, =__dtors_start__ + ldr r2, =__dtors_end__ + bl memory_copy + ldr r0, =__rodata_load_start__ + ldr r1, =__rodata_start__ + ldr r2, =__rodata_end__ + bl memory_copy + ldr r0, =__tdata_load_start__ + ldr r1, =__tdata_start__ + ldr r2, =__tdata_end__ + bl memory_copy +#ifdef INITIALIZE_SECONDARY_SECTIONS + ldr r0, =__data2_load_start__ + ldr r1, =__data2_start__ + ldr r2, =__data2_end__ + bl memory_copy + ldr r0, =__text2_load_start__ + ldr r1, =__text2_start__ + ldr r2, =__text2_end__ + bl memory_copy + ldr r0, =__rodata2_load_start__ + ldr r1, =__rodata2_start__ + ldr r2, =__rodata2_end__ + bl memory_copy +#endif /* #ifdef INITIALIZE_SECONDARY_SECTIONS */ +#ifdef INITIALIZE_TCM_SECTIONS + ldr r0, =__data_tcm_load_start__ + ldr r1, =__data_tcm_start__ + ldr r2, =__data_tcm_end__ + bl memory_copy + ldr r0, =__text_tcm_load_start__ + ldr r1, =__text_tcm_start__ + ldr r2, =__text_tcm_end__ + bl memory_copy + ldr r0, =__rodata_tcm_load_start__ + ldr r1, =__rodata_tcm_start__ + ldr r2, =__rodata_tcm_end__ + bl memory_copy +#endif /* #ifdef INITIALIZE_TCM_SECTIONS */ + + /* Zero the bss. */ + ldr r0, =__bss_start__ + ldr r1, =__bss_end__ + movs r2, #0 + bl memory_set + ldr r0, =__tbss_start__ + ldr r1, =__tbss_end__ + movs r2, #0 + bl memory_set +#ifdef INITIALIZE_SECONDARY_SECTIONS + ldr r0, =__bss2_start__ + ldr r1, =__bss2_end__ + mov r2, #0 + bl memory_set +#endif /* #ifdef INITIALIZE_SECONDARY_SECTIONS */ +#ifdef INITIALIZE_TCM_SECTIONS + ldr r0, =__bss_tcm_start__ + ldr r1, =__bss_tcm_end__ + mov r2, #0 + bl memory_set +#endif /* #ifdef INITIALIZE_TCM_SECTIONS */ + + /* Initialize the heap */ + ldr r0, = __heap_start__ + ldr r1, = __heap_end__ + subs r1, r1, r0 + cmp r1, #8 + blt 1f + movs r2, #0 + str r2, [r0] + adds r0, r0, #4 + str r1, [r0] +1: + +#ifdef INITIALIZE_USER_SECTIONS + ldr r2, =InitializeUserMemorySections + blx r2 +#endif + + /* Call constructors */ + ldr r0, =__ctors_start__ + ldr r1, =__ctors_end__ +ctor_loop: + cmp r0, r1 + beq ctor_end + ldr r2, [r0] + adds r0, #4 + push {r0-r1} + blx r2 + pop {r0-r1} + b ctor_loop +ctor_end: + + /* Setup initial call frame */ + movs r0, #0 + mov lr, r0 + mov r12, sp + + .type start, function +start: + /* Jump to application entry point */ +#ifdef FULL_LIBRARY + movs r0, #ARGSSPACE + ldr r1, =args + ldr r2, =debug_getargs + blx r2 + ldr r1, =args +#else + movs r0, #0 + movs r1, #0 +#endif + ldr r2, =APP_ENTRY_POINT + blx r2 + + .thumb_func +exit: +#ifdef FULL_LIBRARY + mov r5, r0 // save the exit parameter/return result + + /* Call destructors */ + ldr r0, =__dtors_start__ + ldr r1, =__dtors_end__ +dtor_loop: + cmp r0, r1 + beq dtor_end + ldr r2, [r0] + add r0, #4 + push {r0-r1} + blx r2 + pop {r0-r1} + b dtor_loop +dtor_end: + + /* Call atexit functions */ + ldr r2, =_execute_at_exit_fns + blx r2 + + /* Call debug_exit with return result/exit parameter */ + mov r0, r5 + ldr r2, =debug_exit + blx r2 +#endif + + /* Returned from application entry point, loop forever. */ +exit_loop: + b exit_loop + + .thumb_func +memory_copy: + cmp r0, r1 + beq 2f + subs r2, r2, r1 + beq 2f +1: + ldrb r3, [r0] + adds r0, r0, #1 + strb r3, [r1] + adds r1, r1, #1 + subs r2, r2, #1 + bne 1b +2: + bx lr + + .thumb_func +memory_set: + cmp r0, r1 + beq 1f + strb r2, [r0] + adds r0, r0, #1 + b memory_set +1: + bx lr + + // default C/C++ library helpers + +.macro HELPER helper_name + .section .text.\helper_name, "ax", %progbits + .balign 2 + .global \helper_name + .weak \helper_name +\helper_name: + .thumb_func +.endm + +.macro JUMPTO name +#if defined(__thumb__) && !defined(__thumb2__) + mov r12, r0 + ldr r0, =\name + push {r0} + mov r0, r12 + pop {pc} +#else + b \name +#endif +.endm + +HELPER __aeabi_read_tp + ldr r0, =__tbss_start__-8 + bx lr +HELPER abort + b . +HELPER __assert + b . +HELPER __aeabi_assert + b . +HELPER __sync_synchronize + bx lr +HELPER __getchar + JUMPTO debug_getchar +HELPER __putchar + JUMPTO debug_putchar +HELPER __open + JUMPTO debug_fopen +HELPER __close + JUMPTO debug_fclose +HELPER __write + mov r3, r0 + mov r0, r1 + movs r1, #1 + JUMPTO debug_fwrite +HELPER __read + mov r3, r0 + mov r0, r1 + movs r1, #1 + JUMPTO debug_fread +HELPER __seek + push {r4, lr} + mov r4, r0 + bl debug_fseek + cmp r0, #0 + bne 1f + mov r0, r4 + bl debug_ftell + pop {r4, pc} +1: + ldr r0, =-1 + pop {r4, pc} + // char __user_locale_name_buffer[]; + .section .bss.__user_locale_name_buffer, "aw", %nobits + .global __user_locale_name_buffer + .weak __user_locale_name_buffer + __user_locale_name_buffer: + .word 0x0 + +#ifdef FULL_LIBRARY + .bss +args: + .space ARGSSPACE +#endif + + /* Setup attibutes of stack and heap sections so they don't take up room in the elf file */ + .section .stack, "wa", %nobits + .section .stack_process, "wa", %nobits + .section .heap, "wa", %nobits + diff --git a/examples/device/cdc_msc_hid_freertos/ses/nrf5x/FreeRTOSConfig.h b/examples/device/cdc_msc_hid_freertos/ses/nrf5x/FreeRTOSConfig.h index 96de8f8c5..26df38d3d 100644 --- a/examples/device/cdc_msc_hid_freertos/ses/nrf5x/FreeRTOSConfig.h +++ b/examples/device/cdc_msc_hid_freertos/ses/nrf5x/FreeRTOSConfig.h @@ -137,8 +137,7 @@ #error "This port requires __NVIC_PRIO_BITS to be defined" #endif -/* The lowest interrupt priority that can be used in a call to a "set priority" -function. */ +/* The lowest interrupt priority that can be used in a call to a "set priority" function. */ #define configLIBRARY_LOWEST_INTERRUPT_PRIORITY ((1< - diff --git a/examples/device/cdc_msc_hid_freertos/ses/samd21/samd21.emProject b/examples/device/cdc_msc_hid_freertos/ses/samd21/samd21.emProject index 2ae0d66a1..c7fe7997d 100644 --- a/examples/device/cdc_msc_hid_freertos/ses/samd21/samd21.emProject +++ b/examples/device/cdc_msc_hid_freertos/ses/samd21/samd21.emProject @@ -121,7 +121,6 @@ - @@ -137,7 +136,6 @@ - diff --git a/examples/device/cdc_msc_hid_freertos/ses/samd51/samd51.emProject b/examples/device/cdc_msc_hid_freertos/ses/samd51/samd51.emProject index b08ad276d..832520ae4 100644 --- a/examples/device/cdc_msc_hid_freertos/ses/samd51/samd51.emProject +++ b/examples/device/cdc_msc_hid_freertos/ses/samd51/samd51.emProject @@ -125,7 +125,6 @@ - @@ -141,7 +140,6 @@ - diff --git a/examples/device/cdc_msc_hid_freertos/src/tusb_config.h b/examples/device/cdc_msc_hid_freertos/src/tusb_config.h index 777930ba3..e45c667b3 100644 --- a/examples/device/cdc_msc_hid_freertos/src/tusb_config.h +++ b/examples/device/cdc_msc_hid_freertos/src/tusb_config.h @@ -39,8 +39,6 @@ #ifndef _TUSB_CONFIG_H_ #define _TUSB_CONFIG_H_ -#include "bsp/board.h" - #ifdef __cplusplus extern "C" { #endif @@ -48,9 +46,10 @@ //-------------------------------------------------------------------- // COMMON CONFIGURATION //-------------------------------------------------------------------- + // defined by compiler flags for flexibility #ifndef CFG_TUSB_MCU - #error CFG_TUSB_MCU should be defined using compiler flags + #error CFG_TUSB_MCU must be defined #endif #define CFG_TUSB_RHPORT0_MODE OPT_MODE_DEVICE @@ -63,6 +62,21 @@ //#define CFG_TUD_TASK_QUEUE_SZ 16 //#define CFG_TUD_TASK_STACK_SZ 150 +/* USB DMA on some MCUs can only access a specific SRAM region with restriction on alignment. + * Tinyusb use follows macros to declare transferring memory so that they can be put + * into those specific section. + * e.g + * - CFG_TUSB_MEM SECTION : __attribute__ (( section(".usb_ram") )) + * - CFG_TUSB_MEM_ALIGN : __attribute__ ((aligned(4))) + */ +#ifndef CFG_TUSB_MEM_SECTION +#define CFG_TUSB_MEM_SECTION +#endif + +#ifndef CFG_TUSB_MEM_ALIGN +#define CFG_TUSB_MEM_ALIGN ATTR_ALIGNED(4) +#endif + //-------------------------------------------------------------------- // DEVICE CONFIGURATION //-------------------------------------------------------------------- @@ -78,12 +92,23 @@ */ #define CFG_TUD_DESC_AUTO 1 -/* USB VID/PID if not defined, tinyusb to use default value +/* If USB VID/PID is not defined, tinyusb will use default value * Note: different class combination e.g CDC and (CDC + MSC) should have different * PID since Host OS will "remembered" device driver after the first plug */ // #define CFG_TUD_DESC_VID 0xCAFE // #define CFG_TUD_DESC_PID 0x0001 +// LPC175x_6x's endpoint type (bulk/interrupt/iso) are fixed by its number +// Therefor we need to force endpoint number to correct type on lpc17xx +#if CFG_TUSB_MCU == OPT_MCU_LPC175X_6X +#define CFG_TUD_DESC_CDC_EPNUM_NOTIF 1 +#define CFG_TUD_DESC_CDC_EPNUM 2 +#define CFG_TUD_DESC_MSC_EPNUM 5 +#define CFG_TUD_DESC_HID_KEYBOARD_EPNUM 4 +#define CFG_TUD_DESC_HID_MOUSE_EPNUM 7 +#endif + + //------------- CLASS -------------// #define CFG_TUD_CDC 1 #define CFG_TUD_MSC 1 @@ -137,13 +162,6 @@ */ #define CFG_TUD_HID_ASCII_TO_KEYCODE_LOOKUP 1 -//-------------------------------------------------------------------- -// USB RAM PLACEMENT -//-------------------------------------------------------------------- -#define CFG_TUSB_MEM_SECTION -#define CFG_TUSB_MEM_ALIGN ATTR_ALIGNED(4) - - #ifdef __cplusplus } #endif diff --git a/hw/bsp/lpcxpresso1769/board_lpcxpresso1769.h b/hw/bsp/lpcxpresso1769/board_lpcxpresso1769.h index 9f2f94865..afec82282 100644 --- a/hw/bsp/lpcxpresso1769/board_lpcxpresso1769.h +++ b/hw/bsp/lpcxpresso1769/board_lpcxpresso1769.h @@ -42,7 +42,6 @@ #include "LPC17xx.h" #include "lpc17xx_clkpwr.h" -#include "lpc17xx_pinsel.h" #include "lpc17xx_gpio.h" #include "lpc17xx_uart.h" diff --git a/src/portable/nxp/lpc17xx/dcd_lpc175x_6x.c b/src/portable/nxp/lpc17xx/dcd_lpc175x_6x.c index 562bc33aa..517f037d0 100644 --- a/src/portable/nxp/lpc17xx/dcd_lpc175x_6x.c +++ b/src/portable/nxp/lpc17xx/dcd_lpc175x_6x.c @@ -44,6 +44,8 @@ #include "dcd_lpc175x_6x.h" #include "LPC17xx.h" +#include "osal/osal.h" + //--------------------------------------------------------------------+ // MACRO CONSTANT TYPEDEF //--------------------------------------------------------------------+ @@ -196,6 +198,16 @@ bool dcd_init(uint8_t rhport) sie_write(SIE_CMDCODE_DEVICE_STATUS, 1, 1); // connect + // USB IRQ priority should be set by application previously + // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) +#if CFG_TUSB_OS == OPT_OS_FREERTOS + if ( NVIC_GetPriority(USB_IRQn) < configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY ) + { + NVIC_SetPriority(USB_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY ); + } +#endif + + NVIC_ClearPendingIRQ(USB_IRQn); NVIC_EnableIRQ(USB_IRQn); return TUSB_ERROR_NONE; diff --git a/src/portable/nxp/lpc17xx/hal_lpc175x_6x.c b/src/portable/nxp/lpc17xx/hal_lpc175x_6x.c index cfe392e46..13cb178f2 100644 --- a/src/portable/nxp/lpc17xx/hal_lpc175x_6x.c +++ b/src/portable/nxp/lpc17xx/hal_lpc175x_6x.c @@ -41,6 +41,7 @@ #if CFG_TUSB_MCU == OPT_MCU_LPC175X_6X #include "LPC17xx.h" +#include "lpc17xx_pinsel.h" void tusb_hal_int_enable(uint8_t rhport) {