diff --git a/hw/bsp/ch32v307/boards/ch32v307v-r1-1v0/debug_uart.c b/hw/bsp/ch32v307/boards/ch32v307v-r1-1v0/debug_uart.c index ad8b32957..45fc9e3aa 100644 --- a/hw/bsp/ch32v307/boards/ch32v307v-r1-1v0/debug_uart.c +++ b/hw/bsp/ch32v307/boards/ch32v307v-r1-1v0/debug_uart.c @@ -77,34 +77,34 @@ void uart_sync(void) void usart_printf_init(uint32_t baudrate) { - GPIO_InitTypeDef GPIO_InitStructure; - USART_InitTypeDef USART_InitStructure; + GPIO_InitTypeDef GPIO_InitStructure; + USART_InitTypeDef USART_InitStructure; - tx_produce = 0; - tx_consume = 0; + tx_produce = 0; + tx_consume = 0; - RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1 | RCC_APB2Periph_GPIOA, ENABLE); + RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1 | RCC_APB2Periph_GPIOA, ENABLE); - GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9; - GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; - GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; - GPIO_Init(GPIOA, &GPIO_InitStructure); + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; + GPIO_Init(GPIOA, &GPIO_InitStructure); - USART_InitStructure.USART_BaudRate = baudrate; - USART_InitStructure.USART_WordLength = USART_WordLength_8b; - USART_InitStructure.USART_StopBits = USART_StopBits_1; - USART_InitStructure.USART_Parity = USART_Parity_No; - USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None; - USART_InitStructure.USART_Mode = USART_Mode_Tx; + USART_InitStructure.USART_BaudRate = baudrate; + USART_InitStructure.USART_WordLength = USART_WordLength_8b; + USART_InitStructure.USART_StopBits = USART_StopBits_1; + USART_InitStructure.USART_Parity = USART_Parity_No; + USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None; + USART_InitStructure.USART_Mode = USART_Mode_Tx; - USART_Init(USART1, &USART_InitStructure); - USART_ITConfig(USART1, USART_IT_TC, ENABLE); - USART_Cmd(USART1, ENABLE); + USART_Init(USART1, &USART_InitStructure); + USART_ITConfig(USART1, USART_IT_TC, ENABLE); + USART_Cmd(USART1, ENABLE); - NVIC_InitTypeDef NVIC_InitStructure = {0}; - NVIC_InitStructure.NVIC_IRQChannel = USART1_IRQn; - NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1; - NVIC_InitStructure.NVIC_IRQChannelSubPriority = 3; - NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; - NVIC_Init(&NVIC_InitStructure); + NVIC_InitTypeDef NVIC_InitStructure = { 0 }; + NVIC_InitStructure.NVIC_IRQChannel = USART1_IRQn; + NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1; + NVIC_InitStructure.NVIC_IRQChannelSubPriority = 3; + NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; + NVIC_Init(&NVIC_InitStructure); } diff --git a/hw/bsp/ch32v307/family.c b/hw/bsp/ch32v307/family.c index 65519ce50..d5602c7b4 100644 --- a/hw/bsp/ch32v307/family.c +++ b/hw/bsp/ch32v307/family.c @@ -106,17 +106,22 @@ void board_init(void) { volatile uint32_t system_ticks = 0; /* Small workaround to support HW stack save/restore */ -void SysTick_Handler(void) __attribute__((naked)); -void SysTick_Handler(void) { - __asm volatile ("call SysTick_Handler_impl; mret"); +void SysTick_Handler (void) __attribute__((naked)); +void SysTick_Handler (void) +{ + __asm volatile ("call SysTick_Handler_impl; mret"); } -__attribute__((used)) void SysTick_Handler_impl(void) { - SysTick->SR=0; +__attribute__((used)) void SysTick_Handler_impl (void) +{ + SysTick->SR = 0; system_ticks++; } -uint32_t board_millis(void) { return system_ticks; } +uint32_t board_millis (void) +{ + return system_ticks; +} #endif diff --git a/hw/bsp/ch32v307/family.mk b/hw/bsp/ch32v307/family.mk index 49e496853..15f6724a8 100644 --- a/hw/bsp/ch32v307/family.mk +++ b/hw/bsp/ch32v307/family.mk @@ -13,8 +13,6 @@ CH32V307_SDK_SRC = $(CH32V307_SDK)/EVT/EXAM/SRC include $(TOP)/$(BOARD_PATH)/board.mk -SKIP_NANOLIB = 1 - CFLAGS += \ -flto \ -march=rv32imac \ @@ -30,9 +28,6 @@ CFLAGS += \ -Xlinker --gc-sections \ -DBOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED -LDFLAGS += \ - -Xlinker --gc-sections --specs=nano.specs --specs=nosys.specs - SRC_C += \ src/portable/wch/ch32v307/dcd_usbhs.c \ $(CH32V307_SDK_SRC)/Core/core_riscv.c \