bug: interrupts flag are not cleared; fix: don't use interrupts (not worth the complexity for this application)
This commit is contained in:
parent
3a0d9e6186
commit
d171eaa2bc
|
@ -40,8 +40,6 @@
|
|||
/** I2C peripheral */
|
||||
#define I2C I2C1 /**< I2C peripheral */
|
||||
#define I2C_RCC RCC_I2C1 /**< I2C peripheral clock */
|
||||
#define I2C_IRQ NVIC_I2C1_EV_IRQ /**< I2C peripheral interrupt */
|
||||
#define I2C_ISR i2c1_ev_isr /**< I2C event interrupt service routine */
|
||||
#define I2C_PORT GPIOB /**< I2C peripheral port */
|
||||
#define I2C_PIN_SDA GPIO_I2C1_SDA /**< I2C peripheral data pin (PB7) */
|
||||
#define I2C_PIN_SCL GPIO_I2C1_SCL /**< I2C peripheral clock pin (PB6) */
|
||||
|
@ -62,8 +60,6 @@ void rtc_setup(void)
|
|||
i2c_set_standard_mode(I2C); // the DS1307 has a maximum I2C SCL freq if 100 kHz (corresponding to the standard mode)
|
||||
i2c_set_ccr(I2C, rcc_apb1_frequency/(100E3*2)); // set Thigh/Tlow to generate frequency of 100 kHz
|
||||
i2c_set_trise(I2C, rcc_apb1_frequency/1E6); // max rise time for 100 kHz is 1000 ns (~1 MHz)
|
||||
i2c_enable_interrupt(I2C, I2C_CR2_ITEVTEN|I2C_CR2_ITBUFEN); // enable interrupts for events and buffer changes
|
||||
nvic_enable_irq(I2C_IRQ); // enable interrupts for I2C
|
||||
i2c_peripheral_enable(I2C); // enable I2C after configuration completed
|
||||
}
|
||||
|
||||
|
@ -80,31 +76,21 @@ static bool rtc_read_memory(uint8_t addr, uint8_t* data, size_t len)
|
|||
goto error;
|
||||
}
|
||||
i2c_send_start(I2C); // send start condition to start transaction
|
||||
while (!(I2C_SR1(I2C) & I2C_SR1_SB)) { // wait until start condition is transmitted
|
||||
__WFI(); // go to sleep
|
||||
}
|
||||
while (!(I2C_SR1(I2C) & I2C_SR1_SB)); // wait until start condition is transmitted
|
||||
if (!(I2C_SR2(I2C) & I2C_SR2_MSL)) { // verify if in master mode
|
||||
goto error;
|
||||
}
|
||||
i2c_send_7bit_address(I2C, I2C_ADDR, I2C_WRITE); // select slave
|
||||
while (!(I2C_SR1(I2C) & I2C_SR1_ADDR)) { // wait until address is transmitted
|
||||
__WFI(); // go to sleep
|
||||
}
|
||||
while (!(I2C_SR1(I2C) & I2C_SR1_ADDR)); // wait until address is transmitted
|
||||
if (!((I2C_SR2(I2C) & I2C_SR2_TRA))) { // verify we are in transmit mode (and read SR2 to clear ADDR)
|
||||
goto error;
|
||||
}
|
||||
i2c_send_data(I2C, addr); // send memory address we want to read
|
||||
while (!(I2C_SR1(I2C) & I2C_SR1_TxE)) { // wait until byte has been transmitted
|
||||
__WFI(); // go to sleep
|
||||
}
|
||||
while (!(I2C_SR1(I2C) & I2C_SR1_TxE)); // wait until byte has been transmitted
|
||||
i2c_send_start(I2C); // send restart condition to switch from write to read mode
|
||||
while (!(I2C_SR1(I2C) & I2C_SR1_SB)) { // wait until start condition is transmitted
|
||||
__WFI(); // go to sleep
|
||||
}
|
||||
while (!(I2C_SR1(I2C) & I2C_SR1_SB)); // wait until start condition is transmitted
|
||||
i2c_send_7bit_address(I2C, I2C_ADDR, I2C_READ); // select slave
|
||||
while (!(I2C_SR1(I2C) & I2C_SR1_ADDR)) { // wait until address is transmitted
|
||||
__WFI(); // go to sleep
|
||||
}
|
||||
while (!(I2C_SR1(I2C) & I2C_SR1_ADDR)); // wait until address is transmitted
|
||||
if ((I2C_SR2(I2C) & I2C_SR2_TRA)) { // verify we are in read mode (and read SR2 to clear ADDR)
|
||||
goto error;
|
||||
}
|
||||
|
@ -115,9 +101,7 @@ static bool rtc_read_memory(uint8_t addr, uint8_t* data, size_t len)
|
|||
} else {
|
||||
i2c_enable_ack(I2C); // ACK received byte to continue slave transmission
|
||||
}
|
||||
while (!(I2C_SR1(I2C) & I2C_SR1_RxNE)) { // wait until byte has been received
|
||||
__WFI(); // go to sleep
|
||||
}
|
||||
while (!(I2C_SR1(I2C) & I2C_SR1_RxNE)); // wait until byte has been received
|
||||
data[i] = i2c_get_data(I2C); // read received byte
|
||||
}
|
||||
to_return = true;
|
||||
|
@ -125,9 +109,7 @@ error:
|
|||
if (I2C_SR2(I2C) & I2C_SR2_BUSY) { // release bus if busy
|
||||
i2c_send_stop(I2C); // send stop to release bus
|
||||
}
|
||||
while (I2C_SR2(I2C) & I2C_SR2_MSL) { // wait until bus released (non master mode)
|
||||
__WFI(); // go to sleep
|
||||
}
|
||||
while (I2C_SR2(I2C) & I2C_SR2_MSL); // wait until bus released (non master mode)
|
||||
return to_return;
|
||||
}
|
||||
|
||||
|
@ -405,8 +387,3 @@ bool rtc_write_time(uint8_t seconds, uint8_t minutes, uint8_t hours, uint8_t day
|
|||
|
||||
return rtc_write_memory(0, data, LENGTH(data)); // write time values on RTC
|
||||
}
|
||||
|
||||
/** I2C event interrupt service routine */
|
||||
void I2C_ISR(void) {
|
||||
// do nothing except wake up
|
||||
}
|
||||
|
|
Loading…
Reference in New Issue