From 47bf1cd944cffa67bc3b6a5d15026bb8c8b346db Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?King=20K=C3=A9vin?= <kingkevin@cuvoodoo.info>
Date: Wed, 16 Oct 2013 21:56:05 +0200
Subject: [PATCH] corrected flag clearing

---
 firmware/main.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/firmware/main.c b/firmware/main.c
index f7f7ec8..daff9cc 100644
--- a/firmware/main.c
+++ b/firmware/main.c
@@ -160,13 +160,13 @@ static void ioinit(void)
 	/* clock/64 prescaler */
 	TCCR2B |= (1<<CS22);
 	TCCR2B &= ~((1<<CS21)|(1<<CS20));
-	TIFR2 &= ~(1<<TOV2); /* clear timer 2 overflow interrupt flag */
+	TIFR2 = (1<<TOV2); /* clear timer 2 overflow interrupt flag */
 	TIMSK2 |= (1<<TOIE2); /* enable timer 2 overflow interrupt */
 
 	/* configure IR receiver */
 	DDRB &= ~(1<<IR); /* IR (PB0/PCINT0) receiver is input */
 	ir = PINB&(1<<IR); /* save state */
-	PCIFR &= ~(1<<PCIF0); /* clear interrupt flag */
+	PCIFR = (1<<PCIF0); /* clear interrupt flag */
 	PCICR |= (1<<PCIE0); /* enable interrupt for PCINT[7:0] */
 	PCMSK0 |= (1<<PCINT0); /* enable interrupt for PCINT0 */
 	/* use timer 1 to measure IR pulse */
@@ -200,7 +200,7 @@ static void ioinit(void)
 	TCCR0B &= ~(1<<CS02);
 	TCCR0B |= (1<<CS01)|(1<<CS00);
 	OCR0A = 0xff; /* set PWM speed */
-	TIFR0 &= ~(1<<OCF0A); /* clear timer 0 compare interrupt flag */
+	TIFR0 = (1<<OCF0A); /* clear timer 0 compare interrupt flag */
 	TIMSK0 |= (1<<OCIE0A); /* enable timer 0 compare interrupt */
 
 	/* use UART as terminal */