diff --git a/lib/vfd.c b/lib/vfd.c index e6ddf95..46a0e50 100644 --- a/lib/vfd.c +++ b/lib/vfd.c @@ -302,13 +302,13 @@ static const uint8_t pict5x7[][5] = { /* the 32 bits values to be shifted out to the VFD driver * split into 16 bit for SPI transfer - * since the bits for digits and matrix are independant, they can be conbined + * since the bits for digits and matrix are independent, they can be combined * we have more matrix (12) than digits (10) */ static uint16_t driver_data[VFD_MATRIX][VFD_DRIVERS*2] = {0}; static volatile uint8_t spi_i = 0; // which driver data is being transmitted -static volatile uint8_t vfd_mux = 0; // which part to output -static const uint32_t digit_mask = 0x00fff0; // the bits used for selecting then digit and 7 segment anodes (for the second driver) +static volatile uint8_t vfd_grid = 0; // which grid/part to activate (single digits and matrix can be combined) +static const uint32_t digit_mask = 0x00fffff0; // the bits used for selecting then digit and 7 segment anodes (for the second driver) /* set digit to ASCII character * use the MSB of to enable the dot */ @@ -478,7 +478,7 @@ void vfd_setup(void) timer_reset(VFD_TIMER); // reset timer state timer_set_mode(VFD_TIMER, TIM_CR1_CKD_CK_INT, TIM_CR1_CMS_EDGE, TIM_CR1_DIR_UP); // set timer mode, use undivided timer clock,edge alignment (simple count), and count up timer_set_prescaler(VFD_TIMER, (SYSTEM_CLOCK_FREQ/(1<<16))-1); // set the prescaler so this 16 bits timer overflows at 1Hz - timer_set_period(VFD_TIMER, 0xffff/(VFD_DIGITS+VFD_MATRIX)/150); // set the refresh frequency + timer_set_period(VFD_TIMER, 0xffff/LENGTH(driver_data)/100); // set the refresh frequency timer_enable_irq(VFD_TIMER, TIM_DIER_UIE); // enable interrupt for timer nvic_enable_irq(VFD_TIMER_IRQ); // allow interrupt for timer @@ -494,7 +494,7 @@ void spi2_isr(void) if (SPI_SR(VFD_SPI) & SPI_SR_TXE) { // transmission buffer empty if (spi_i