fix digit mask

This commit is contained in:
King Kévin 2016-01-25 10:15:09 +01:00
parent f5f4fa55eb
commit f65a53f606
1 changed files with 6 additions and 6 deletions

View File

@ -302,13 +302,13 @@ static const uint8_t pict5x7[][5] = {
/* the 32 bits values to be shifted out to the VFD driver
* split into 16 bit for SPI transfer
* since the bits for digits and matrix are independant, they can be conbined
* since the bits for digits and matrix are independent, they can be combined
* we have more matrix (12) than digits (10)
*/
static uint16_t driver_data[VFD_MATRIX][VFD_DRIVERS*2] = {0};
static volatile uint8_t spi_i = 0; // which driver data is being transmitted
static volatile uint8_t vfd_mux = 0; // which part to output
static const uint32_t digit_mask = 0x00fff0; // the bits used for selecting then digit and 7 segment anodes (for the second driver)
static volatile uint8_t vfd_grid = 0; // which grid/part to activate (single digits and matrix can be combined)
static const uint32_t digit_mask = 0x00fffff0; // the bits used for selecting then digit and 7 segment anodes (for the second driver)
/* set digit <nb> to ASCII character <c>
* use the MSB of <c> to enable the dot */
@ -478,7 +478,7 @@ void vfd_setup(void)
timer_reset(VFD_TIMER); // reset timer state
timer_set_mode(VFD_TIMER, TIM_CR1_CKD_CK_INT, TIM_CR1_CMS_EDGE, TIM_CR1_DIR_UP); // set timer mode, use undivided timer clock,edge alignment (simple count), and count up
timer_set_prescaler(VFD_TIMER, (SYSTEM_CLOCK_FREQ/(1<<16))-1); // set the prescaler so this 16 bits timer overflows at 1Hz
timer_set_period(VFD_TIMER, 0xffff/(VFD_DIGITS+VFD_MATRIX)/150); // set the refresh frequency
timer_set_period(VFD_TIMER, 0xffff/LENGTH(driver_data)/100); // set the refresh frequency
timer_enable_irq(VFD_TIMER, TIM_DIER_UIE); // enable interrupt for timer
nvic_enable_irq(VFD_TIMER_IRQ); // allow interrupt for timer
@ -494,7 +494,7 @@ void spi2_isr(void)
if (SPI_SR(VFD_SPI) & SPI_SR_TXE) { // transmission buffer empty
if (spi_i<LENGTH(driver_data[0])) { // check if data is available
gpio_clear(VFD_PORT, VFD_NLE); // slave select to latch data
spi_send(VFD_SPI, driver_data[vfd_mux][spi_i++]); // send next data
spi_send(VFD_SPI, driver_data[vfd_grid][spi_i++]); // send next data
} else { // all data transmitted
spi_disable_tx_buffer_empty_interrupt(VFD_SPI); // no need to wait for new data
while (SPI_SR(VFD_SPI) & SPI_SR_BSY); // wait for data to be shifted out
@ -520,6 +520,6 @@ void tim5_isr(void)
timer_clear_flag(VFD_TIMER, TIM_SR_UIF); // clear flag
spi_i = 0; // set the register to shift out
spi_enable_tx_buffer_empty_interrupt(VFD_SPI); // enable TX empty interrupt
vfd_mux = (vfd_mux+1)%LENGTH(driver_data); // got to next segment
vfd_grid = (vfd_grid+1)%LENGTH(driver_data); // got to next segment
}
}