/* * The MIT License (MIT) * * Copyright (c) 2020, Ha Thach (tinyusb.org) * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal * in the Software without restriction, including without limitation the rights * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell * copies of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. * * This file is part of the TinyUSB stack. */ #ifndef BOARD_H_ #define BOARD_H_ #ifdef __cplusplus extern "C" { #endif #define LED_PORT GPIOB #define LED_PIN GPIO_PIN_2 #define LED_STATE_ON 1 #define BUTTON_PORT GPIOA #define BUTTON_PIN GPIO_PIN_0 #define BUTTON_STATE_ACTIVE 1 #define UART_DEV USART2 #define UART_CLK_EN __HAL_RCC_USART2_CLK_ENABLE #define UART_GPIO_PORT GPIOD #define UART_GPIO_AF GPIO_AF7_USART2 #define UART_TX_PIN GPIO_PIN_5 #define UART_RX_PIN GPIO_PIN_6 //--------------------------------------------------------------------+ // RCC Clock //--------------------------------------------------------------------+ /** * @brief System Clock Configuration * The system Clock is configured as follow : * * If define USB_USE_LSE_MSI_CLOCK enabled: * System Clock source = PLL (MSI) * SYSCLK(Hz) = 80000000 * HCLK(Hz) = 80000000 * AHB Prescaler = 1 * APB1 Prescaler = 1 * APB2 Prescaler = 2 * MSI Frequency(Hz) = 4800000 * LSE Frequency(Hz) = 32768 * PLL_M = 6 * PLL_N = 40 * PLL_P = 7 * PLL_Q = 4 * PLL_R = 4 * Flash Latency(WS) = 4 * @param None * @retval None */ static inline void board_clock_init(void) { RCC_ClkInitTypeDef RCC_ClkInitStruct; RCC_OscInitTypeDef RCC_OscInitStruct; RCC_PeriphCLKInitTypeDef PeriphClkInitStruct; /* Enable the LSE Oscillator */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSE; RCC_OscInitStruct.LSEState = RCC_LSE_ON; RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; HAL_RCC_OscConfig(&RCC_OscInitStruct); /* Enable the CSS interrupt in case LSE signal is corrupted or not present */ HAL_RCCEx_DisableLSECSS(); /* Set tick interrupt priority, default HAL value is intentionally invalid and that prevents PLL initialization in HAL_RCC_OscConfig() */ HAL_InitTick((1UL << __NVIC_PRIO_BITS) - 1UL); /* Enable MSI Oscillator and activate PLL with MSI as source */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI; RCC_OscInitStruct.MSIState = RCC_MSI_ON; RCC_OscInitStruct.MSICalibrationValue = RCC_MSICALIBRATION_DEFAULT; RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_11; RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_MSI; RCC_OscInitStruct.PLL.PLLM = 6; RCC_OscInitStruct.PLL.PLLN = 40; RCC_OscInitStruct.PLL.PLLP = 7; RCC_OscInitStruct.PLL.PLLQ = 4; RCC_OscInitStruct.PLL.PLLR = 4; HAL_RCC_OscConfig(&RCC_OscInitStruct); /* Enable MSI Auto-calibration through LSE */ HAL_RCCEx_EnableMSIPLLMode(); /* Select MSI output as USB clock source */ PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB; PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_MSI; HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct); /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers */ RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2); RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4); } static inline void board_vbus_sense_init(void) { // L476Disco use general GPIO PC11 for VBUS sensing instead of dedicated PA9 as others // Disable VBUS Sense and force device mode USB_OTG_FS->GCCFG &= ~USB_OTG_GCCFG_VBDEN; USB_OTG_FS->GOTGCTL |= USB_OTG_GOTGCTL_BVALOEN | USB_OTG_GOTGCTL_BVALOVAL; } #ifdef __cplusplus } #endif #endif /* BOARD_H_ */