diff --git a/hw/bsp/stm32f070rbnucleo/board.mk b/hw/bsp/stm32f070rbnucleo/board.mk
index 5206a6f9..a278b7b9 100644
--- a/hw/bsp/stm32f070rbnucleo/board.mk
+++ b/hw/bsp/stm32f070rbnucleo/board.mk
@@ -3,7 +3,7 @@ CFLAGS += \
 	-DSTM32F070xB \
 	-mthumb \
 	-mabi=aapcs-linux \
-	-mcpu=cortex-m4 \
+	-mcpu=cortex-m0 \
 	-mfloat-abi=soft \
 	-nostdlib -nostartfiles \
 	-DCFG_TUSB_MCU=OPT_MCU_STM32_FSDEV
diff --git a/hw/bsp/stm32f070rbnucleo/stm32f070rbnucleo.c b/hw/bsp/stm32f070rbnucleo/stm32f070rbnucleo.c
index 8f864f73..9f3dd30d 100644
--- a/hw/bsp/stm32f070rbnucleo/stm32f070rbnucleo.c
+++ b/hw/bsp/stm32f070rbnucleo/stm32f070rbnucleo.c
@@ -91,6 +91,14 @@ void board_init(void)
   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
   HAL_GPIO_Init(BUTTON_PORT, &GPIO_InitStruct);
 
+  // Start USB clock
+  __HAL_RCC_USB_CLK_ENABLE();
+}
+
+void dcd_fs_irqHandler(void);
+void USB_IRQHandler(void)
+{
+	dcd_fs_irqHandler();
 }
 
 //--------------------------------------------------------------------+
diff --git a/hw/bsp/stm32f303disco/stm32f303disco.c b/hw/bsp/stm32f303disco/stm32f303disco.c
index 45ba7a4f..e8a647a9 100644
--- a/hw/bsp/stm32f303disco/stm32f303disco.c
+++ b/hw/bsp/stm32f303disco/stm32f303disco.c
@@ -86,6 +86,10 @@ void board_init(void)
   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
   HAL_GPIO_Init(BUTTON_PORT, &GPIO_InitStruct);
 
+
+  // Start USB clock
+  __HAL_RCC_USB_CLK_ENABLE();
+
 #if 0
   RCC->AHB2ENR |= RCC_AHB2ENR_OTGFSEN;
 
@@ -105,6 +109,31 @@ void board_init(void)
 #endif
 }
 
+// USB defaults to using interrupts 19, 20, and 42 (based on SYSCFG_CFGR1.USB_IT_RMP)
+// FIXME: Do all three need to be handled, or just the LP one?
+void dcd_fs_irqHandler(void);
+// USB high-priority interrupt (Channel 19): Triggered only by a correct
+// transfer event for isochronous and double-buffer bulk transfer to reach
+// the highest possible transfer rate.
+void USB_HP_CAN_TX_IRQHandler(void)
+{
+	dcd_fs_irqHandler();
+}
+
+// USB low-priority interrupt (Channel 20): Triggered by all USB events
+// (Correct transfer, USB reset, etc.). The firmware has to check the
+// interrupt source before serving the interrupt.
+void USB_LP_CAN_RX0_IRQHandler(void)
+{
+	dcd_fs_irqHandler();
+}
+// USB wakeup interrupt (Channel 42): Triggered by the wakeup event from the USB
+// Suspend mode.
+void USBWakeUp_IRQHandler(void)
+{
+	dcd_fs_irqHandler();
+}
+
 //--------------------------------------------------------------------+
 // Board porting API
 //--------------------------------------------------------------------+
diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
index 2411c1c3..8f809b6a 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
@@ -125,14 +125,18 @@
  * Checks, structs, defines, function definitions, etc.
  */
 
-#if (MAX_EP_COUNT > 8)
+#if ((MAX_EP_COUNT) > 8)
 #  error Only 8 endpoints supported on the hardware
 #endif
 
-#if ((DCD_STM32_BTABLE_BASE + DCD_STM32_BTABLE_LENGTH)>PMA_LENGTH)
+#if (((DCD_STM32_BTABLE_BASE) + (DCD_STM32_BTABLE_LENGTH))>(PMA_LENGTH))
 #  error BTABLE does not fit in PMA RAM
 #endif
 
+#if (((DCD_STM32_BTABLE_BASE) % 8) != 0)
+// per STM32F3 reference manual
+#error BTABLE must be aligned to 8 bytes
+#endif
 // Max size of a USB FS packet is 64...
 #define MAX_PACKET_SIZE 64