From 3e6feb7f6d59ff500395471561e24b449356e2f1 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Jan=20D=C3=BCmpelmann?= <jan.duempelmann@inotec-licht.de>
Date: Wed, 29 Apr 2020 11:32:22 +0200
Subject: [PATCH 01/25] Redesign of Synopsys device transmission

Changes:
  - checking if tx buffer empty interrupt is masked
  - process more than one packet in isr
  - mask tx buffer empty just after all bytes were written
  - use of transmit_fifo_packet instead of transmit_packet
---
 src/portable/st/synopsys/dcd_synopsys.c | 86 ++++++++++++-------------
 1 file changed, 43 insertions(+), 43 deletions(-)

diff --git a/src/portable/st/synopsys/dcd_synopsys.c b/src/portable/st/synopsys/dcd_synopsys.c
index 4e0d6f8c..39079c9d 100644
--- a/src/portable/st/synopsys/dcd_synopsys.c
+++ b/src/portable/st/synopsys/dcd_synopsys.c
@@ -195,7 +195,7 @@ void dcd_init (uint8_t rhport)
 
   // Programming model begins in the last section of the chapter on the USB
   // peripheral in each Reference Manual.
-  USB_OTG_FS->GAHBCFG |= USB_OTG_GAHBCFG_TXFELVL | USB_OTG_GAHBCFG_GINT;
+  USB_OTG_FS->GAHBCFG |= USB_OTG_GAHBCFG_GINT;
 
   // No HNP/SRP (no OTG support), program timeout later, turnaround
   // programmed for 32+ MHz.
@@ -374,7 +374,6 @@ bool dcd_edpt_xfer (uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t
                             ((total_bytes & USB_OTG_DIEPTSIZ_XFRSIZ_Msk) << USB_OTG_DIEPTSIZ_XFRSIZ_Pos);
 
     in_ep[epnum].DIEPCTL |= USB_OTG_DIEPCTL_EPENA | USB_OTG_DIEPCTL_CNAK;
-
     // Enable fifo empty interrupt only if there are something to put in the fifo.
     if(total_bytes != 0) {
       dev->DIEPEMPMSK |= (1 << epnum);
@@ -539,46 +538,27 @@ static void receive_packet(xfer_ctl_t * xfer, /* USB_OTG_OUTEndpointTypeDef * ou
   xfer->short_packet = (xfer_size < xfer->max_size);
 }
 
-// Write a data packet to EPIN FIFO
-static void transmit_packet(xfer_ctl_t * xfer, USB_OTG_INEndpointTypeDef * in_ep, uint8_t fifo_num) {
-  usb_fifo_t tx_fifo = FIFO_BASE(fifo_num);
+// Write a single data packet to EPIN FIFO
+static void transmit_fifo_packet(uint8_t fifo_num, uint8_t * src, uint16_t len){
+	usb_fifo_t tx_fifo = FIFO_BASE(fifo_num);
 
-  uint16_t remaining = (in_ep->DIEPTSIZ & USB_OTG_DIEPTSIZ_XFRSIZ_Msk) >> USB_OTG_DIEPTSIZ_XFRSIZ_Pos;
-  xfer->queued_len = xfer->total_len - remaining;
+	// Pushing full available 32 bit words to fifo
+	uint16_t full_words = len >> 2;
+	for(uint16_t i = 0; i < full_words; i++){
+		*tx_fifo = (src[3] << 24) | (src[2] << 16) | (src[1] << 8) | src[0];
+		src += 4;
+	}
 
-  uint16_t to_xfer_size = (remaining > xfer->max_size) ? xfer->max_size : remaining;
-  uint8_t to_xfer_rem = to_xfer_size % 4;
-  uint16_t to_xfer_size_aligned = to_xfer_size - to_xfer_rem;
-
-  // Buffer might not be aligned to 32b, so we need to force alignment
-  // by copying to a temp var.
-  uint8_t * base = (xfer->buffer + xfer->queued_len);
-
-  // This for loop always runs at least once- skip if less than 4 bytes
-  // to send off.
-  if(to_xfer_size >= 4) {
-    for(uint16_t i = 0; i < to_xfer_size_aligned; i += 4) {
-      uint32_t tmp = base[i] | (base[i + 1] << 8) | \
-        (base[i + 2] << 16) | (base[i + 3] << 24);
-      (* tx_fifo) = tmp;
-    }
-  }
-
-  // Do not read beyond end of buffer if not divisible by 4.
-  if(to_xfer_rem != 0) {
-    uint32_t tmp = 0;
-    uint8_t * last_32b_bound = base + to_xfer_size_aligned;
-
-    tmp |= last_32b_bound[0];
-    if(to_xfer_rem > 1) {
-      tmp |= (last_32b_bound[1] << 8);
-    }
-    if(to_xfer_rem > 2) {
-      tmp |= (last_32b_bound[2] << 16);
-    }
-
-    (* tx_fifo) = tmp;
-  }
+	// Write the remaining 1-3 bytes into fifo
+	uint32_t tmp_word = 0;
+	switch(len & 0x0003){
+		case 3: tmp_word |= src[2] << 16;
+		case 2: tmp_word |= src[1] << 8;
+		case 1: tmp_word |= src[0];
+			*tx_fifo = tmp_word;
+			break;
+		default: break;
+	}
 }
 
 static void read_rx_fifo(USB_OTG_OUTEndpointTypeDef * out_ep) {
@@ -677,17 +657,37 @@ static void handle_epin_ints(USB_OTG_DeviceTypeDef * dev, USB_OTG_INEndpointType
       }
 
       // XFER FIFO empty
-      if ( in_ep[n].DIEPINT & USB_OTG_DIEPINT_TXFE )
+      if ( (in_ep[n].DIEPINT & USB_OTG_DIEPINT_TXFE) && (dev->DIEPEMPMSK & (1 << n)) )
       {
         // DIEPINT's TXFE bit is read-only, software cannot clear it.
         // It will only be cleared by hardware when written bytes is more than
         // - 64 bytes or
         // - Half of TX FIFO size (configured by DIEPTXF)
 
-        transmit_packet(xfer, &in_ep[n], n);
+      	// Packets to be processed
+      	uint16_t tx_packet_amount = (in_ep[n].DIEPTSIZ & USB_OTG_DIEPTSIZ_PKTCNT_Msk) >> USB_OTG_DIEPTSIZ_PKTCNT_Pos;
+
+      	// Process every single packet (only whole packets can be written to fifo)
+      	for(uint16_t i = 0; i < tx_packet_amount; i++){
+      		// amount of bytes EP still needs to transfer
+      		uint16_t tx_remaining = (in_ep[n].DIEPTSIZ & USB_OTG_DIEPTSIZ_XFRSIZ_Msk) >> USB_OTG_DIEPTSIZ_XFRSIZ_Pos;
+      		// Packet can not be larger than ep max size
+      		uint16_t packet_size = (tx_remaining > xfer->max_size) ? xfer->max_size : tx_remaining;
+
+      		// It's only possible to write full packets into FIFO. Therefore DTXFSTS register of current
+      		// EP has to be checked if the buffer can take another WHOLE packet
+      		if(packet_size > ((in_ep[n].DTXFSTS & USB_OTG_DTXFSTS_INEPTFSAV_Msk) << 2)){
+      			break;
+      		}
+
+      		xfer->queued_len = xfer->total_len - tx_remaining;
+
+      		// Push packet to Tx-FIFO
+					transmit_fifo_packet(n, (xfer->buffer + xfer->queued_len), packet_size);
+      	}
 
         // Turn off TXFE if all bytes are written.
-        if (xfer->queued_len == xfer->total_len)
+        if (((in_ep[n].DIEPTSIZ & USB_OTG_DIEPTSIZ_XFRSIZ_Msk) >> USB_OTG_DIEPTSIZ_XFRSIZ_Pos) == 0)
         {
           dev->DIEPEMPMSK &= ~(1 << n);
         }

From 59ff208c65f1314cdd9691979c849e80920581c1 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Jan=20D=C3=BCmpelmann?= <jan.duempelmann@inotec-licht.de>
Date: Wed, 29 Apr 2020 12:37:29 +0200
Subject: [PATCH 02/25] Changed switch into if statements

---
 src/portable/st/synopsys/dcd_synopsys.c | 19 +++++++++++--------
 1 file changed, 11 insertions(+), 8 deletions(-)

diff --git a/src/portable/st/synopsys/dcd_synopsys.c b/src/portable/st/synopsys/dcd_synopsys.c
index 39079c9d..6686c170 100644
--- a/src/portable/st/synopsys/dcd_synopsys.c
+++ b/src/portable/st/synopsys/dcd_synopsys.c
@@ -550,14 +550,17 @@ static void transmit_fifo_packet(uint8_t fifo_num, uint8_t * src, uint16_t len){
 	}
 
 	// Write the remaining 1-3 bytes into fifo
-	uint32_t tmp_word = 0;
-	switch(len & 0x0003){
-		case 3: tmp_word |= src[2] << 16;
-		case 2: tmp_word |= src[1] << 8;
-		case 1: tmp_word |= src[0];
-			*tx_fifo = tmp_word;
-			break;
-		default: break;
+	uint8_t bytes_rem = len & 0x03;
+	if(bytes_rem){
+		uint32_t tmp_word = 0;
+		tmp_word |= src[0];
+		if(bytes_rem > 1){
+			tmp_word |= src[1] << 8;
+		}
+		if(bytes_rem > 2){
+			tmp_word |= src[2] << 16;
+		}
+		*tx_fifo = tmp_word;
 	}
 }
 

From fd69cc3dcc453b2a14d9e4f71f6acc6627e826d2 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Jan=20D=C3=BCmpelmann?= <jan.duempelmann@inotec-licht.de>
Date: Mon, 4 May 2020 07:59:13 +0200
Subject: [PATCH 03/25] clean up

renaming function and variables
changing indent size
---
 src/portable/st/synopsys/dcd_synopsys.c | 76 ++++++++++++-------------
 1 file changed, 38 insertions(+), 38 deletions(-)

diff --git a/src/portable/st/synopsys/dcd_synopsys.c b/src/portable/st/synopsys/dcd_synopsys.c
index 6686c170..717a59db 100644
--- a/src/portable/st/synopsys/dcd_synopsys.c
+++ b/src/portable/st/synopsys/dcd_synopsys.c
@@ -539,29 +539,29 @@ static void receive_packet(xfer_ctl_t * xfer, /* USB_OTG_OUTEndpointTypeDef * ou
 }
 
 // Write a single data packet to EPIN FIFO
-static void transmit_fifo_packet(uint8_t fifo_num, uint8_t * src, uint16_t len){
-	usb_fifo_t tx_fifo = FIFO_BASE(fifo_num);
+static void write_fifo_packet(uint8_t fifo_num, uint8_t * src, uint16_t len){
+  usb_fifo_t tx_fifo = FIFO_BASE(fifo_num);
 
-	// Pushing full available 32 bit words to fifo
-	uint16_t full_words = len >> 2;
-	for(uint16_t i = 0; i < full_words; i++){
-		*tx_fifo = (src[3] << 24) | (src[2] << 16) | (src[1] << 8) | src[0];
-		src += 4;
-	}
+  // Pushing full available 32 bit words to fifo
+  uint16_t full_words = len >> 2;
+  for(uint16_t i = 0; i < full_words; i++){
+    *tx_fifo = (src[3] << 24) | (src[2] << 16) | (src[1] << 8) | src[0];
+    src += 4;
+  }
 
-	// Write the remaining 1-3 bytes into fifo
-	uint8_t bytes_rem = len & 0x03;
-	if(bytes_rem){
-		uint32_t tmp_word = 0;
-		tmp_word |= src[0];
-		if(bytes_rem > 1){
-			tmp_word |= src[1] << 8;
-		}
-		if(bytes_rem > 2){
-			tmp_word |= src[2] << 16;
-		}
-		*tx_fifo = tmp_word;
-	}
+  // Write the remaining 1-3 bytes into fifo
+  uint8_t bytes_rem = len & 0x03;
+  if(bytes_rem){
+    uint32_t tmp_word = 0;
+    tmp_word |= src[0];
+    if(bytes_rem > 1){
+      tmp_word |= src[1] << 8;
+    }
+    if(bytes_rem > 2){
+      tmp_word |= src[2] << 16;
+    }
+    *tx_fifo = tmp_word;
+  }
 }
 
 static void read_rx_fifo(USB_OTG_OUTEndpointTypeDef * out_ep) {
@@ -652,6 +652,7 @@ static void handle_epin_ints(USB_OTG_DeviceTypeDef * dev, USB_OTG_INEndpointType
 
     if ( dev->DAINT & (1 << (USB_OTG_DAINT_IEPINT_Pos + n)) )
     {
+
       // IN XFER complete (entire xfer).
       if ( in_ep[n].DIEPINT & USB_OTG_DIEPINT_XFRC )
       {
@@ -667,27 +668,26 @@ static void handle_epin_ints(USB_OTG_DeviceTypeDef * dev, USB_OTG_INEndpointType
         // - 64 bytes or
         // - Half of TX FIFO size (configured by DIEPTXF)
 
-      	// Packets to be processed
-      	uint16_t tx_packet_amount = (in_ep[n].DIEPTSIZ & USB_OTG_DIEPTSIZ_PKTCNT_Msk) >> USB_OTG_DIEPTSIZ_PKTCNT_Pos;
+        uint16_t remaining_packets = (in_ep[n].DIEPTSIZ & USB_OTG_DIEPTSIZ_PKTCNT_Msk) >> USB_OTG_DIEPTSIZ_PKTCNT_Pos;
 
-      	// Process every single packet (only whole packets can be written to fifo)
-      	for(uint16_t i = 0; i < tx_packet_amount; i++){
-      		// amount of bytes EP still needs to transfer
-      		uint16_t tx_remaining = (in_ep[n].DIEPTSIZ & USB_OTG_DIEPTSIZ_XFRSIZ_Msk) >> USB_OTG_DIEPTSIZ_XFRSIZ_Pos;
-      		// Packet can not be larger than ep max size
-      		uint16_t packet_size = (tx_remaining > xfer->max_size) ? xfer->max_size : tx_remaining;
+        // Process every single packet (only whole packets can be written to fifo)
+        for(uint16_t i = 0; i < remaining_packets; i++){
+          uint16_t remaining_bytes = (in_ep[n].DIEPTSIZ & USB_OTG_DIEPTSIZ_XFRSIZ_Msk) >> USB_OTG_DIEPTSIZ_XFRSIZ_Pos;
+          // Packet can not be larger than ep max size
+          uint16_t packet_size = tu_min16(remaining_bytes, xfer->max_size);
 
-      		// It's only possible to write full packets into FIFO. Therefore DTXFSTS register of current
-      		// EP has to be checked if the buffer can take another WHOLE packet
-      		if(packet_size > ((in_ep[n].DTXFSTS & USB_OTG_DTXFSTS_INEPTFSAV_Msk) << 2)){
-      			break;
-      		}
+          // It's only possible to write full packets into FIFO. Therefore DTXFSTS register of current
+          // EP has to be checked if the buffer can take another WHOLE packet
+          if(packet_size > ((in_ep[n].DTXFSTS & USB_OTG_DTXFSTS_INEPTFSAV_Msk) << 2)){
+            break;
+          }
 
-      		xfer->queued_len = xfer->total_len - tx_remaining;
+          // TODO: queued_len can be removed later
+          xfer->queued_len = xfer->total_len - remaining_bytes;
 
-      		// Push packet to Tx-FIFO
-					transmit_fifo_packet(n, (xfer->buffer + xfer->queued_len), packet_size);
-      	}
+          // Push packet to Tx-FIFO
+          write_fifo_packet(n, (xfer->buffer + xfer->queued_len), packet_size);
+        }
 
         // Turn off TXFE if all bytes are written.
         if (((in_ep[n].DIEPTSIZ & USB_OTG_DIEPTSIZ_XFRSIZ_Msk) >> USB_OTG_DIEPTSIZ_XFRSIZ_Pos) == 0)

From 58b99e59d44197c32cf68e730f67563f28382d2e Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 5 May 2020 23:07:56 +0700
Subject: [PATCH 04/25] detect if SD is actually present on the flash using SD
 magic

even with SOFTDEVICE_PRESENT defined, SD may not be present on actual
flash.
---
 src/portable/nordic/nrf5x/dcd_nrf5x.c | 28 ++++++++++++++++++---------
 1 file changed, 19 insertions(+), 9 deletions(-)

diff --git a/src/portable/nordic/nrf5x/dcd_nrf5x.c b/src/portable/nordic/nrf5x/dcd_nrf5x.c
index 12435ea2..d788547b 100644
--- a/src/portable/nordic/nrf5x/dcd_nrf5x.c
+++ b/src/portable/nordic/nrf5x/dcd_nrf5x.c
@@ -32,13 +32,6 @@
 #include "nrf_clock.h"
 #include "nrf_power.h"
 #include "nrfx_usbd_errata.h"
-
-#ifdef SOFTDEVICE_PRESENT
-// For enable/disable hfclk with SoftDevice
-#include "nrf_sdm.h"
-#include "nrf_soc.h"
-#endif
-
 #include "device/dcd.h"
 
 // TODO remove later
@@ -564,9 +557,26 @@ void dcd_int_handler(uint8_t rhport)
 // HFCLK helper
 //--------------------------------------------------------------------+
 #ifdef SOFTDEVICE_PRESENT
-// check if SD is present and enabled
-static bool is_sd_enabled(void)
+
+// For enable/disable hfclk with SoftDevice
+#include "nrf_mbr.h"
+#include "nrf_sdm.h"
+#include "nrf_soc.h"
+
+#ifndef SD_MAGIC_NUMBER
+  #define SD_MAGIC_NUMBER   0x51B1E5DB
+#endif
+
+static inline bool is_sd_existed(void)
 {
+  return *((uint32_t*)(SOFTDEVICE_INFO_STRUCT_ADDRESS+4)) == SD_MAGIC_NUMBER;
+}
+
+// check if SD is existed and enabled
+static inline bool is_sd_enabled(void)
+{
+  if ( !is_sd_existed() ) return false;
+
   uint8_t sd_en = false;
   (void) sd_softdevice_is_enabled(&sd_en);
   return sd_en;

From d9e534f6f274d0d8b02a6258a55d6178517bd5fa Mon Sep 17 00:00:00 2001
From: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
Date: Wed, 6 May 2020 14:25:46 +0200
Subject: [PATCH 05/25] stm32l476disco: fix uninitialized filed usage

Field PLLState was not initialized in RCC_OscInitStruct.PLL in
function SystemClock_Config().
Value is used in HAL_RCC_OscConfig() regardless of oscillator.
In lucky case value would be 0 RCC_PLL_NONE and nothing would
happen.
If value was incorrect following line would end up in assert:
assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));

If value was valid but no RCC_PLL_NONE pll could be configured
with some other random values.

Setting PLLState to RCC_PLL_NONE eliminates potential problem.
---
 hw/bsp/stm32l476disco/stm32l476disco.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/hw/bsp/stm32l476disco/stm32l476disco.c b/hw/bsp/stm32l476disco/stm32l476disco.c
index 2d4a4e3d..3ecfc90a 100644
--- a/hw/bsp/stm32l476disco/stm32l476disco.c
+++ b/hw/bsp/stm32l476disco/stm32l476disco.c
@@ -86,9 +86,10 @@ static void SystemClock_Config(void)
   RCC_OscInitTypeDef RCC_OscInitStruct;
   RCC_PeriphCLKInitTypeDef PeriphClkInitStruct;
 
-  /* Enable the LSE Oscilator */
+  /* Enable the LSE Oscillator */
   RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSE;
   RCC_OscInitStruct.LSEState = RCC_LSE_ON;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
   HAL_RCC_OscConfig(&RCC_OscInitStruct);
 
   /* Enable the CSS interrupt in case LSE signal is corrupted or not present */

From 615369a6eb28c9203d33549c8b944d35539de1b9 Mon Sep 17 00:00:00 2001
From: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
Date: Wed, 6 May 2020 14:34:40 +0200
Subject: [PATCH 06/25] stm32l476disco: Fix system clock setup

Code suggested that PLL with MSI is used resulting in 80MHz clock.
When in fact PLL was not configured and system clock was left at MSI 48MHz.

This happens because PLL configuration requires that SysTick interrupt
has interrupt priority level configured correctly.
As it seems ST code intentionally setups variable uwTickPrio to invalid
value and later when it is not setup by user code configuration
of oscillator will fail before PLL is configured.

This simple changes systick priority to some valid value that
allows clock to use PLL.
---
 hw/bsp/stm32l476disco/stm32l476disco.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/hw/bsp/stm32l476disco/stm32l476disco.c b/hw/bsp/stm32l476disco/stm32l476disco.c
index 3ecfc90a..b1884668 100644
--- a/hw/bsp/stm32l476disco/stm32l476disco.c
+++ b/hw/bsp/stm32l476disco/stm32l476disco.c
@@ -95,6 +95,10 @@ static void SystemClock_Config(void)
   /* Enable the CSS interrupt in case LSE signal is corrupted or not present */
   HAL_RCCEx_DisableLSECSS();
 
+  /* Set tick interrupt priority, default HAL value is intentionally invalid
+     and that prevents PLL initialization in HAL_RCC_OscConfig() */
+  HAL_InitTick((1UL << __NVIC_PRIO_BITS) - 1UL);
+
   /* Enable MSI Oscillator and activate PLL with MSI as source */
   RCC_OscInitStruct.OscillatorType      = RCC_OSCILLATORTYPE_MSI;
   RCC_OscInitStruct.MSIState            = RCC_MSI_ON;

From 0f8ab86bee0153c27a691ff9bcc9692e07cd0e7f Mon Sep 17 00:00:00 2001
From: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
Date: Thu, 7 May 2020 09:51:17 +0200
Subject: [PATCH 07/25] Change mynewt package type to sdk

For normal mynewt packages newt tool wants to have specific
folder structure. It wants to have src and include directories,
and only include (and arch related) directory is added to compiler
include search list.
Since TinyUSB has different folder structure newt tool will not
add anything to -I directives and those would need to be
specified as pkg.cflags: "-I@tinyusb/src"

Recent change to newt tool allowed to add specific include directories
for external (sdk) packages so just including package will add
necessary -I to build commands.

This commit changes package type to sdk and specifies src as include
root for TinyUSB.

For older newt tool adding sdk and include_dirs does not break build.
---
 pkg.yml | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/pkg.yml b/pkg.yml
index 3b3e1079..33144502 100644
--- a/pkg.yml
+++ b/pkg.yml
@@ -5,5 +5,10 @@ pkg.homepage: "https://github.com/hathach/tinyusb"
 pkg.keywords:
     - usb
 
+pkg.type: sdk
+
 pkg.deps:
     - "@apache-mynewt-core/kernel/os"
+
+pkg.include_dirs:
+    - src

From 63bd8d2e44225341caae6dafb2affb1fe711a9b4 Mon Sep 17 00:00:00 2001
From: Sean Cross <sean@xobs.io>
Date: Thu, 7 May 2020 19:00:41 +0800
Subject: [PATCH 08/25] device: fix build warning when CFG_TUSB_DEBUG >= 2

The function is defined inside of a function body which generates a
warning.  Circuit Python treats these warnings as errors, and so
refuses to build with debugging enabled:

    ../../lib/tinyusb/src/device/usbd_control.c: In function 'usbd_control_xfer_cb':
    ../../lib/tinyusb/src/device/usbd_control.c:195:19: error: nested extern declaration of 'usbd_driver_print_control_complete_name' [-Werror=nested-externs]
      195 |       extern void usbd_driver_print_control_complete_name(bool (*control_complete) (uint8_t, tusb_control_request_t const *));
          |                   ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
    cc1: all warnings being treated as errors
    make: *** [../../py/mkrules.mk:55:
    build-simmel/lib/tinyusb/src/device/usbd_control.o] Error 1

Move the declaration to the top of the function to silence this warning.

Signed-off-by: Sean Cross <sean@xobs.io>
---
 src/device/usbd_control.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/src/device/usbd_control.c b/src/device/usbd_control.c
index 353a66ad..db0eb70a 100644
--- a/src/device/usbd_control.c
+++ b/src/device/usbd_control.c
@@ -32,6 +32,10 @@
 #include "device/usbd_pvt.h"
 #include "dcd.h"
 
+#if CFG_TUSB_DEBUG >= 2
+extern void usbd_driver_print_control_complete_name(bool (*control_complete) (uint8_t, tusb_control_request_t const *));
+#endif
+
 enum
 {
   EDPT_CTRL_OUT = 0x00,
@@ -192,7 +196,6 @@ bool usbd_control_xfer_cb (uint8_t rhport, uint8_t ep_addr, xfer_result_t result
     if ( _ctrl_xfer.complete_cb )
     {
       #if CFG_TUSB_DEBUG >= 2
-      extern void usbd_driver_print_control_complete_name(bool (*control_complete) (uint8_t, tusb_control_request_t const *));
       usbd_driver_print_control_complete_name(_ctrl_xfer.complete_cb);
       #endif
 

From eeb076454b8e9b91654f0de3ce565e4f1c1967af Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 8 May 2020 12:56:32 +0700
Subject: [PATCH 09/25] add CFG_TUSB_DEBUG_PRINTF() for log retargeting

---
 src/common/tusb_common.h | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/src/common/tusb_common.h b/src/common/tusb_common.h
index 052caef2..2389bfcd 100644
--- a/src/common/tusb_common.h
+++ b/src/common/tusb_common.h
@@ -215,8 +215,11 @@ static inline bool     tu_bit_test (uint32_t value, uint8_t pos) { return (value
 
 void tu_print_mem(void const *buf, uint16_t count, uint8_t indent);
 
-#ifndef tu_printf
-  #define tu_printf         printf
+#ifdef CFG_TUSB_DEBUG_PRINTF
+  extern int CFG_TUSB_DEBUG_PRINTF(const char *format, ...);
+  #define tu_printf    CFG_TUSB_DEBUG_PRINTF
+#else
+  #define tu_printf    printf
 #endif
 
 static inline

From f02ad1d0dcbbad57ccb8308d09843b8f688bcceb Mon Sep 17 00:00:00 2001
From: Mengsk <admin@hifiphile.com>
Date: Fri, 8 May 2020 13:29:33 +0200
Subject: [PATCH 10/25] Add IAR compiler attribute and endian support.

---
 src/common/tusb_compiler.h | 21 ++++++++++++++++++++-
 1 file changed, 20 insertions(+), 1 deletion(-)

diff --git a/src/common/tusb_compiler.h b/src/common/tusb_compiler.h
index e403c749..6f6aa3c3 100644
--- a/src/common/tusb_compiler.h
+++ b/src/common/tusb_compiler.h
@@ -99,7 +99,26 @@
   #define TU_BSWAP16(u16) (__builtin_bswap16(u16))
   #define TU_BSWAP32(u32) (__builtin_bswap32(u32))
 
-#else
+#elif defined(__ICCARM__)
+  #define TU_ATTR_ALIGNED(Bytes)        __attribute__ ((aligned(Bytes)))
+  #define TU_ATTR_SECTION(sec_name)     __attribute__ ((section(#sec_name)))
+  #define TU_ATTR_PACKED                __attribute__ ((packed))
+  #define TU_ATTR_PREPACKED
+  #define TU_ATTR_WEAK                  __attribute__ ((weak))
+  #define TU_ATTR_DEPRECATED(mess)      __attribute__ ((deprecated(mess))) // warn if function with this attribute is used
+  #define TU_ATTR_UNUSED                __attribute__ ((unused))           // Function/Variable is meant to be possibly unused
+  #define TU_ATTR_USED                  __attribute__ ((used))             // Function/Variable is meant to be used
+
+  // Endian conversion use well-known host to network (big endian) naming
+  #if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
+    #define TU_BYTE_ORDER TU_LITTLE_ENDIAN
+  #else
+    #define TU_BYTE_ORDER TU_BIG_ENDIAN
+  #endif
+
+  #define TU_BSWAP16(u16) (__iar_builtin_REV16(u16))
+  #define TU_BSWAP32(u32) (__iar_builtin_REV(u32))
+#else 
   #error "Compiler attribute porting is required"
 #endif
 

From 16a3f0a27a8ba9f2eb92ddbea48c05db952bddb4 Mon Sep 17 00:00:00 2001
From: Ha Thach <thach@tinyusb.org>
Date: Sat, 9 May 2020 17:56:12 +0700
Subject: [PATCH 11/25] Update bug_report.md

---
 .github/ISSUE_TEMPLATE/bug_report.md | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/.github/ISSUE_TEMPLATE/bug_report.md b/.github/ISSUE_TEMPLATE/bug_report.md
index 66f04576..deb14b4e 100644
--- a/.github/ISSUE_TEMPLATE/bug_report.md
+++ b/.github/ISSUE_TEMPLATE/bug_report.md
@@ -22,5 +22,8 @@ Steps to reproduce the behavior:
 2. Click on '....'
 3. See error
 
-**Log & screenshots**
-If applicable, add screenshots and TinyUSB's log to help explain your problem. To enable logging, add `LOG=2` to your make command if building with stock examples or set `CFG_TUSB_DEBUG=2` in your tusb_config.h. More information can be found at [example's readme](/examples/readme.md)
\ No newline at end of file
+**Screenshots**
+If applicable, add screenshots, bus capture to help explain your problem. 
+
+**Log**
+Please provide the stack's log (uart/rtt/swo) where the issue occurred, best with comments to explain the actual events. To enable logging, add `LOG=2` to to the make command if building with stock examples or set `CFG_TUSB_DEBUG=2` in your tusb_config.h. More information can be found at [example's readme](/examples/readme.md)

From 46875a3912cd1fddeef7e6c67744d5bf7cce2155 Mon Sep 17 00:00:00 2001
From: Mengsk <admin@hifiphile.com>
Date: Tue, 12 May 2020 18:50:26 +0200
Subject: [PATCH 12/25] Optimize FIFO for byte transfer.

Signed-off-by: Mengsk <admin@hifiphile.com>
---
 src/common/tusb_fifo.c | 80 ++++++++++++++++++++++++++++--------------
 1 file changed, 53 insertions(+), 27 deletions(-)

diff --git a/src/common/tusb_fifo.c b/src/common/tusb_fifo.c
index 01e99031..3ed61002 100644
--- a/src/common/tusb_fifo.c
+++ b/src/common/tusb_fifo.c
@@ -103,9 +103,9 @@ static void _tu_ff_push(tu_fifo_t* f, void const * data)
 
 /******************************************************************************/
 /*!
-    @brief Read one byte out of the RX buffer.
+    @brief Read one element out of the RX buffer.
 
-    This function will return the byte located at the array index of the
+    This function will return the element located at the array index of the
     read pointer, and then increment the read pointer index.  If the read
     pointer exceeds the maximum buffer size, it will roll over to zero.
 
@@ -132,8 +132,8 @@ bool tu_fifo_read(tu_fifo_t* f, void * buffer)
 
 /******************************************************************************/
 /*!
-    @brief This function will read n elements into the array index specified by
-    the write pointer and increment the write index. If the write index
+    @brief This function will read n elements from the array index specified by
+    the read pointer and increment the read index. If the read index
     exceeds the max buffer size, then it will roll over to zero.
 
     @param[in]  f
@@ -148,32 +148,39 @@ bool tu_fifo_read(tu_fifo_t* f, void * buffer)
 /******************************************************************************/
 uint16_t tu_fifo_read_n (tu_fifo_t* f, void * buffer, uint16_t count)
 {
-  if( tu_fifo_empty(f) ) return 0;
+  if(tu_fifo_empty(f)) return 0;
 
   tu_fifo_lock(f);
 
   /* Limit up to fifo's count */
-  if ( count > f->count ) count = f->count;
+  if(count > f->count)
+    count = f->count;
 
-  uint8_t* buf8 = (uint8_t*) buffer;
-  uint16_t len = 0;
-
-  while (len < count)
+  if(count + f->rd_idx <= f->depth)
   {
-    _tu_ff_pull(f, buf8);
-
-    len++;
-    buf8 += f->item_size;
+    memcpy(buffer, f->buffer + f->rd_idx * f->item_size, count * f->item_size);
   }
+  else
+  {
+    uint16_t part1 = (f->depth - f->rd_idx) * f->item_size;
+    memcpy(buffer, f->buffer + f->rd_idx * f->item_size, part1);
+    memcpy((uint8_t*)buffer + part1, f->buffer, count * f->item_size - part1);
+  }
+  
+  f->rd_idx += count;
+  if (f->rd_idx >= f->depth)
+    f->rd_idx -= f->depth;
+  
+  f->count -= count;
 
   tu_fifo_unlock(f);
 
-  return len;
+  return count;
 }
 
 /******************************************************************************/
 /*!
-    @brief Reads one item without removing it from the FIFO
+    @brief Read one item without removing it from the FIFO
 
     @param[in]  f
                 Pointer to the FIFO buffer to manipulate
@@ -249,23 +256,42 @@ uint16_t tu_fifo_write_n (tu_fifo_t* f, const void * data, uint16_t count)
 
   tu_fifo_lock(f);
 
-  // Not overwritable limit up to full
-  if (!f->overwritable) count = tu_min16(count, tu_fifo_remaining(f));
-
   uint8_t const* buf8 = (uint8_t const*) data;
-  uint16_t len = 0;
-
-  while (len < count)
+  // Not overwritable limit up to full
+  if (!f->overwritable)
   {
-    _tu_ff_push(f, buf8);
-
-    len++;
-    buf8 += f->item_size;
+    count = tu_min16(count, tu_fifo_remaining(f));
+  }
+  // Only copy last part
+  else if (count > f->depth)
+  {
+    buf8 = buf8 + (count - f->depth) * f->item_size;
+    count = f->depth;
+    f->wr_idx = 0;
+    f->rd_idx = 0;
+    f->count = 0;
   }
 
+  if (count + f->wr_idx <= f->depth )
+  {
+    memcpy(f->buffer + f->wr_idx * f->item_size, buf8, count * f->item_size);
+  }
+  else
+  {
+    uint16_t part1 = (f->depth - f->wr_idx) * f->item_size;
+    memcpy(f->buffer + f->wr_idx * f->item_size, buf8, part1);
+    memcpy(f->buffer, buf8 + part1, count * f->item_size - part1);
+  }
+  
+  f->wr_idx += count;
+  if (f->wr_idx >= f->depth)
+    f->wr_idx -= f->depth;
+  
+  f->count += count;
+  
   tu_fifo_unlock(f);
 
-  return len;
+  return count;
 }
 
 /******************************************************************************/

From f445274634d38dc81125195ccab6b23e9fa28f23 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 14 May 2020 11:59:51 +0700
Subject: [PATCH 13/25] add unit test for fifo write_n and read_n

---
 test/test/test_fifo.c | 58 +++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 58 insertions(+)

diff --git a/test/test/test_fifo.c b/test/test/test_fifo.c
index 2cb8ada9..1be83926 100644
--- a/test/test/test_fifo.c
+++ b/test/test/test_fifo.c
@@ -54,6 +54,64 @@ void test_normal(void)
   }
 }
 
+void test_read_n(void)
+{
+  // prepare data
+  uint8_t data[20];
+  for(int i=0; i<sizeof(data); i++) data[i] = i;
+
+  for(uint8_t i=0; i < FIFO_SIZE; i++) tu_fifo_write(&ff, data+i);
+
+  uint8_t rd[10];
+  uint16_t rd_count;
+
+  // case 1: Read index + count < depth
+  // read 0 -> 5
+  rd_count = tu_fifo_read_n(&ff, rd, 5);
+  TEST_ASSERT_EQUAL( 5, rd_count );
+  TEST_ASSERT_EQUAL_MEMORY( data, rd, rd_count ); // 0 -> 4
+
+  // case 2: Read index + count > depth
+  // write 10, 11, 12
+  tu_fifo_write(&ff, data+10);
+  tu_fifo_write(&ff, data+11);
+  tu_fifo_write(&ff, data+12);
+
+  rd_count = tu_fifo_read_n(&ff, rd, 7);
+  TEST_ASSERT_EQUAL( 7, rd_count );
+
+  TEST_ASSERT_EQUAL_MEMORY( data+5, rd, rd_count ); // 5 -> 11
+
+  // Should only read until empty
+  TEST_ASSERT_EQUAL( 1, tu_fifo_read_n(&ff, rd, 100) );
+}
+
+void test_write_n(void)
+{
+  // prepare data
+  uint8_t data[20];
+  for(int i=0; i<sizeof(data); i++) data[i] = i;
+
+  // case 1: wr + count < depth
+  tu_fifo_write_n(&ff, data, 8); // wr = 8, count = 8
+
+  uint8_t rd[10];
+  uint16_t rd_count;
+
+  rd_count = tu_fifo_read_n(&ff, rd, 5); // wr = 8, count = 3
+  TEST_ASSERT_EQUAL( 5, rd_count );
+  TEST_ASSERT_EQUAL_MEMORY( data, rd, rd_count ); // 0 -> 4
+
+  // case 2: wr + count > depth
+  tu_fifo_write_n(&ff, data+8, 6); // wr = 3, count = 9
+
+  for(rd_count=0; rd_count<7; rd_count++) tu_fifo_read(&ff, rd+rd_count); // wr = 3, count = 2
+
+  TEST_ASSERT_EQUAL_MEMORY( data+5, rd, rd_count); // 5 -> 11
+
+  TEST_ASSERT_EQUAL(2, tu_fifo_count(&ff));
+}
+
 void test_peek(void)
 {
   uint8_t temp;

From b0d49e55de8a9359f76750b6f8cc6517d10a913e Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 14 May 2020 14:24:55 +0700
Subject: [PATCH 14/25] refactor copy to and from fifo

---
 src/common/tusb_fifo.c | 85 +++++++++++++++++++++++-------------------
 1 file changed, 46 insertions(+), 39 deletions(-)

diff --git a/src/common/tusb_fifo.c b/src/common/tusb_fifo.c
index 3ed61002..6ab158cc 100644
--- a/src/common/tusb_fifo.c
+++ b/src/common/tusb_fifo.c
@@ -71,33 +71,38 @@ bool tu_fifo_config(tu_fifo_t *f, void* buffer, uint16_t depth, uint16_t item_si
   return true;
 }
 
+static inline uint16_t _ff_mod(uint16_t idx, uint16_t depth)
+{
+  return (idx < depth) ? idx : (idx-depth);
+}
+
 // retrieve data from fifo
-static void _tu_ff_pull(tu_fifo_t* f, void * buffer)
+static inline void _ff_pull(tu_fifo_t* f, void * buffer, uint16_t n)
 {
   memcpy(buffer,
          f->buffer + (f->rd_idx * f->item_size),
-         f->item_size);
+         f->item_size*n);
 
-  f->rd_idx = (f->rd_idx + 1) % f->depth;
-  f->count--;
+  f->rd_idx = _ff_mod(f->rd_idx + n, f->depth);
+  f->count -= n;
 }
 
 // send data to fifo
-static void _tu_ff_push(tu_fifo_t* f, void const * data)
+static inline void _ff_push(tu_fifo_t* f, void const * data, uint16_t n)
 {
-  memcpy( f->buffer + (f->wr_idx * f->item_size),
-          data,
-          f->item_size);
+  memcpy(f->buffer + (f->wr_idx * f->item_size),
+         data,
+         f->item_size*n);
 
-  f->wr_idx = (f->wr_idx + 1) % f->depth;
+  f->wr_idx = _ff_mod(f->wr_idx + n, f->depth);
 
   if (tu_fifo_full(f))
   {
-    f->rd_idx = f->wr_idx; // keep the full state (rd == wr && len = size)
+    f->rd_idx = f->wr_idx; // keep the full state (rd == wr && count = depth)
   }
   else
   {
-    f->count++;
+    f->count += n;
   }
 }
 
@@ -123,7 +128,7 @@ bool tu_fifo_read(tu_fifo_t* f, void * buffer)
 
   tu_fifo_lock(f);
 
-  _tu_ff_pull(f, buffer);
+  _ff_pull(f, buffer, 1);
 
   tu_fifo_unlock(f);
 
@@ -152,26 +157,24 @@ uint16_t tu_fifo_read_n (tu_fifo_t* f, void * buffer, uint16_t count)
 
   tu_fifo_lock(f);
 
-  /* Limit up to fifo's count */
-  if(count > f->count)
-    count = f->count;
+  // Limit up to fifo's count
+  if(count > f->count) count = f->count;
 
   if(count + f->rd_idx <= f->depth)
   {
-    memcpy(buffer, f->buffer + f->rd_idx * f->item_size, count * f->item_size);
+    _ff_pull(f, buffer, count);
   }
   else
   {
-    uint16_t part1 = (f->depth - f->rd_idx) * f->item_size;
-    memcpy(buffer, f->buffer + f->rd_idx * f->item_size, part1);
-    memcpy((uint8_t*)buffer + part1, f->buffer, count * f->item_size - part1);
+    uint16_t const part1 = f->depth - f->rd_idx;
+
+    // Part 1: from rd_idx to end
+    _ff_pull(f, buffer, part1);
+    buffer = ((uint8_t*) buffer) + part1*f->item_size;
+
+    // Part 2: start to remaining
+    _ff_pull(f, buffer, count-part1);
   }
-  
-  f->rd_idx += count;
-  if (f->rd_idx >= f->depth)
-    f->rd_idx -= f->depth;
-  
-  f->count -= count;
 
   tu_fifo_unlock(f);
 
@@ -196,12 +199,16 @@ bool tu_fifo_peek_at(tu_fifo_t* f, uint16_t pos, void * p_buffer)
 {
   if ( pos >= f->count ) return false;
 
+  tu_fifo_lock(f);
+
   // rd_idx is pos=0
-  uint16_t index = (f->rd_idx + pos) % f->depth;
+  uint16_t index = _ff_mod(f->rd_idx + pos, f->depth);
   memcpy(p_buffer,
          f->buffer + (index * f->item_size),
          f->item_size);
 
+  tu_fifo_unlock(f);
+
   return true;
 }
 
@@ -228,7 +235,7 @@ bool tu_fifo_write (tu_fifo_t* f, const void * data)
 
   tu_fifo_lock(f);
 
-  _tu_ff_push(f, data);
+  _ff_push(f, data, 1);
 
   tu_fifo_unlock(f);
 
@@ -257,14 +264,15 @@ uint16_t tu_fifo_write_n (tu_fifo_t* f, const void * data, uint16_t count)
   tu_fifo_lock(f);
 
   uint8_t const* buf8 = (uint8_t const*) data;
-  // Not overwritable limit up to full
+
   if (!f->overwritable)
   {
+    // Not overwritable limit up to full
     count = tu_min16(count, tu_fifo_remaining(f));
   }
-  // Only copy last part
   else if (count > f->depth)
   {
+    // Only copy last part
     buf8 = buf8 + (count - f->depth) * f->item_size;
     count = f->depth;
     f->wr_idx = 0;
@@ -274,21 +282,20 @@ uint16_t tu_fifo_write_n (tu_fifo_t* f, const void * data, uint16_t count)
 
   if (count + f->wr_idx <= f->depth )
   {
-    memcpy(f->buffer + f->wr_idx * f->item_size, buf8, count * f->item_size);
+    _ff_push(f, buf8, count);
   }
   else
   {
-    uint16_t part1 = (f->depth - f->wr_idx) * f->item_size;
-    memcpy(f->buffer + f->wr_idx * f->item_size, buf8, part1);
-    memcpy(f->buffer, buf8 + part1, count * f->item_size - part1);
+    uint16_t const part1 = f->depth - f->wr_idx;
+
+    // Part 1: from wr_idx to end
+    _ff_push(f, buf8, part1);
+    buf8 += part1*f->item_size;
+
+    // Part 2: start to remaining
+    _ff_push(f, buf8, count-part1);
   }
   
-  f->wr_idx += count;
-  if (f->wr_idx >= f->depth)
-    f->wr_idx -= f->depth;
-  
-  f->count += count;
-  
   tu_fifo_unlock(f);
 
   return count;

From 27299a5c47cb4bc87a222004fd245577a6946caa Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 14 May 2020 15:39:42 +0700
Subject: [PATCH 15/25] add test for fifo size

---
 test/test/test_fifo.c | 28 +++++++++++++++++++++++++++-
 1 file changed, 27 insertions(+), 1 deletion(-)

diff --git a/test/test/test_fifo.c b/test/test/test_fifo.c
index 1be83926..b6c22f56 100644
--- a/test/test/test_fifo.c
+++ b/test/test/test_fifo.c
@@ -54,6 +54,32 @@ void test_normal(void)
   }
 }
 
+void test_item_size(void)
+{
+  TU_FIFO_DEF(ff4, FIFO_SIZE, uint32_t, false);
+  tu_fifo_clear(&ff4);
+
+  uint32_t data[20];
+  for(uint32_t i=0; i<sizeof(data)/4; i++) data[i] = i;
+
+  tu_fifo_write_n(&ff4, data, 10);
+
+  uint32_t rd[10];
+  uint16_t rd_count;
+
+  // read 0 -> 4
+  rd_count = tu_fifo_read_n(&ff4, rd, 5);
+  TEST_ASSERT_EQUAL( 5, rd_count );
+  TEST_ASSERT_EQUAL_UINT32_ARRAY( data, rd, rd_count ); // 0 -> 4
+
+  tu_fifo_write_n(&ff4, data+10, 5);
+
+  // read 5 -> 14
+  rd_count = tu_fifo_read_n(&ff4, rd, 10);
+  TEST_ASSERT_EQUAL( 10, rd_count );
+  TEST_ASSERT_EQUAL_UINT32_ARRAY( data+5, rd, rd_count ); // 5 -> 14
+}
+
 void test_read_n(void)
 {
   // prepare data
@@ -66,7 +92,7 @@ void test_read_n(void)
   uint16_t rd_count;
 
   // case 1: Read index + count < depth
-  // read 0 -> 5
+  // read 0 -> 4
   rd_count = tu_fifo_read_n(&ff, rd, 5);
   TEST_ASSERT_EQUAL( 5, rd_count );
   TEST_ASSERT_EQUAL_MEMORY( data, rd, rd_count ); // 0 -> 4

From 3c43009278d2e4c25f4bb14b9decae4830de0e3e Mon Sep 17 00:00:00 2001
From: Mark Olsson <mark@markolsson.se>
Date: Fri, 15 May 2020 10:23:01 +0200
Subject: [PATCH 16/25] Add support for stm32f746nucleo board

---
 docs/boards.md                                |   1 +
 hw/bsp/stm32f746nucleo/STM32F746ZGTx_FLASH.ld | 167 +++++++
 hw/bsp/stm32f746nucleo/board.mk               |  48 ++
 hw/bsp/stm32f746nucleo/stm32f746nucleo.c      | 255 ++++++++++
 hw/bsp/stm32f746nucleo/stm32f7xx_hal_conf.h   | 472 ++++++++++++++++++
 5 files changed, 943 insertions(+)
 create mode 100644 hw/bsp/stm32f746nucleo/STM32F746ZGTx_FLASH.ld
 create mode 100644 hw/bsp/stm32f746nucleo/board.mk
 create mode 100644 hw/bsp/stm32f746nucleo/stm32f746nucleo.c
 create mode 100644 hw/bsp/stm32f746nucleo/stm32f7xx_hal_conf.h

diff --git a/docs/boards.md b/docs/boards.md
index 7a33bab8..202602d3 100644
--- a/docs/boards.md
+++ b/docs/boards.md
@@ -90,6 +90,7 @@ This code base already had supported for a handful of following boards (sorted a
 - STM32 F411ce Black Pill
 - [STM32 F411ve Discovery](https://www.st.com/en/evaluation-tools/32f411ediscovery.html)
 - [STM32 F412zg Discovery](https://www.st.com/en/evaluation-tools/32f412gdiscovery.html)
+- [STM32 F746zg Nucleo](https://www.st.com/en/evaluation-tools/nucleo-f746zg.html)
 - [STM32 F767zi Nucleo](https://www.st.com/en/evaluation-tools/nucleo-f767zi.html)
 - [STM32 H743zi Nucleo](https://www.st.com/en/evaluation-tools/nucleo-h743zi.html)
 
diff --git a/hw/bsp/stm32f746nucleo/STM32F746ZGTx_FLASH.ld b/hw/bsp/stm32f746nucleo/STM32F746ZGTx_FLASH.ld
new file mode 100644
index 00000000..b434a01b
--- /dev/null
+++ b/hw/bsp/stm32f746nucleo/STM32F746ZGTx_FLASH.ld
@@ -0,0 +1,167 @@
+/*
+*****************************************************************************
+**
+
+**  File        : LinkerScript.ld
+**
+**  Abstract    : Linker script for STM32F746ZGTx Device with
+**                1024KByte FLASH, 320KByte RAM
+**
+**                Set heap size, stack size and stack location according
+**                to application requirements.
+**
+**                Set memory bank area and size if external memory is used.
+**
+**  Target      : STMicroelectronics STM32
+**
+**
+**  Distribution: The file is distributed as is, without any warranty
+**                of any kind.
+**
+**  (c)Copyright Ac6.
+**  You may use this file as-is or modify it according to the needs of your
+**  project. Distribution of this file (unmodified or modified) is not
+**  permitted. Ac6 permit registered System Workbench for MCU users the
+**  rights to distribute the assembled, compiled & linked contents of this
+**  file as part of an application binary file, provided that it is built
+**  using the System Workbench for MCU toolchain.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = 0x20050000;    /* end of RAM */
+/* Generate a link error if heap and stack don't fit into RAM */
+_Min_Heap_Size = 0x200;      /* required amount of heap  */
+_Min_Stack_Size = 0x460; /* required amount of stack */
+
+/* Specify the memory areas */
+MEMORY
+{
+RAM (xrw)      : ORIGIN = 0x20000000, LENGTH = 320K
+FLASH (rx)      : ORIGIN = 0x8000000, LENGTH = 1024K
+}
+
+/* Define output sections */
+SECTIONS
+{
+  /* The startup code goes first into FLASH */
+  .isr_vector :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector)) /* Startup code */
+    . = ALIGN(4);
+  } >FLASH
+
+  /* The program code and other data goes into FLASH */
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+    *(.eh_frame)
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    . = ALIGN(4);
+    _etext = .;        /* define a global symbols at end of code */
+  } >FLASH
+
+  /* Constant data goes into FLASH */
+  .rodata :
+  {
+    . = ALIGN(4);
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM.extab   : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH
+  .ARM : {
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+  } >FLASH
+
+  .preinit_array     :
+  {
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+  } >FLASH
+  .init_array :
+  {
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+  } >FLASH
+  .fini_array :
+  {
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+  } >FLASH
+
+  /* used by the startup to initialize data */
+  _sidata = LOADADDR(.data);
+
+  /* Initialized data sections goes into RAM, load LMA copy after code */
+  .data : 
+  {
+    . = ALIGN(4);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+
+    . = ALIGN(4);
+    _edata = .;        /* define a global symbol at data end */
+  } >RAM AT> FLASH
+
+  
+  /* Uninitialized data section */
+  . = ALIGN(4);
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss secion */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    . = ALIGN(4);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >RAM
+
+  /* User_heap_stack section, used to check that there is enough RAM left */
+  ._user_heap_stack :
+  {
+    . = ALIGN(8);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(8);
+  } >RAM
+
+  
+
+  /* Remove information from the standard libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/hw/bsp/stm32f746nucleo/board.mk b/hw/bsp/stm32f746nucleo/board.mk
new file mode 100644
index 00000000..7e070c1c
--- /dev/null
+++ b/hw/bsp/stm32f746nucleo/board.mk
@@ -0,0 +1,48 @@
+CFLAGS += \
+  -flto \
+  -mthumb \
+  -mabi=aapcs \
+  -mcpu=cortex-m7 \
+  -mfloat-abi=hard \
+  -mfpu=fpv5-d16 \
+  -nostdlib -nostartfiles \
+  -DSTM32F746xx \
+  -DCFG_TUSB_MCU=OPT_MCU_STM32F7
+
+# mcu driver cause following warnings
+CFLAGS += -Wno-error=shadow
+
+ST_HAL_DRIVER = hw/mcu/st/st_driver/STM32F7xx_HAL_Driver
+ST_CMSIS = hw/mcu/st/st_driver/CMSIS/Device/ST/STM32F7xx
+
+# All source paths should be relative to the top level.
+LD_FILE = hw/bsp/$(BOARD)/STM32F746ZGTx_FLASH.ld
+
+SRC_C += \
+	$(ST_CMSIS)/Source/Templates/system_stm32f7xx.c \
+	$(ST_HAL_DRIVER)/Src/stm32f7xx_hal.c \
+	$(ST_HAL_DRIVER)/Src/stm32f7xx_hal_cortex.c \
+	$(ST_HAL_DRIVER)/Src/stm32f7xx_hal_rcc.c \
+	$(ST_HAL_DRIVER)/Src/stm32f7xx_hal_rcc_ex.c \
+	$(ST_HAL_DRIVER)/Src/stm32f7xx_hal_gpio.c \
+	$(ST_HAL_DRIVER)/Src/stm32f7xx_hal_uart.c \
+	$(ST_HAL_DRIVER)/Src/stm32f7xx_hal_pwr_ex.c
+
+SRC_S += \
+	$(ST_CMSIS)/Source/Templates/gcc/startup_stm32f746xx.s
+
+INC += \
+	$(TOP)/hw/mcu/st/st_driver/CMSIS/Include \
+	$(TOP)/$(ST_CMSIS)/Include \
+	$(TOP)/$(ST_HAL_DRIVER)/Inc \
+	$(TOP)/hw/bsp/$(BOARD)
+
+# For TinyUSB port source
+VENDOR = st
+CHIP_FAMILY = synopsys
+
+# For freeRTOS port source
+FREERTOS_PORT = ARM_CM7/r0p1
+
+# flash target using on-board stlink
+flash: flash-stlink
diff --git a/hw/bsp/stm32f746nucleo/stm32f746nucleo.c b/hw/bsp/stm32f746nucleo/stm32f746nucleo.c
new file mode 100644
index 00000000..8e0cb78e
--- /dev/null
+++ b/hw/bsp/stm32f746nucleo/stm32f746nucleo.c
@@ -0,0 +1,255 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 William D. Jones (thor0505@comcast.net),
+ * Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#include "../board.h"
+
+#include "stm32f7xx_hal.h"
+
+//--------------------------------------------------------------------+
+// Forward USB interrupt events to TinyUSB IRQ Handler
+//--------------------------------------------------------------------+
+void OTG_FS_IRQHandler(void)
+{
+  tud_int_handler(0);
+}
+
+//--------------------------------------------------------------------+
+// MACRO TYPEDEF CONSTANT ENUM
+//--------------------------------------------------------------------+
+
+#define LED_PORT              GPIOB
+#define LED_PIN               GPIO_PIN_14
+#define LED_STATE_ON          1
+
+#define BUTTON_PORT           GPIOC
+#define BUTTON_PIN            GPIO_PIN_13
+#define BUTTON_STATE_ACTIVE   1
+
+#define UARTx                 USART3
+#define UART_GPIO_PORT        GPIOD
+#define UART_GPIO_AF          GPIO_AF7_USART3
+#define UART_TX_PIN           GPIO_PIN_8
+#define UART_RX_PIN           GPIO_PIN_9
+
+UART_HandleTypeDef UartHandle;
+
+// enable all LED, Button, Uart, USB clock
+static void all_rcc_clk_enable(void)
+{
+  __HAL_RCC_GPIOA_CLK_ENABLE();  // USB D+, D-
+  __HAL_RCC_GPIOB_CLK_ENABLE();  // LED
+  __HAL_RCC_GPIOC_CLK_ENABLE();  // Button
+  __HAL_RCC_GPIOD_CLK_ENABLE();  // Uart tx, rx
+  __HAL_RCC_USART3_CLK_ENABLE(); // Uart module
+}
+
+/**
+  * @brief  System Clock Configuration
+  *         The system Clock is configured as follow :
+  *            System Clock source            = PLL (HSE)
+  *            SYSCLK(Hz)                     = 216000000
+  *            HCLK(Hz)                       = 216000000
+  *            AHB Prescaler                  = 1
+  *            APB1 Prescaler                 = 4
+  *            APB2 Prescaler                 = 2
+  *            HSE Frequency(Hz)              = 8000000
+  *            PLL_M                          = HSE_VALUE/1000000
+  *            PLL_N                          = 432
+  *            PLL_P                          = 2
+  *            PLL_Q                          = 9
+  *            VDD(V)                         = 3.3
+  *            Main regulator output voltage  = Scale1 mode
+  *            Flash Latency(WS)              = 7
+  *         The USB clock configuration from PLLSAI:
+  *            PLLSAIP                        = 8
+  *            PLLSAIN                        = 384
+  *            PLLSAIQ                        = 7
+  * @param  None
+  * @retval None
+  */
+void SystemClock_Config(void)
+{
+  RCC_ClkInitTypeDef RCC_ClkInitStruct;
+  RCC_OscInitTypeDef RCC_OscInitStruct;
+
+  /* Enable Power Control clock */
+  __HAL_RCC_PWR_CLK_ENABLE();
+
+  /* The voltage scaling allows optimizing the power consumption when the device is
+     clocked below the maximum system frequency, to update the voltage scaling value
+     regarding system frequency refer to product datasheet.  */
+  __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
+
+  /* Enable HSE Oscillator and activate PLL with HSE as source */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
+  RCC_OscInitStruct.HSEState = RCC_HSE_ON;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
+  RCC_OscInitStruct.PLL.PLLM = HSE_VALUE/1000000;
+  RCC_OscInitStruct.PLL.PLLN = 432;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ = 9;
+  HAL_RCC_OscConfig(&RCC_OscInitStruct);
+
+  /* Activate the OverDrive to reach the 216 MHz Frequency */
+  HAL_PWREx_EnableOverDrive();
+
+  /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers */
+  RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
+
+  HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_7);
+}
+
+void board_init(void)
+{
+
+
+  SystemClock_Config();
+  all_rcc_clk_enable();
+
+#if CFG_TUSB_OS  == OPT_OS_NONE
+  // 1ms tick timer
+  SysTick_Config(SystemCoreClock / 1000);
+#endif
+
+  GPIO_InitTypeDef  GPIO_InitStruct;
+
+  // LED
+  GPIO_InitStruct.Pin = LED_PIN;
+  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+  GPIO_InitStruct.Pull = GPIO_PULLUP;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
+  HAL_GPIO_Init(LED_PORT, &GPIO_InitStruct);
+
+  // Button
+  GPIO_InitStruct.Pin = BUTTON_PIN;
+  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
+  HAL_GPIO_Init(BUTTON_PORT, &GPIO_InitStruct);
+
+  // Uart
+  GPIO_InitStruct.Pin       = UART_TX_PIN | UART_RX_PIN;
+  GPIO_InitStruct.Mode      = GPIO_MODE_AF_PP;
+  GPIO_InitStruct.Pull      = GPIO_PULLUP;
+  GPIO_InitStruct.Speed     = GPIO_SPEED_FREQ_VERY_HIGH;
+  GPIO_InitStruct.Alternate = UART_GPIO_AF;
+  HAL_GPIO_Init(UART_GPIO_PORT, &GPIO_InitStruct);
+
+  UartHandle.Instance        = UARTx;
+  UartHandle.Init.BaudRate   = CFG_BOARD_UART_BAUDRATE;
+  UartHandle.Init.WordLength = UART_WORDLENGTH_8B;
+  UartHandle.Init.StopBits   = UART_STOPBITS_1;
+  UartHandle.Init.Parity     = UART_PARITY_NONE;
+  UartHandle.Init.HwFlowCtl  = UART_HWCONTROL_NONE;
+  UartHandle.Init.Mode       = UART_MODE_TX_RX;
+  UartHandle.Init.OverSampling = UART_OVERSAMPLING_16;
+  HAL_UART_Init(&UartHandle);
+
+  /* Configure USB FS GPIOs */
+  /* Configure DM DP Pins */
+  GPIO_InitStruct.Pin = (GPIO_PIN_11 | GPIO_PIN_12);
+  GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_HIGH;
+  GPIO_InitStruct.Alternate = GPIO_AF10_OTG_FS;
+  HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+  /* Configure VBUS Pin */
+  GPIO_InitStruct.Pin = GPIO_PIN_9;
+  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+  /* Configure ID pin */
+  GPIO_InitStruct.Pin = GPIO_PIN_10;
+  GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
+  GPIO_InitStruct.Pull = GPIO_PULLUP;
+  GPIO_InitStruct.Alternate = GPIO_AF10_OTG_FS;
+  HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+  /* Enable USB FS Clocks */
+  __HAL_RCC_USB_OTG_FS_CLK_ENABLE();
+
+  // Enable VBUS sense (B device) via pin PA9
+  USB_OTG_FS->GCCFG |= USB_OTG_GCCFG_VBDEN;
+}
+
+//--------------------------------------------------------------------+
+// Board porting API
+//--------------------------------------------------------------------+
+
+void board_led_write(bool state)
+{
+  HAL_GPIO_WritePin(LED_PORT, LED_PIN, state);
+}
+
+uint32_t board_button_read(void)
+{
+  return HAL_GPIO_ReadPin(BUTTON_PORT, BUTTON_PIN);
+}
+
+int board_uart_read(uint8_t* buf, int len)
+{
+  (void) buf; (void) len;
+  return 0;
+}
+
+int board_uart_write(void const * buf, int len)
+{
+  HAL_UART_Transmit(&UartHandle, (uint8_t*) buf, len, 0xffff);
+  return len;
+}
+
+#if CFG_TUSB_OS  == OPT_OS_NONE
+volatile uint32_t system_ticks = 0;
+void SysTick_Handler (void)
+{
+  system_ticks++;
+}
+
+uint32_t board_millis(void)
+{
+  return system_ticks;
+}
+#endif
+
+void HardFault_Handler (void)
+{
+  asm("bkpt");
+}
+
+// Required by __libc_init_array in startup code if we are compiling using
+// -nostdlib/-nostartfiles.
+void _init(void)
+{
+
+}
diff --git a/hw/bsp/stm32f746nucleo/stm32f7xx_hal_conf.h b/hw/bsp/stm32f746nucleo/stm32f7xx_hal_conf.h
new file mode 100644
index 00000000..234191b0
--- /dev/null
+++ b/hw/bsp/stm32f746nucleo/stm32f7xx_hal_conf.h
@@ -0,0 +1,472 @@
+/**
+  ******************************************************************************
+  * @file    stm32f7xx_hal_conf.h
+  * @author  MCD Application Team
+  * @brief   HAL configuration file. 
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under BSD 3-Clause license,
+  * the "License"; You may not use this file except in compliance with the
+  * License. You may obtain a copy of the License at:
+  *                        opensource.org/licenses/BSD-3-Clause
+  *
+  ******************************************************************************
+  */ 
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32F7xx_HAL_CONF_H
+#define __STM32F7xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+  * @brief This is the list of modules to be used in the HAL driver 
+  */
+#define HAL_MODULE_ENABLED  
+/* #define HAL_ADC_MODULE_ENABLED   */
+/* #define HAL_CAN_MODULE_ENABLED */
+/* #define HAL_CAN_LEGACY_MODULE_ENABLED */
+/* #define HAL_CEC_MODULE_ENABLED   */
+/* #define HAL_CRC_MODULE_ENABLED   */
+/* #define HAL_CRYP_MODULE_ENABLED   */
+/* #define HAL_DAC_MODULE_ENABLED   */
+/* #define HAL_DCMI_MODULE_ENABLED  */
+#define HAL_DMA_MODULE_ENABLED
+/* #define HAL_DMA2D_MODULE_ENABLED  */
+/* #define HAL_ETH_MODULE_ENABLED  */
+#define HAL_FLASH_MODULE_ENABLED 
+/* #define HAL_NAND_MODULE_ENABLED */
+/* #define HAL_NOR_MODULE_ENABLED */
+/* #define HAL_SRAM_MODULE_ENABLED */
+/* #define HAL_SDRAM_MODULE_ENABLED */
+/* #define HAL_HASH_MODULE_ENABLED   */
+#define HAL_GPIO_MODULE_ENABLED
+/* #define HAL_I2C_MODULE_ENABLED */
+/* #define HAL_I2S_MODULE_ENABLED    */
+/* #define HAL_IWDG_MODULE_ENABLED  */
+/* #define HAL_LPTIM_MODULE_ENABLED */
+/* #define HAL_LTDC_MODULE_ENABLED  */
+#define HAL_PWR_MODULE_ENABLED
+/* #define HAL_QSPI_MODULE_ENABLED    */
+#define HAL_RCC_MODULE_ENABLED 
+/* #define HAL_RNG_MODULE_ENABLED    */
+/* #define HAL_RTC_MODULE_ENABLED */
+/* #define HAL_SAI_MODULE_ENABLED    */
+/* #define HAL_SD_MODULE_ENABLED   */
+/* #define HAL_SPDIFRX_MODULE_ENABLED */
+/* #define HAL_SPI_MODULE_ENABLED    */
+/* #define HAL_TIM_MODULE_ENABLED    */
+#define HAL_UART_MODULE_ENABLED
+/* #define HAL_USART_MODULE_ENABLED  */
+/* #define HAL_IRDA_MODULE_ENABLED  */
+/* #define HAL_SMARTCARD_MODULE_ENABLED  */
+/* #define HAL_WWDG_MODULE_ENABLED   */
+#define HAL_CORTEX_MODULE_ENABLED
+/* #define HAL_PCD_MODULE_ENABLED */
+/* #define HAL_HCD_MODULE_ENABLED */
+/* #define HAL_DFSDM_MODULE_ENABLED */
+/* #define HAL_DSI_MODULE_ENABLED */
+/* #define HAL_JPEG_MODULE_ENABLED */
+/* #define HAL_MDIOS_MODULE_ENABLED */
+
+
+/* ########################## HSE/HSI Values adaptation ##################### */
+/**
+  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSE is used as system clock source, directly or through the PLL).  
+  */
+#if !defined  (HSE_VALUE) 
+  #define HSE_VALUE    ((uint32_t)8000000U) /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSE_STARTUP_TIMEOUT)
+  #define HSE_STARTUP_TIMEOUT    ((uint32_t)100U)   /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief Internal High Speed oscillator (HSI) value.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSI is used as system clock source, directly or through the PLL). 
+  */
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    ((uint32_t)16000000U) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+  * @brief Internal Low Speed oscillator (LSI) value.
+  */
+#if !defined  (LSI_VALUE) 
+ #define LSI_VALUE  ((uint32_t)32000U)       /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */                      /*!< Value of the Internal Low Speed oscillator in Hz
+                                             The real value may vary depending on the variations
+                                             in voltage and temperature.  */
+/**
+  * @brief External Low Speed oscillator (LSE) value.
+  */
+#if !defined  (LSE_VALUE)
+ #define LSE_VALUE  ((uint32_t)32768U)    /*!< Value of the External Low Speed oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined  (LSE_STARTUP_TIMEOUT)
+  #define LSE_STARTUP_TIMEOUT    ((uint32_t)5000U)   /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief External clock source for I2S peripheral
+  *        This value is used by the I2S HAL module to compute the I2S clock source 
+  *        frequency, this source is inserted directly through I2S_CKIN pad. 
+  */
+#if !defined  (EXTERNAL_CLOCK_VALUE)
+  #define EXTERNAL_CLOCK_VALUE    ((uint32_t)12288000U) /*!< Value of the Internal oscillator in Hz*/
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+   ===  you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+  * @brief This is the HAL system configuration section
+  */     
+#define  VDD_VALUE                    ((uint32_t)3300U) /*!< Value of VDD in mv */
+#define  TICK_INT_PRIORITY            ((uint32_t)0x0FU) /*!< tick interrupt priority */
+#define  USE_RTOS                     0U
+#define  PREFETCH_ENABLE              1U
+#define  ART_ACCLERATOR_ENABLE        1U /* To enable instruction cache and prefetch */
+
+#define  USE_HAL_ADC_REGISTER_CALLBACKS         0U /* ADC register callback disabled       */
+#define  USE_HAL_CAN_REGISTER_CALLBACKS         0U /* CAN register callback disabled       */
+#define  USE_HAL_CEC_REGISTER_CALLBACKS         0U /* CEC register callback disabled       */
+#define  USE_HAL_CRYP_REGISTER_CALLBACKS        0U /* CRYP register callback disabled      */
+#define  USE_HAL_DAC_REGISTER_CALLBACKS         0U /* DAC register callback disabled       */
+#define  USE_HAL_DCMI_REGISTER_CALLBACKS        0U /* DCMI register callback disabled      */
+#define  USE_HAL_DFSDM_REGISTER_CALLBACKS       0U /* DFSDM register callback disabled     */
+#define  USE_HAL_DMA2D_REGISTER_CALLBACKS       0U /* DMA2D register callback disabled     */
+#define  USE_HAL_DSI_REGISTER_CALLBACKS         0U /* DSI register callback disabled       */
+#define  USE_HAL_ETH_REGISTER_CALLBACKS         0U /* ETH register callback disabled       */
+#define  USE_HAL_HASH_REGISTER_CALLBACKS        0U /* HASH register callback disabled      */
+#define  USE_HAL_HCD_REGISTER_CALLBACKS         0U /* HCD register callback disabled       */
+#define  USE_HAL_I2C_REGISTER_CALLBACKS         0U /* I2C register callback disabled       */
+#define  USE_HAL_I2S_REGISTER_CALLBACKS         0U /* I2S register callback disabled       */
+#define  USE_HAL_IRDA_REGISTER_CALLBACKS        0U /* IRDA register callback disabled      */
+#define  USE_HAL_JPEG_REGISTER_CALLBACKS        0U /* JPEG register callback disabled      */
+#define  USE_HAL_LPTIM_REGISTER_CALLBACKS       0U /* LPTIM register callback disabled     */
+#define  USE_HAL_LTDC_REGISTER_CALLBACKS        0U /* LTDC register callback disabled      */
+#define  USE_HAL_MDIOS_REGISTER_CALLBACKS       0U /* MDIOS register callback disabled     */
+#define  USE_HAL_MMC_REGISTER_CALLBACKS         0U /* MMC register callback disabled       */
+#define  USE_HAL_NAND_REGISTER_CALLBACKS        0U /* NAND register callback disabled      */
+#define  USE_HAL_NOR_REGISTER_CALLBACKS         0U /* NOR register callback disabled       */
+#define  USE_HAL_PCD_REGISTER_CALLBACKS         0U /* PCD register callback disabled       */
+#define  USE_HAL_QSPI_REGISTER_CALLBACKS        0U /* QSPI register callback disabled      */
+#define  USE_HAL_RNG_REGISTER_CALLBACKS         0U /* RNG register callback disabled       */
+#define  USE_HAL_RTC_REGISTER_CALLBACKS         0U /* RTC register callback disabled       */
+#define  USE_HAL_SAI_REGISTER_CALLBACKS         0U /* SAI register callback disabled       */
+#define  USE_HAL_SD_REGISTER_CALLBACKS          0U /* SD register callback disabled        */
+#define  USE_HAL_SMARTCARD_REGISTER_CALLBACKS   0U /* SMARTCARD register callback disabled */
+#define  USE_HAL_SDRAM_REGISTER_CALLBACKS       0U /* SDRAM register callback disabled     */
+#define  USE_HAL_SRAM_REGISTER_CALLBACKS        0U /* SRAM register callback disabled      */
+#define  USE_HAL_SPDIFRX_REGISTER_CALLBACKS     0U /* SPDIFRX register callback disabled   */
+#define  USE_HAL_SMBUS_REGISTER_CALLBACKS       0U /* SMBUS register callback disabled     */
+#define  USE_HAL_SPI_REGISTER_CALLBACKS         0U /* SPI register callback disabled       */
+#define  USE_HAL_TIM_REGISTER_CALLBACKS         0U /* TIM register callback disabled       */
+#define  USE_HAL_UART_REGISTER_CALLBACKS        0U /* UART register callback disabled      */
+#define  USE_HAL_USART_REGISTER_CALLBACKS       0U /* USART register callback disabled     */
+#define  USE_HAL_WWDG_REGISTER_CALLBACKS        0U /* WWDG register callback disabled      */
+
+/* ########################## Assert Selection ############################## */
+/**
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the 
+  *        HAL drivers code
+  */
+/* #define USE_FULL_ASSERT    1 */
+
+/* ################## Ethernet peripheral configuration for NUCLEO 144 board ##################### */
+
+/* Section 1 : Ethernet peripheral configuration */
+
+/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */
+#define MAC_ADDR0   2U
+#define MAC_ADDR1   0U
+#define MAC_ADDR2   0U
+#define MAC_ADDR3   0U
+#define MAC_ADDR4   0U
+#define MAC_ADDR5   0U
+
+/* Definition of the Ethernet driver buffers size and count */   
+#define ETH_RX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for receive               */
+#define ETH_TX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for transmit              */
+#define ETH_RXBUFNB                    ((uint32_t)5)       /* 5 Rx buffers of size ETH_RX_BUF_SIZE  */
+#define ETH_TXBUFNB                    ((uint32_t)5)       /* 5 Tx buffers of size ETH_TX_BUF_SIZE  */
+
+/* Section 2: PHY configuration section */
+/* LAN8742A PHY Address*/
+#define LAN8742A_PHY_ADDRESS            0x00
+/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ 
+#define PHY_RESET_DELAY                 ((uint32_t)0x00000FFF)
+/* PHY Configuration delay */
+#define PHY_CONFIG_DELAY                ((uint32_t)0x00000FFF)
+
+#define PHY_READ_TO                     ((uint32_t)0x0000FFFF)
+#define PHY_WRITE_TO                    ((uint32_t)0x0000FFFF)
+
+/* Section 3: Common PHY Registers */
+
+#define PHY_BCR                         ((uint16_t)0x00)    /*!< Transceiver Basic Control Register   */
+#define PHY_BSR                         ((uint16_t)0x01)    /*!< Transceiver Basic Status Register    */
+ 
+#define PHY_RESET                       ((uint16_t)0x8000)  /*!< PHY Reset */
+#define PHY_LOOPBACK                    ((uint16_t)0x4000)  /*!< Select loop-back mode */
+#define PHY_FULLDUPLEX_100M             ((uint16_t)0x2100)  /*!< Set the full-duplex mode at 100 Mb/s */
+#define PHY_HALFDUPLEX_100M             ((uint16_t)0x2000)  /*!< Set the half-duplex mode at 100 Mb/s */
+#define PHY_FULLDUPLEX_10M              ((uint16_t)0x0100)  /*!< Set the full-duplex mode at 10 Mb/s  */
+#define PHY_HALFDUPLEX_10M              ((uint16_t)0x0000)  /*!< Set the half-duplex mode at 10 Mb/s  */
+#define PHY_AUTONEGOTIATION             ((uint16_t)0x1000)  /*!< Enable auto-negotiation function     */
+#define PHY_RESTART_AUTONEGOTIATION     ((uint16_t)0x0200)  /*!< Restart auto-negotiation function    */
+#define PHY_POWERDOWN                   ((uint16_t)0x0800)  /*!< Select the power down mode           */
+#define PHY_ISOLATE                     ((uint16_t)0x0400)  /*!< Isolate PHY from MII                 */
+
+#define PHY_AUTONEGO_COMPLETE           ((uint16_t)0x0020)  /*!< Auto-Negotiation process completed   */
+#define PHY_LINKED_STATUS               ((uint16_t)0x0004)  /*!< Valid link established               */
+#define PHY_JABBER_DETECTION            ((uint16_t)0x0002)  /*!< Jabber condition detected            */
+  
+/* Section 4: Extended PHY Registers */
+
+#define PHY_SR                          ((uint16_t)0x1F)    /*!< PHY special control/ status register Offset     */
+
+#define PHY_SPEED_STATUS                ((uint16_t)0x0004)  /*!< PHY Speed mask                                  */
+#define PHY_DUPLEX_STATUS               ((uint16_t)0x0010)  /*!< PHY Duplex mask                                 */
+
+
+#define PHY_ISFR                        ((uint16_t)0x1D)    /*!< PHY Interrupt Source Flag register Offset       */
+#define PHY_ISFR_INT4                   ((uint16_t)0x0010)  /*!< PHY Link down inturrupt                         */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+* Activated: CRC code is present inside driver
+* Deactivated: CRC code cleaned from driver
+*/
+
+#define USE_SPI_CRC                     1U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+  * @brief Include module's header file 
+  */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+  #include "stm32f7xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+  #include "stm32f7xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+  #include "stm32f7xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+   
+#ifdef HAL_CORTEX_MODULE_ENABLED
+  #include "stm32f7xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+  #include "stm32f7xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_CAN_MODULE_ENABLED
+  #include "stm32f7xx_hal_can.h"
+#endif /* HAL_CAN_MODULE_ENABLED */
+
+#ifdef HAL_CAN_LEGACY_MODULE_ENABLED
+  #include "stm32f7xx_hal_can_legacy.h"
+#endif /* HAL_CAN_LEGACY_MODULE_ENABLED */
+
+#ifdef HAL_CEC_MODULE_ENABLED
+  #include "stm32f7xx_hal_cec.h"
+#endif /* HAL_CEC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+  #include "stm32f7xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+  #include "stm32f7xx_hal_cryp.h" 
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DMA2D_MODULE_ENABLED
+  #include "stm32f7xx_hal_dma2d.h"
+#endif /* HAL_DMA2D_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+  #include "stm32f7xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_DCMI_MODULE_ENABLED
+  #include "stm32f7xx_hal_dcmi.h"
+#endif /* HAL_DCMI_MODULE_ENABLED */
+
+#ifdef HAL_ETH_MODULE_ENABLED
+  #include "stm32f7xx_hal_eth.h"
+#endif /* HAL_ETH_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+  #include "stm32f7xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+ 
+#ifdef HAL_SRAM_MODULE_ENABLED
+  #include "stm32f7xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+  #include "stm32f7xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+  #include "stm32f7xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_SDRAM_MODULE_ENABLED
+  #include "stm32f7xx_hal_sdram.h"
+#endif /* HAL_SDRAM_MODULE_ENABLED */      
+
+#ifdef HAL_HASH_MODULE_ENABLED
+ #include "stm32f7xx_hal_hash.h"
+#endif /* HAL_HASH_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+ #include "stm32f7xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+ #include "stm32f7xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+ #include "stm32f7xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+ #include "stm32f7xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_LTDC_MODULE_ENABLED
+ #include "stm32f7xx_hal_ltdc.h"
+#endif /* HAL_LTDC_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+ #include "stm32f7xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+ #include "stm32f7xx_hal_qspi.h"
+#endif /* HAL_QSPI_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+ #include "stm32f7xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+ #include "stm32f7xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+ #include "stm32f7xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SD_MODULE_ENABLED
+ #include "stm32f7xx_hal_sd.h"
+#endif /* HAL_SD_MODULE_ENABLED */
+
+#ifdef HAL_SPDIFRX_MODULE_ENABLED
+ #include "stm32f7xx_hal_spdifrx.h"
+#endif /* HAL_SPDIFRX_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+ #include "stm32f7xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+ #include "stm32f7xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+ #include "stm32f7xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+ #include "stm32f7xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+ #include "stm32f7xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+ #include "stm32f7xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+ #include "stm32f7xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+ #include "stm32f7xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_HCD_MODULE_ENABLED
+ #include "stm32f7xx_hal_hcd.h"
+#endif /* HAL_HCD_MODULE_ENABLED */
+
+#ifdef HAL_DFSDM_MODULE_ENABLED
+ #include "stm32f7xx_hal_dfsdm.h"
+#endif /* HAL_DFSDM_MODULE_ENABLED */
+
+#ifdef HAL_DSI_MODULE_ENABLED
+ #include "stm32f7xx_hal_dsi.h"
+#endif /* HAL_DSI_MODULE_ENABLED */
+
+#ifdef HAL_JPEG_MODULE_ENABLED
+ #include "stm32f7xx_hal_jpeg.h"
+#endif /* HAL_JPEG_MODULE_ENABLED */
+
+#ifdef HAL_MDIOS_MODULE_ENABLED
+ #include "stm32f7xx_hal_mdios.h"
+#endif /* HAL_MDIOS_MODULE_ENABLED */
+   
+/* Exported macro ------------------------------------------------------------*/
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  The assert_param macro is used for function's parameters check.
+  * @param  expr: If expr is false, it calls assert_failed function
+  *         which reports the name of the source file and the source
+  *         line number of the call that failed. 
+  *         If expr is true, it returns no value.
+  * @retval None
+  */
+  #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+  void assert_failed(uint8_t* file, uint32_t line);
+#else
+  #define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32F7xx_HAL_CONF_H */
+ 
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

From 1a8ce043ed937012454e5b79396455f9c5568a68 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sun, 17 May 2020 14:24:15 +0700
Subject: [PATCH 17/25] enable -Wcast-align

suppress vendor sdk driver at board.mk
---
 examples/make.mk                                     | 8 +++-----
 hw/bsp/adafruit_clue/board.mk                        | 4 ++--
 hw/bsp/arduino_nano33_ble/board.mk                   | 4 ++--
 hw/bsp/circuitplayground_bluefruit/board.mk          | 4 ++--
 hw/bsp/feather_nrf52840_express/board.mk             | 4 ++--
 hw/bsp/feather_nrf52840_sense/board.mk               | 4 ++--
 hw/bsp/feather_stm32f405/board.mk                    | 3 +++
 hw/bsp/nrf52840_mdk_dongle/board.mk                  | 4 ++--
 hw/bsp/nutiny_sdk_nuc505/board.mk                    | 5 +++--
 hw/bsp/pca10056/board.mk                             | 4 ++--
 hw/bsp/pca10059/board.mk                             | 4 ++--
 hw/bsp/pca10100/board.mk                             | 4 ++--
 hw/bsp/raytac_mdbt50q_rx/board.mk                    | 4 ++--
 hw/bsp/stm32f070rbnucleo/board.mk                    | 4 ++--
 hw/bsp/stm32f072disco/board.mk                       | 4 ++--
 hw/bsp/stm32f407disco/board.mk                       | 3 +++
 hw/bsp/stm32f411disco/board.mk                       | 3 +++
 hw/bsp/stm32f412disco/board.mk                       | 4 ++--
 hw/bsp/stm32f746nucleo/board.mk                      | 4 ++--
 hw/bsp/stm32f767nucleo/board.mk                      | 4 ++--
 hw/bsp/stm32h743nucleo/board.mk                      | 1 -
 src/common/tusb_common.h                             | 2 +-
 src/portable/nxp/transdimension/dcd_transdimension.c | 6 ++++--
 23 files changed, 50 insertions(+), 41 deletions(-)

diff --git a/examples/make.mk b/examples/make.mk
index 449dc899..2ea50753 100644
--- a/examples/make.mk
+++ b/examples/make.mk
@@ -63,11 +63,9 @@ CFLAGS += \
 	-Wwrite-strings \
 	-Wsign-compare \
 	-Wmissing-format-attribute \
-	-Wunreachable-code
-
-# This causes lots of warning with nrf5x build due to nrfx code
-# CFLAGS += -Wcast-align
-
+	-Wunreachable-code \
+	-Wcast-align
+	
 # Debugging/Optimization
 ifeq ($(DEBUG), 1)
   CFLAGS += -Og -ggdb
diff --git a/hw/bsp/adafruit_clue/board.mk b/hw/bsp/adafruit_clue/board.mk
index be8c5bf5..5290455c 100644
--- a/hw/bsp/adafruit_clue/board.mk
+++ b/hw/bsp/adafruit_clue/board.mk
@@ -9,8 +9,8 @@ CFLAGS += \
   -DNRF52840_XXAA \
   -DCONFIG_GPIO_AS_PINRESET
 
-# nrfx issue undef _ARMCC_VERSION usage https://github.com/NordicSemiconductor/nrfx/issues/49
-CFLAGS += -Wno-error=undef -Wno-error=unused-parameter
+# suppress warning caused by vendor mcu driver
+CFLAGS += -Wno-error=undef -Wno-error=unused-parameter -Wno-error=cast-align
 
 # due to tusb_hal_nrf_power_event
 GCCVERSION = $(firstword $(subst ., ,$(shell arm-none-eabi-gcc -dumpversion)))
diff --git a/hw/bsp/arduino_nano33_ble/board.mk b/hw/bsp/arduino_nano33_ble/board.mk
index d217d37c..0a25d0b1 100644
--- a/hw/bsp/arduino_nano33_ble/board.mk
+++ b/hw/bsp/arduino_nano33_ble/board.mk
@@ -9,8 +9,8 @@ CFLAGS += \
   -DNRF52840_XXAA \
   -DCONFIG_GPIO_AS_PINRESET
 
-# nrfx issue undef _ARMCC_VERSION usage https://github.com/NordicSemiconductor/nrfx/issues/49
-CFLAGS += -Wno-error=undef -Wno-error=unused-parameter
+# suppress warning caused by vendor mcu driver
+CFLAGS += -Wno-error=undef -Wno-error=unused-parameter -Wno-error=cast-align
 
 # due to tusb_hal_nrf_power_event
 GCCVERSION = $(firstword $(subst ., ,$(shell arm-none-eabi-gcc -dumpversion)))
diff --git a/hw/bsp/circuitplayground_bluefruit/board.mk b/hw/bsp/circuitplayground_bluefruit/board.mk
index be8c5bf5..5290455c 100644
--- a/hw/bsp/circuitplayground_bluefruit/board.mk
+++ b/hw/bsp/circuitplayground_bluefruit/board.mk
@@ -9,8 +9,8 @@ CFLAGS += \
   -DNRF52840_XXAA \
   -DCONFIG_GPIO_AS_PINRESET
 
-# nrfx issue undef _ARMCC_VERSION usage https://github.com/NordicSemiconductor/nrfx/issues/49
-CFLAGS += -Wno-error=undef -Wno-error=unused-parameter
+# suppress warning caused by vendor mcu driver
+CFLAGS += -Wno-error=undef -Wno-error=unused-parameter -Wno-error=cast-align
 
 # due to tusb_hal_nrf_power_event
 GCCVERSION = $(firstword $(subst ., ,$(shell arm-none-eabi-gcc -dumpversion)))
diff --git a/hw/bsp/feather_nrf52840_express/board.mk b/hw/bsp/feather_nrf52840_express/board.mk
index 9f38d679..7b2625cd 100644
--- a/hw/bsp/feather_nrf52840_express/board.mk
+++ b/hw/bsp/feather_nrf52840_express/board.mk
@@ -9,8 +9,8 @@ CFLAGS += \
   -DNRF52840_XXAA \
   -DCONFIG_GPIO_AS_PINRESET
 
-# nrfx issue undef _ARMCC_VERSION usage https://github.com/NordicSemiconductor/nrfx/issues/49
-CFLAGS += -Wno-error=undef -Wno-error=unused-parameter
+# suppress warning caused by vendor mcu driver
+CFLAGS += -Wno-error=undef -Wno-error=unused-parameter -Wno-error=cast-align
 
 # due to tusb_hal_nrf_power_event
 GCCVERSION = $(firstword $(subst ., ,$(shell arm-none-eabi-gcc -dumpversion)))
diff --git a/hw/bsp/feather_nrf52840_sense/board.mk b/hw/bsp/feather_nrf52840_sense/board.mk
index be8c5bf5..5290455c 100644
--- a/hw/bsp/feather_nrf52840_sense/board.mk
+++ b/hw/bsp/feather_nrf52840_sense/board.mk
@@ -9,8 +9,8 @@ CFLAGS += \
   -DNRF52840_XXAA \
   -DCONFIG_GPIO_AS_PINRESET
 
-# nrfx issue undef _ARMCC_VERSION usage https://github.com/NordicSemiconductor/nrfx/issues/49
-CFLAGS += -Wno-error=undef -Wno-error=unused-parameter
+# suppress warning caused by vendor mcu driver
+CFLAGS += -Wno-error=undef -Wno-error=unused-parameter -Wno-error=cast-align
 
 # due to tusb_hal_nrf_power_event
 GCCVERSION = $(firstword $(subst ., ,$(shell arm-none-eabi-gcc -dumpversion)))
diff --git a/hw/bsp/feather_stm32f405/board.mk b/hw/bsp/feather_stm32f405/board.mk
index 2d1f8bb8..8233c660 100644
--- a/hw/bsp/feather_stm32f405/board.mk
+++ b/hw/bsp/feather_stm32f405/board.mk
@@ -9,6 +9,9 @@ CFLAGS += \
   -DSTM32F405xx \
   -DCFG_TUSB_MCU=OPT_MCU_STM32F4
 
+# suppress warning caused by vendor mcu driver
+CFLAGS += -Wno-error=cast-align
+
 ST_HAL_DRIVER = hw/mcu/st/st_driver/STM32F4xx_HAL_Driver
 ST_CMSIS = hw/mcu/st/st_driver/CMSIS/Device/ST/STM32F4xx
 
diff --git a/hw/bsp/nrf52840_mdk_dongle/board.mk b/hw/bsp/nrf52840_mdk_dongle/board.mk
index 0ab5ff2e..9ba04ba1 100644
--- a/hw/bsp/nrf52840_mdk_dongle/board.mk
+++ b/hw/bsp/nrf52840_mdk_dongle/board.mk
@@ -8,8 +8,8 @@ CFLAGS += \
   -DNRF52840_XXAA \
   -DCFG_TUSB_MCU=OPT_MCU_NRF5X
 
-# nrfx issue undef _ARMCC_VERSION usage https://github.com/NordicSemiconductor/nrfx/issues/49
-CFLAGS += -Wno-error=undef -Wno-error=unused-parameter
+# suppress warning caused by vendor mcu driver
+CFLAGS += -Wno-error=undef -Wno-error=unused-parameter -Wno-error=cast-align
 
 # due to tusb_hal_nrf_power_event
 GCCVERSION = $(firstword $(subst ., ,$(shell arm-none-eabi-gcc -dumpversion)))
diff --git a/hw/bsp/nutiny_sdk_nuc505/board.mk b/hw/bsp/nutiny_sdk_nuc505/board.mk
index 39df77d2..874d4ae4 100644
--- a/hw/bsp/nutiny_sdk_nuc505/board.mk
+++ b/hw/bsp/nutiny_sdk_nuc505/board.mk
@@ -7,6 +7,9 @@ CFLAGS += \
   -mfpu=fpv4-sp-d16 \
   -DCFG_TUSB_MCU=OPT_MCU_NUC505
 
+# TODO this cast-align is caused by dcd_nuc505 should be fixed
+CFLAGS += -Wno-error=cast-align
+
 # All source paths should be relative to the top level.
 LD_FILE = hw/bsp/$(BOARD)/nuc505_flashtoram.ld
 
@@ -19,13 +22,11 @@ SRC_C += \
   hw/mcu/nuvoton/nuc505/StdDriver/src/i2s.c \
   hw/mcu/nuvoton/nuc505/StdDriver/src/pwm.c \
   hw/mcu/nuvoton/nuc505/StdDriver/src/rtc.c \
-  hw/mcu/nuvoton/nuc505/StdDriver/src/sd.c \
   hw/mcu/nuvoton/nuc505/StdDriver/src/spi.c \
   hw/mcu/nuvoton/nuc505/StdDriver/src/spim.c \
   hw/mcu/nuvoton/nuc505/StdDriver/src/sys.c \
   hw/mcu/nuvoton/nuc505/StdDriver/src/timer.c \
   hw/mcu/nuvoton/nuc505/StdDriver/src/uart.c \
-  hw/mcu/nuvoton/nuc505/StdDriver/src/usbd.c \
   hw/mcu/nuvoton/nuc505/StdDriver/src/wdt.c \
   hw/mcu/nuvoton/nuc505/StdDriver/src/wwdt.c
 
diff --git a/hw/bsp/pca10056/board.mk b/hw/bsp/pca10056/board.mk
index b2f11962..0971e64c 100644
--- a/hw/bsp/pca10056/board.mk
+++ b/hw/bsp/pca10056/board.mk
@@ -9,8 +9,8 @@ CFLAGS += \
   -DCONFIG_GPIO_AS_PINRESET \
   -DCFG_TUSB_MCU=OPT_MCU_NRF5X
 
-# nrfx issue undef _ARMCC_VERSION usage https://github.com/NordicSemiconductor/nrfx/issues/49
-CFLAGS += -Wno-error=undef -Wno-error=unused-parameter
+# suppress warning caused by vendor mcu driver
+CFLAGS += -Wno-error=undef -Wno-error=unused-parameter -Wno-error=cast-align
 
 # due to tusb_hal_nrf_power_event
 GCCVERSION = $(firstword $(subst ., ,$(shell arm-none-eabi-gcc -dumpversion)))
diff --git a/hw/bsp/pca10059/board.mk b/hw/bsp/pca10059/board.mk
index 8cce65eb..72dfefdc 100644
--- a/hw/bsp/pca10059/board.mk
+++ b/hw/bsp/pca10059/board.mk
@@ -9,8 +9,8 @@ CFLAGS += \
   -DCONFIG_GPIO_AS_PINRESET \
   -DCFG_TUSB_MCU=OPT_MCU_NRF5X
 
-# nrfx issue undef _ARMCC_VERSION usage https://github.com/NordicSemiconductor/nrfx/issues/49
-CFLAGS += -Wno-error=undef -Wno-error=unused-parameter
+# suppress warning caused by vendor mcu driver
+CFLAGS += -Wno-error=undef -Wno-error=unused-parameter -Wno-error=cast-align
 
 # due to tusb_hal_nrf_power_event
 GCCVERSION = $(firstword $(subst ., ,$(shell arm-none-eabi-gcc -dumpversion)))
diff --git a/hw/bsp/pca10100/board.mk b/hw/bsp/pca10100/board.mk
index 0ec8f0f6..5231aaf6 100644
--- a/hw/bsp/pca10100/board.mk
+++ b/hw/bsp/pca10100/board.mk
@@ -9,8 +9,8 @@ CFLAGS += \
   -DCONFIG_GPIO_AS_PINRESET \
   -DCFG_TUSB_MCU=OPT_MCU_NRF5X
 
-# nrfx issue undef _ARMCC_VERSION usage https://github.com/NordicSemiconductor/nrfx/issues/49
-CFLAGS += -Wno-error=undef -Wno-error=unused-parameter
+# suppress warning caused by vendor mcu driver
+CFLAGS += -Wno-error=undef -Wno-error=unused-parameter -Wno-error=cast-align
 
 # due to tusb_hal_nrf_power_event
 GCCVERSION = $(firstword $(subst ., ,$(shell arm-none-eabi-gcc -dumpversion)))
diff --git a/hw/bsp/raytac_mdbt50q_rx/board.mk b/hw/bsp/raytac_mdbt50q_rx/board.mk
index 0960ffe5..47bb430f 100644
--- a/hw/bsp/raytac_mdbt50q_rx/board.mk
+++ b/hw/bsp/raytac_mdbt50q_rx/board.mk
@@ -8,8 +8,8 @@ CFLAGS += \
   -DNRF52840_XXAA \
   -DCFG_TUSB_MCU=OPT_MCU_NRF5X
 
-# nrfx issue undef _ARMCC_VERSION usage https://github.com/NordicSemiconductor/nrfx/issues/49
-CFLAGS += -Wno-error=undef -Wno-error=unused-parameter
+# suppress warning caused by vendor mcu driver
+CFLAGS += -Wno-error=undef -Wno-error=unused-parameter -Wno-error=cast-align
 
 # due to tusb_hal_nrf_power_event
 GCCVERSION = $(firstword $(subst ., ,$(shell arm-none-eabi-gcc -dumpversion)))
diff --git a/hw/bsp/stm32f070rbnucleo/board.mk b/hw/bsp/stm32f070rbnucleo/board.mk
index 8a073d52..8ae75dd9 100644
--- a/hw/bsp/stm32f070rbnucleo/board.mk
+++ b/hw/bsp/stm32f070rbnucleo/board.mk
@@ -9,8 +9,8 @@ CFLAGS += \
   -DCFG_EXAMPLE_MSC_READONLY \
   -DCFG_TUSB_MCU=OPT_MCU_STM32F0
 
-# mcu driver cause following warnings
-CFLAGS += -Wno-error=unused-parameter
+# suppress warning caused by vendor mcu driver
+CFLAGS += -Wno-error=unused-parameter -Wno-error=cast-align
 
 ST_HAL_DRIVER = hw/mcu/st/st_driver/STM32F0xx_HAL_Driver
 ST_CMSIS = hw/mcu/st/st_driver/CMSIS/Device/ST/STM32F0xx
diff --git a/hw/bsp/stm32f072disco/board.mk b/hw/bsp/stm32f072disco/board.mk
index 522459d6..e6787b26 100644
--- a/hw/bsp/stm32f072disco/board.mk
+++ b/hw/bsp/stm32f072disco/board.mk
@@ -9,8 +9,8 @@ CFLAGS += \
   -DCFG_EXAMPLE_MSC_READONLY \
   -DCFG_TUSB_MCU=OPT_MCU_STM32F0
 
-# mcu driver cause following warnings
-CFLAGS += -Wno-error=unused-parameter
+# suppress warning caused by vendor mcu driver
+CFLAGS += -Wno-error=unused-parameter -Wno-error=cast-align
 
 ST_HAL_DRIVER = hw/mcu/st/st_driver/STM32F0xx_HAL_Driver
 ST_CMSIS = hw/mcu/st/st_driver/CMSIS/Device/ST/STM32F0xx
diff --git a/hw/bsp/stm32f407disco/board.mk b/hw/bsp/stm32f407disco/board.mk
index 92e02153..df2ee4ba 100644
--- a/hw/bsp/stm32f407disco/board.mk
+++ b/hw/bsp/stm32f407disco/board.mk
@@ -9,6 +9,9 @@ CFLAGS += \
   -DSTM32F407xx \
   -DCFG_TUSB_MCU=OPT_MCU_STM32F4
 
+# suppress warning caused by vendor mcu driver
+CFLAGS += -Wno-error=cast-align
+
 ST_HAL_DRIVER = hw/mcu/st/st_driver/STM32F4xx_HAL_Driver
 ST_CMSIS = hw/mcu/st/st_driver/CMSIS/Device/ST/STM32F4xx
 
diff --git a/hw/bsp/stm32f411disco/board.mk b/hw/bsp/stm32f411disco/board.mk
index a5ea8cab..5e0d6c3a 100644
--- a/hw/bsp/stm32f411disco/board.mk
+++ b/hw/bsp/stm32f411disco/board.mk
@@ -9,6 +9,9 @@ CFLAGS += \
   -DSTM32F411xE \
   -DCFG_TUSB_MCU=OPT_MCU_STM32F4
 
+# suppress warning caused by vendor mcu driver
+CFLAGS += -Wno-error=cast-align
+
 ST_HAL_DRIVER = hw/mcu/st/st_driver/STM32F4xx_HAL_Driver
 ST_CMSIS = hw/mcu/st/st_driver/CMSIS/Device/ST/STM32F4xx
 
diff --git a/hw/bsp/stm32f412disco/board.mk b/hw/bsp/stm32f412disco/board.mk
index 2a3ecbdd..5cf5e9b7 100644
--- a/hw/bsp/stm32f412disco/board.mk
+++ b/hw/bsp/stm32f412disco/board.mk
@@ -9,8 +9,8 @@ CFLAGS += \
   -DSTM32F412Zx \
   -DCFG_TUSB_MCU=OPT_MCU_STM32F4
 
-# mcu driver cause following warnings
-CFLAGS += -Wno-error=maybe-uninitialized
+# suppress warning caused by vendor mcu driver
+CFLAGS += -Wno-error=cast-align
 
 ST_HAL_DRIVER = hw/mcu/st/st_driver/STM32F4xx_HAL_Driver
 ST_CMSIS = hw/mcu/st/st_driver/CMSIS/Device/ST/STM32F4xx
diff --git a/hw/bsp/stm32f746nucleo/board.mk b/hw/bsp/stm32f746nucleo/board.mk
index 7e070c1c..95445486 100644
--- a/hw/bsp/stm32f746nucleo/board.mk
+++ b/hw/bsp/stm32f746nucleo/board.mk
@@ -9,8 +9,8 @@ CFLAGS += \
   -DSTM32F746xx \
   -DCFG_TUSB_MCU=OPT_MCU_STM32F7
 
-# mcu driver cause following warnings
-CFLAGS += -Wno-error=shadow
+# suppress warning caused by vendor mcu driver
+CFLAGS += -Wno-error=cast-align -Wno-error=shadow
 
 ST_HAL_DRIVER = hw/mcu/st/st_driver/STM32F7xx_HAL_Driver
 ST_CMSIS = hw/mcu/st/st_driver/CMSIS/Device/ST/STM32F7xx
diff --git a/hw/bsp/stm32f767nucleo/board.mk b/hw/bsp/stm32f767nucleo/board.mk
index e5f0736d..fc638ddc 100644
--- a/hw/bsp/stm32f767nucleo/board.mk
+++ b/hw/bsp/stm32f767nucleo/board.mk
@@ -9,8 +9,8 @@ CFLAGS += \
   -DSTM32F767xx \
   -DCFG_TUSB_MCU=OPT_MCU_STM32F7
 
-# mcu driver cause following warnings
-CFLAGS += -Wno-error=shadow
+# suppress warning caused by vendor mcu driver
+CFLAGS += -Wno-error=cast-align -Wno-error=shadow
 
 ST_HAL_DRIVER = hw/mcu/st/st_driver/STM32F7xx_HAL_Driver
 ST_CMSIS = hw/mcu/st/st_driver/CMSIS/Device/ST/STM32F7xx
diff --git a/hw/bsp/stm32h743nucleo/board.mk b/hw/bsp/stm32h743nucleo/board.mk
index 94cc44b5..30e52dfc 100644
--- a/hw/bsp/stm32h743nucleo/board.mk
+++ b/hw/bsp/stm32h743nucleo/board.mk
@@ -10,7 +10,6 @@ CFLAGS += \
   -DCFG_TUSB_MCU=OPT_MCU_STM32H7
 
 # mcu driver cause following warnings
-CFLAGS += -Wno-error=maybe-uninitialized
 
 ST_HAL_DRIVER = hw/mcu/st/st_driver/STM32H7xx_HAL_Driver
 ST_CMSIS = hw/mcu/st/st_driver/CMSIS/Device/ST/STM32H7xx
diff --git a/src/common/tusb_common.h b/src/common/tusb_common.h
index 2389bfcd..f144cda7 100644
--- a/src/common/tusb_common.h
+++ b/src/common/tusb_common.h
@@ -106,7 +106,7 @@ static inline uint16_t tu_max16 (uint16_t x, uint16_t y) { return (x > y) ? x :
 static inline uint32_t tu_max32 (uint32_t x, uint32_t y) { return (x > y) ? x : y; }
 
 // Align
-static inline uint32_t tu_align_n(uint32_t value, uint32_t alignment)
+static inline uint32_t tu_align(uint32_t value, uint32_t alignment)
 {
   return value & ((uint32_t) ~(alignment-1));
 }
diff --git a/src/portable/nxp/transdimension/dcd_transdimension.c b/src/portable/nxp/transdimension/dcd_transdimension.c
index fcedc1c0..7baf43e2 100644
--- a/src/portable/nxp/transdimension/dcd_transdimension.c
+++ b/src/portable/nxp/transdimension/dcd_transdimension.c
@@ -273,7 +273,8 @@ typedef struct {
   dcd_qtd_t qtd[QHD_MAX] TU_ATTR_ALIGNED(32); // for portability, TinyUSB only queue 1 TD for each Qhd
 }dcd_data_t;
 
-static dcd_data_t _dcd_data CFG_TUSB_MEM_SECTION TU_ATTR_ALIGNED(2048);
+CFG_TUSB_MEM_SECTION TU_ATTR_ALIGNED(2048)
+static dcd_data_t _dcd_data;
 
 //--------------------------------------------------------------------+
 // CONTROLLER API
@@ -478,7 +479,8 @@ bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t t
 
   // Force the CPU to flush the buffer. We increase the size by 32 because the call aligns the
   // address to 32-byte boundaries.
-  CleanInvalidateDCache_by_Addr((uint32_t*) buffer, total_bytes + 31);
+  // void* cast to suppress cast-align warning, buffer must be
+  CleanInvalidateDCache_by_Addr((uint32_t*) tu_align((uint32_t) buffer, 4), total_bytes + 31);
 
   //------------- Prepare qtd -------------//
   qtd_init(p_qtd, buffer, total_bytes);

From a7db945cff33522062818d3c4a68296b7ddccf9a Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sun, 17 May 2020 15:34:14 +0700
Subject: [PATCH 18/25] temporariyly suppress cast-align warning for net_device
 and net example

---
 examples/device/net_lwip_webserver/Makefile | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/examples/device/net_lwip_webserver/Makefile b/examples/device/net_lwip_webserver/Makefile
index fa93cf87..5279c49e 100644
--- a/examples/device/net_lwip_webserver/Makefile
+++ b/examples/device/net_lwip_webserver/Makefile
@@ -6,6 +6,9 @@ CFLAGS += \
   -DTCP_WND=2*TCP_MSS \
   -DHTTPD_USE_CUSTOM_FSDATA=0
 
+# TODO rndis_reports.c and net_device cause cast algin warnings
+CFLAGS += -Wno-error=cast-align
+
 INC += \
   src \
   $(TOP)/hw \

From 550746097b81c07cdc2459371c809a3678fe1ff4 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 18 May 2020 13:03:41 +0700
Subject: [PATCH 19/25] fix cast-align warning for nuc505

---
 hw/bsp/nutiny_sdk_nuc505/board.mk        | 3 ---
 src/portable/nuvoton/nuc505/dcd_nuc505.c | 5 ++++-
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/hw/bsp/nutiny_sdk_nuc505/board.mk b/hw/bsp/nutiny_sdk_nuc505/board.mk
index 874d4ae4..5fb2119b 100644
--- a/hw/bsp/nutiny_sdk_nuc505/board.mk
+++ b/hw/bsp/nutiny_sdk_nuc505/board.mk
@@ -7,9 +7,6 @@ CFLAGS += \
   -mfpu=fpv4-sp-d16 \
   -DCFG_TUSB_MCU=OPT_MCU_NUC505
 
-# TODO this cast-align is caused by dcd_nuc505 should be fixed
-CFLAGS += -Wno-error=cast-align
-
 # All source paths should be relative to the top level.
 LD_FILE = hw/bsp/$(BOARD)/nuc505_flashtoram.ld
 
diff --git a/src/portable/nuvoton/nuc505/dcd_nuc505.c b/src/portable/nuvoton/nuc505/dcd_nuc505.c
index 02f0b35a..e67b69ab 100644
--- a/src/portable/nuvoton/nuc505/dcd_nuc505.c
+++ b/src/portable/nuvoton/nuc505/dcd_nuc505.c
@@ -182,7 +182,10 @@ static void dcd_userEP_in_xfer(struct xfer_ctl_t *xfer, USBD_EP_T *ep)
   /* provided buffers are thankfully 32-bit aligned, allowing most data to be transfered as 32-bit */
   while (countdown > 3)
   {
-    ep->EPDAT = *(uint32_t *)xfer->data_ptr;
+    uint32_t u32;
+    memcpy(&u32, xfer->data_ptr, 4);
+
+    ep->EPDAT = u32;
     xfer->data_ptr += 4; countdown -= 4;
   }
   while (countdown--)

From 4e8d414bc666d4636efd29e1c9feffd622d055c5 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 20 May 2020 13:38:41 +0700
Subject: [PATCH 20/25] added osal_queue_empty() API

ported for osal none/freertos/mynewt
---
 src/osal/osal.h          |  1 +
 src/osal/osal_freertos.h | 13 +++++++++----
 src/osal/osal_mynewt.h   |  6 ++++++
 src/osal/osal_none.h     | 12 ++++++++++--
 4 files changed, 26 insertions(+), 6 deletions(-)

diff --git a/src/osal/osal.h b/src/osal/osal.h
index 0421b329..3729ad94 100644
--- a/src/osal/osal.h
+++ b/src/osal/osal.h
@@ -80,6 +80,7 @@ static inline bool osal_mutex_unlock(osal_mutex_t mutex_hdl);
 static inline osal_queue_t osal_queue_create(osal_queue_def_t* qdef);
 static inline bool osal_queue_receive(osal_queue_t const qhdl, void* data);
 static inline bool osal_queue_send(osal_queue_t const qhdl, void const * data, bool in_isr);
+static inline bool osal_queue_empty(osal_queue_t const qhdl);
 
 #if 0  // TODO remove subtask related macros later
 // Sub Task
diff --git a/src/osal/osal_freertos.h b/src/osal/osal_freertos.h
index 240206e3..839c1924 100644
--- a/src/osal/osal_freertos.h
+++ b/src/osal/osal_freertos.h
@@ -118,14 +118,19 @@ static inline osal_queue_t osal_queue_create(osal_queue_def_t* qdef)
   return xQueueCreateStatic(qdef->depth, qdef->item_sz, (uint8_t*) qdef->buf, &qdef->sq);
 }
 
-static inline bool osal_queue_receive(osal_queue_t const queue_hdl, void* data)
+static inline bool osal_queue_receive(osal_queue_t const qhdl, void* data)
 {
-  return xQueueReceive(queue_hdl, data, portMAX_DELAY);
+  return xQueueReceive(qhdl, data, portMAX_DELAY);
 }
 
-static inline bool osal_queue_send(osal_queue_t const queue_hdl, void const * data, bool in_isr)
+static inline bool osal_queue_send(osal_queue_t const qhdl, void const * data, bool in_isr)
 {
-  return in_isr ? xQueueSendToBackFromISR(queue_hdl, data, NULL) : xQueueSendToBack(queue_hdl, data, OSAL_TIMEOUT_WAIT_FOREVER);
+  return in_isr ? xQueueSendToBackFromISR(qhdl, data, NULL) : xQueueSendToBack(qhdl, data, OSAL_TIMEOUT_WAIT_FOREVER);
+}
+
+static inline bool osal_queue_empty(osal_queue_t const qhdl)
+{
+  return uxQueueMessagesWaiting(qhdl) > 0;
 }
 
 #ifdef __cplusplus
diff --git a/src/osal/osal_mynewt.h b/src/osal/osal_mynewt.h
index e47e140c..f7c871c4 100644
--- a/src/osal/osal_mynewt.h
+++ b/src/osal/osal_mynewt.h
@@ -161,6 +161,12 @@ static inline bool osal_queue_send(osal_queue_t const qhdl, void const * data, b
   return true;
 }
 
+static inline bool osal_queue_empty(osal_queue_t const qhdl)
+{
+  return STAILQ_EMPTY(&qhdl->evq.evq_list);
+}
+
+
 #ifdef __cplusplus
  }
 #endif
diff --git a/src/osal/osal_none.h b/src/osal/osal_none.h
index b27e628a..c9b76291 100644
--- a/src/osal/osal_none.h
+++ b/src/osal/osal_none.h
@@ -142,7 +142,7 @@ typedef osal_queue_def_t* osal_queue_t;
     }\
   }
 
-// lock queue by disable usb isr
+// lock queue by disable USB interrupt
 static inline void _osal_q_lock(osal_queue_t qhdl)
 {
   (void) qhdl;
@@ -176,7 +176,6 @@ static inline osal_queue_t osal_queue_create(osal_queue_def_t* qdef)
   return (osal_queue_t) qdef;
 }
 
-// non blocking
 static inline bool osal_queue_receive(osal_queue_t const qhdl, void* data)
 {
   _osal_q_lock(qhdl);
@@ -203,6 +202,15 @@ static inline bool osal_queue_send(osal_queue_t const qhdl, void const * data, b
   return success;
 }
 
+static inline bool osal_queue_empty(osal_queue_t const qhdl)
+{
+  _osal_q_lock(qhdl);
+  bool is_empty = tu_fifo_empty(&qhdl->ff);
+  _osal_q_unlock(qhdl);
+
+  return is_empty;
+}
+
 #ifdef __cplusplus
  }
 #endif

From 88a455a9b99099bf27ce239006ecfd2da3894bcf Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 20 May 2020 14:31:45 +0700
Subject: [PATCH 21/25] added tud_task_event_ready()

to check if there is pending events in the tud task without executing
it. Useful to check before entering low power mode with WFI/WFE
---
 src/device/usbd.c | 8 ++++++++
 src/device/usbd.h | 3 +++
 2 files changed, 11 insertions(+)

diff --git a/src/device/usbd.c b/src/device/usbd.c
index 06e724cb..f7918c07 100644
--- a/src/device/usbd.c
+++ b/src/device/usbd.c
@@ -339,6 +339,14 @@ static void usbd_reset(uint8_t rhport)
   }
 }
 
+bool tud_task_event_ready(void)
+{
+  // Skip if stack is not initialized
+  if ( !tusb_inited() ) return false;
+
+  return !osal_queue_empty(_usbd_q);
+}
+
 /* USB Device Driver task
  * This top level thread manages all device controller event and delegates events to class-specific drivers.
  * This should be called periodically within the mainloop or rtos thread.
diff --git a/src/device/usbd.h b/src/device/usbd.h
index 713bee2b..ecef63e1 100644
--- a/src/device/usbd.h
+++ b/src/device/usbd.h
@@ -47,6 +47,9 @@ bool tud_init (void);
 // Task function should be called in main/rtos loop
 void tud_task (void);
 
+// Check if there is pending events need proccessing by tud_task()
+bool tud_task_event_ready(void);
+
 // Interrupt handler, name alias to DCD
 #define tud_int_handler   dcd_int_handler
 

From d8a15aca777abb0094935440f7cd551b36d62f43 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 20 May 2020 14:38:34 +0700
Subject: [PATCH 22/25] remove osal_queue_t const qhdl from osal API

since it doesn't make any differences.
---
 src/osal/osal.h          | 6 +++---
 src/osal/osal_freertos.h | 6 +++---
 src/osal/osal_mynewt.h   | 6 +++---
 src/osal/osal_none.h     | 6 +++---
 4 files changed, 12 insertions(+), 12 deletions(-)

diff --git a/src/osal/osal.h b/src/osal/osal.h
index 3729ad94..2e7a3539 100644
--- a/src/osal/osal.h
+++ b/src/osal/osal.h
@@ -78,9 +78,9 @@ static inline bool osal_mutex_unlock(osal_mutex_t mutex_hdl);
 
 //------------- Queue -------------//
 static inline osal_queue_t osal_queue_create(osal_queue_def_t* qdef);
-static inline bool osal_queue_receive(osal_queue_t const qhdl, void* data);
-static inline bool osal_queue_send(osal_queue_t const qhdl, void const * data, bool in_isr);
-static inline bool osal_queue_empty(osal_queue_t const qhdl);
+static inline bool osal_queue_receive(osal_queue_t qhdl, void* data);
+static inline bool osal_queue_send(osal_queue_t qhdl, void const * data, bool in_isr);
+static inline bool osal_queue_empty(osal_queue_t qhdl);
 
 #if 0  // TODO remove subtask related macros later
 // Sub Task
diff --git a/src/osal/osal_freertos.h b/src/osal/osal_freertos.h
index 839c1924..d2d5f51c 100644
--- a/src/osal/osal_freertos.h
+++ b/src/osal/osal_freertos.h
@@ -118,17 +118,17 @@ static inline osal_queue_t osal_queue_create(osal_queue_def_t* qdef)
   return xQueueCreateStatic(qdef->depth, qdef->item_sz, (uint8_t*) qdef->buf, &qdef->sq);
 }
 
-static inline bool osal_queue_receive(osal_queue_t const qhdl, void* data)
+static inline bool osal_queue_receive(osal_queue_t qhdl, void* data)
 {
   return xQueueReceive(qhdl, data, portMAX_DELAY);
 }
 
-static inline bool osal_queue_send(osal_queue_t const qhdl, void const * data, bool in_isr)
+static inline bool osal_queue_send(osal_queue_t qhdl, void const * data, bool in_isr)
 {
   return in_isr ? xQueueSendToBackFromISR(qhdl, data, NULL) : xQueueSendToBack(qhdl, data, OSAL_TIMEOUT_WAIT_FOREVER);
 }
 
-static inline bool osal_queue_empty(osal_queue_t const qhdl)
+static inline bool osal_queue_empty(osal_queue_t qhdl)
 {
   return uxQueueMessagesWaiting(qhdl) > 0;
 }
diff --git a/src/osal/osal_mynewt.h b/src/osal/osal_mynewt.h
index f7c871c4..6882329c 100644
--- a/src/osal/osal_mynewt.h
+++ b/src/osal/osal_mynewt.h
@@ -125,7 +125,7 @@ static inline osal_queue_t osal_queue_create(osal_queue_def_t* qdef)
   return (osal_queue_t) qdef;
 }
 
-static inline bool osal_queue_receive(osal_queue_t const qhdl, void* data)
+static inline bool osal_queue_receive(osal_queue_t qhdl, void* data)
 {
   struct os_event* ev;
   ev = os_eventq_get(&qhdl->evq);
@@ -137,7 +137,7 @@ static inline bool osal_queue_receive(osal_queue_t const qhdl, void* data)
   return true;
 }
 
-static inline bool osal_queue_send(osal_queue_t const qhdl, void const * data, bool in_isr)
+static inline bool osal_queue_send(osal_queue_t qhdl, void const * data, bool in_isr)
 {
   (void) in_isr;
 
@@ -161,7 +161,7 @@ static inline bool osal_queue_send(osal_queue_t const qhdl, void const * data, b
   return true;
 }
 
-static inline bool osal_queue_empty(osal_queue_t const qhdl)
+static inline bool osal_queue_empty(osal_queue_t qhdl)
 {
   return STAILQ_EMPTY(&qhdl->evq.evq_list);
 }
diff --git a/src/osal/osal_none.h b/src/osal/osal_none.h
index c9b76291..3bbf1511 100644
--- a/src/osal/osal_none.h
+++ b/src/osal/osal_none.h
@@ -176,7 +176,7 @@ static inline osal_queue_t osal_queue_create(osal_queue_def_t* qdef)
   return (osal_queue_t) qdef;
 }
 
-static inline bool osal_queue_receive(osal_queue_t const qhdl, void* data)
+static inline bool osal_queue_receive(osal_queue_t qhdl, void* data)
 {
   _osal_q_lock(qhdl);
   bool success = tu_fifo_read(&qhdl->ff, data);
@@ -185,7 +185,7 @@ static inline bool osal_queue_receive(osal_queue_t const qhdl, void* data)
   return success;
 }
 
-static inline bool osal_queue_send(osal_queue_t const qhdl, void const * data, bool in_isr)
+static inline bool osal_queue_send(osal_queue_t qhdl, void const * data, bool in_isr)
 {
   if (!in_isr) {
     _osal_q_lock(qhdl);
@@ -202,7 +202,7 @@ static inline bool osal_queue_send(osal_queue_t const qhdl, void const * data, b
   return success;
 }
 
-static inline bool osal_queue_empty(osal_queue_t const qhdl)
+static inline bool osal_queue_empty(osal_queue_t qhdl)
 {
   _osal_q_lock(qhdl);
   bool is_empty = tu_fifo_empty(&qhdl->ff);

From a0fe3a80e74fceee6c97fcf734822280d1cfd62e Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 20 May 2020 15:09:46 +0700
Subject: [PATCH 23/25] remove queue lock/unlock per review

---
 src/osal/osal_none.h | 8 +++-----
 1 file changed, 3 insertions(+), 5 deletions(-)

diff --git a/src/osal/osal_none.h b/src/osal/osal_none.h
index 3bbf1511..0ac5e8aa 100644
--- a/src/osal/osal_none.h
+++ b/src/osal/osal_none.h
@@ -204,11 +204,9 @@ static inline bool osal_queue_send(osal_queue_t qhdl, void const * data, bool in
 
 static inline bool osal_queue_empty(osal_queue_t qhdl)
 {
-  _osal_q_lock(qhdl);
-  bool is_empty = tu_fifo_empty(&qhdl->ff);
-  _osal_q_unlock(qhdl);
-
-  return is_empty;
+  // Skip queue lock/unlock since this function is primarily called
+  // with interrupt disabled before going into low power mode
+  return tu_fifo_empty(&qhdl->ff);
 }
 
 #ifdef __cplusplus

From 8b66098335cb93504c7680fadad502b59ff73b48 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 20 May 2020 15:21:11 +0700
Subject: [PATCH 24/25] fix freeRTOS logic

---
 src/osal/osal_freertos.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/osal/osal_freertos.h b/src/osal/osal_freertos.h
index d2d5f51c..42ea1fd1 100644
--- a/src/osal/osal_freertos.h
+++ b/src/osal/osal_freertos.h
@@ -130,7 +130,7 @@ static inline bool osal_queue_send(osal_queue_t qhdl, void const * data, bool in
 
 static inline bool osal_queue_empty(osal_queue_t qhdl)
 {
-  return uxQueueMessagesWaiting(qhdl) > 0;
+  return uxQueueMessagesWaiting(qhdl) == 0;
 }
 
 #ifdef __cplusplus

From ff9994116e932170acd117db7732863d95a348f6 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 21 May 2020 21:22:12 +0700
Subject: [PATCH 25/25] fix nrf hanged (blocking wait) when called within
 critical section

---
 .../device/cdc_msc/ses/nrf5x/nrf5x.emProject  | 29 ++++----
 src/portable/nordic/nrf5x/dcd_nrf5x.c         | 68 +++++++++++++++----
 2 files changed, 73 insertions(+), 24 deletions(-)

diff --git a/examples/device/cdc_msc/ses/nrf5x/nrf5x.emProject b/examples/device/cdc_msc/ses/nrf5x/nrf5x.emProject
index fa553463..f7714f26 100644
--- a/examples/device/cdc_msc/ses/nrf5x/nrf5x.emProject
+++ b/examples/device/cdc_msc/ses/nrf5x/nrf5x.emProject
@@ -19,8 +19,9 @@
       arm_target_device_name="nRF52840_xxAA"
       arm_target_interface_type="SWD"
       build_treat_warnings_as_errors="Yes"
-      c_preprocessor_definitions="NRF52840_XXAA;__nRF_FAMILY;ARM_MATH_CM4;FLASH_PLACEMENT=1;CFG_TUSB_MCU=OPT_MCU_NRF5X"
-      c_user_include_directories="../../src;$(rootDir)/hw/mcu/nordic/cmsis/Include;$(rootDir)/hw;$(rootDir)/src;$(nrfxDir)/..;$(nrfxDir);$(nrfxDir)/mdk;$(nrfxDir)/hal;$(nrfxDir)/drivers/include;$(nrfxDir)/drivers/src"
+      c_additional_options="-Wno-error=undef;-Wno-error=unused-parameter;-Wno-error=cast-align;-Wno-error=cast-function-type"
+      c_preprocessor_definitions="NRF52840_XXAA;__nRF_FAMILY;ARM_MATH_CM4;FLASH_PLACEMENT=1;CFG_TUSB_MCU=OPT_MCU_NRF5X;CFG_TUSB_DEBUG=1"
+      c_user_include_directories="../../src;$(rootDir)/lib/CMSIS_4/CMSIS/Include;$(rootDir)/hw;$(rootDir)/src;$(nrfxDir)/..;$(nrfxDir);$(nrfxDir)/mdk;$(nrfxDir)/hal;$(nrfxDir)/drivers/include;$(nrfxDir)/drivers/src"
       debug_register_definition_file="nrf52840_Registers.xml"
       debug_target_connection="J-Link"
       gcc_enable_all_warnings="Yes"
@@ -42,11 +43,12 @@
       recurse="Yes" />
     <folder Name="hw">
       <folder Name="bsp">
-        <folder Name="pca10056">
-          <file file_name="../../../../../hw/bsp/pca10056/pca10056.c" />
-        </folder>
         <file file_name="../../../../../hw/bsp/ansi_escape.h" />
         <file file_name="../../../../../hw/bsp/board.h" />
+        <file file_name="../../../../../hw/bsp/board.c" />
+        <folder Name="feather_nrf52840_express">
+          <file file_name="../../../../../hw/bsp/feather_nrf52840_express/feather_nrf52840_express.c" />
+        </folder>
       </folder>
       <folder Name="mcu">
         <folder Name="nordic">
@@ -103,16 +105,10 @@
       <file file_name="thumb_crt0.s" />
       <file file_name="nRF52840_xxAA_s140v6_MemoryMap.xml" />
     </folder>
-    <folder
-      Name="segger_rtt"
-      exclude=""
-      filter="*.c;*.h"
-      path="../../../../../lib/segger_rtt"
-      recurse="No" />
     <configuration
       Name="pca10056"
       build_treat_warnings_as_errors="No"
-      c_preprocessor_definitions="BOARD_PCA10056"
+      c_preprocessor_definitions=""
       linker_memory_map_file="nRF52840_xxAA_MemoryMap.xml" />
     <configuration
       Name="pca10056 s140v6"
@@ -121,7 +117,16 @@
       c_user_include_directories="$(nrfxDir)/../nrf5x/s140_nrf52_6.1.1_API/include;$(nrfxDir)/../nrf5x/s140_nrf52_6.1.1_API/include/nrf52"
       debug_start_from_entry_point_symbol="No"
       linker_memory_map_file="nRF52840_xxAA_s140v6_MemoryMap.xml" />
+    <folder Name="SEGGER_RTT">
+      <folder Name="RTT">
+        <file file_name="../../../../../lib/SEGGER_RTT/RTT/SEGGER_RTT.c" />
+        <file file_name="../../../../../lib/SEGGER_RTT/RTT/SEGGER_RTT.h" />
+        <file file_name="../../../../../lib/SEGGER_RTT/RTT/SEGGER_RTT_Conf.h" />
+        <file file_name="../../../../../lib/SEGGER_RTT/RTT/SEGGER_RTT_printf.c" />
+      </folder>
+    </folder>
   </project>
   <configuration Name="pca10056" />
   <configuration Name="pca10056 s140v6" />
+  <configuration Name="Feather nRF52840" />
 </solution>
diff --git a/src/portable/nordic/nrf5x/dcd_nrf5x.c b/src/portable/nordic/nrf5x/dcd_nrf5x.c
index d788547b..7ca32c4f 100644
--- a/src/portable/nordic/nrf5x/dcd_nrf5x.c
+++ b/src/portable/nordic/nrf5x/dcd_nrf5x.c
@@ -51,6 +51,11 @@ enum
                       USBD_INTENCLR_ENDISOIN_Msk | USBD_INTEN_ENDISOOUT_Msk
 };
 
+enum
+{
+  EP_COUNT = 8
+};
+
 // Transfer descriptor
 typedef struct
 {
@@ -69,36 +74,73 @@ typedef struct
 static struct
 {
   // All 8 endpoints including control IN & OUT (offset 1)
-  xfer_td_t xfer[8][2];
+  xfer_td_t xfer[EP_COUNT][2];
 
-  // Only one DMA can run at a time
-  volatile bool dma_running;
+  // Number of pending DMA that is started but not handled yet by dcd_int_handler().
+  // Since nRF can only carry one DMA can run at a time, this value is normally be either 0 or 1.
+  // However, in critical section with interrupt disabled, the DMA can be finished and added up
+  // until handled by dcd_init_handler() when exiting critical section.
+  volatile uint8_t dma_pending;
 }_dcd;
 
 /*------------------------------------------------------------------*/
 /* Control / Bulk / Interrupt (CBI) Transfer
  *------------------------------------------------------------------*/
 
+// NVIC_GetEnableIRQ is only available in CMSIS v5
+#ifndef NVIC_GetEnableIRQ
+static inline uint32_t NVIC_GetEnableIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->ISER[(((uint32_t)(int32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+#endif
+
 // helper to start DMA
 static void edpt_dma_start(volatile uint32_t* reg_startep)
 {
   // Only one dma can be active
-  if ( _dcd.dma_running )
+  if ( _dcd.dma_pending )
   {
     if (SCB->ICSR & SCB_ICSR_VECTACTIVE_Msk)
     {
-      // If called within ISR, use usbd task to defer later
+      // Called within ISR, use usbd task to defer later
       usbd_defer_func( (osal_task_func_t) edpt_dma_start, (void*) reg_startep, true );
       return;
     }
     else
     {
-      // Otherwise simply block wait
-      while ( _dcd.dma_running )  { }
+      if ( __get_PRIMASK() || !NVIC_GetEnableIRQ(USBD_IRQn) )
+      {
+        // Called in critical section with interrupt disabled. We have to manually check
+        // for the DMA complete by comparing current pending DMA with number of ENDED Events
+        uint32_t ended = 0;
+
+        while ( _dcd.dma_pending < ((uint8_t) ended) )
+        {
+          ended = NRF_USBD->EVENTS_ENDISOIN + NRF_USBD->EVENTS_ENDISOOUT;
+
+          for (uint8_t i=0; i<EP_COUNT; i++)
+          {
+            ended += NRF_USBD->EVENTS_ENDEPIN[i] + NRF_USBD->EVENTS_ENDEPOUT[i];
+          }
+        }
+      }else
+      {
+        // Called in non-critical thread-mode, should be 99% of the time.
+        // Should be safe to blocking wait until previous DMA transfer complete
+        while ( _dcd.dma_pending ) { }
+      }
     }
   }
 
-  _dcd.dma_running = true;
+  _dcd.dma_pending++;
 
   (*reg_startep) = 1;
   __ISB(); __DSB();
@@ -107,8 +149,8 @@ static void edpt_dma_start(volatile uint32_t* reg_startep)
 // DMA is complete
 static void edpt_dma_end(void)
 {
-  TU_ASSERT(_dcd.dma_running, );
-  _dcd.dma_running = false;
+  TU_ASSERT(_dcd.dma_pending, );
+  _dcd.dma_pending = 0;
 }
 
 // helper getting td
@@ -282,9 +324,11 @@ bool dcd_edpt_xfer (uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t
 
   if ( control_status )
   {
-    // Status Phase also require Easy DMA has to be free as well !!!!
+    // Status Phase also requires Easy DMA has to be available as well !!!!
+    // However TASKS_EP0STATUS doesn't trigger any DMA transfer and got ENDED event subsequently
+    // Therefore dma_running state will be corrected right away
     edpt_dma_start(&NRF_USBD->TASKS_EP0STATUS);
-    edpt_dma_end();
+    if (_dcd.dma_pending) _dcd.dma_pending--; // correct the dma_running++ in dma start
 
     // The nRF doesn't interrupt on status transmit so we queue up a success response.
     dcd_event_xfer_complete(0, ep_addr, 0, XFER_RESULT_SUCCESS, false);