diff --git a/demos/host/host_cmsis_rtx/host_cmsis_rtx.uvopt b/demos/host/host_cmsis_rtx/host_cmsis_rtx.uvopt
index 4ee63748..c4d0b83d 100644
--- a/demos/host/host_cmsis_rtx/host_cmsis_rtx.uvopt
+++ b/demos/host/host_cmsis_rtx/host_cmsis_rtx.uvopt
@@ -527,22 +527,6 @@
1
0
0
- 0
- 0
- 41
- 56
- 0
- ..\..\bsp\boards\embedded_artists\board_ea4357.c
- board_ea4357.c
- 0
- 0
-
-
- 2
- 9
- 1
- 0
- 0
2
0
0
@@ -555,7 +539,7 @@
2
- 10
+ 9
1
0
0
@@ -571,7 +555,7 @@
2
- 11
+ 10
1
0
0
@@ -587,7 +571,7 @@
2
- 12
+ 11
1
0
0
@@ -603,7 +587,7 @@
2
- 13
+ 12
1
0
0
@@ -619,7 +603,7 @@
2
- 14
+ 13
1
0
0
@@ -635,7 +619,7 @@
2
- 15
+ 14
1
0
0
@@ -651,7 +635,7 @@
2
- 16
+ 15
1
0
0
@@ -665,11 +649,27 @@
0
0
+
+ 2
+ 16
+ 1
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ 0
+ ..\..\bsp\boards\embedded_artists\ea4357\board_ea4357.c
+ board_ea4357.c
+ 0
+ 0
+
tinyusb
- 1
+ 0
0
0
0
@@ -681,7 +681,7 @@
0
30
0
- 28
+ 36
39
0
..\..\..\tinyusb\tusb.c
@@ -743,10 +743,10 @@
1
0
0
- 38
+ 37
0
- 358
- 364
+ 362
+ 365
0
..\..\..\tinyusb\host\usbh.c
usbh.c
@@ -759,10 +759,10 @@
1
0
0
- 18
+ 0
0
- 589
- 606
+ 1
+ 1
0
..\..\..\tinyusb\host\ehci\ehci.c
ehci.c
@@ -993,7 +993,7 @@
0
0
0
- 391
+ 403
406
0
..\..\bsp\lpc43xx\CMSIS_LPC43xx_DriverLib\src\lpc43xx_cgu.c
@@ -1009,7 +1009,7 @@
0
44
0
- 48
+ 57
60
0
..\..\bsp\lpc43xx\CMSIS_LPC43xx_DriverLib\src\system_LPC43xx.c
@@ -1049,7 +1049,7 @@
0
0
0
- 138
+ 148
151
0
..\..\bsp\lpc43xx\startup_keil\startup_LPC43xx.s
@@ -1071,10 +1071,10 @@
1
0
0
- 13
+ 0
0
- 203
- 215
+ 213
+ 217
0
..\..\..\vendor\cmsis_rtos_rtx\RTX_Conf_CM.c
RTX_Conf_CM.c
diff --git a/demos/host/host_cmsis_rtx/host_cmsis_rtx.uvproj b/demos/host/host_cmsis_rtx/host_cmsis_rtx.uvproj
index 8c3553a8..b332e409 100644
--- a/demos/host/host_cmsis_rtx/host_cmsis_rtx.uvproj
+++ b/demos/host/host_cmsis_rtx/host_cmsis_rtx.uvproj
@@ -348,7 +348,7 @@
0
--gnu --c99 --diag_suppress=66 --no_inline
- CORE_M4 MCU=MCU_LPC43XX BOARD=BOARD_EA4357 TUSB_CFG_OS=TUSB_OS_CMSIS_RTX TUSB_CFG_OS_TASK_PRIO=osPriorityRealtime
+ CORE_M4 TUSB_CFG_MCU=MCU_LPC43XX BOARD=BOARD_EA4357 TUSB_CFG_OS=TUSB_OS_CMSIS_RTX TUSB_CFG_OS_TASK_PRIO=osPriorityRealtime
..\src;..\..\bsp\lpc43xx\CMSIS_LPC43xx_DriverLib\inc;..\..\bsp;..\..\..\tinyusb;..\..\..\vendor\cmsis_rtos_rtx\INC;..\host_cmsis_rtx
@@ -431,11 +431,6 @@
1
..\..\bsp\boards\board.c
-
- board_ea4357.c
- 1
- ..\..\bsp\boards\embedded_artists\board_ea4357.c
-
printf_retarget.c
1
@@ -476,6 +471,11 @@
1
..\..\bsp\boards\keil\board_mcb4300.c
+
+ board_ea4357.c
+ 1
+ ..\..\bsp\boards\embedded_artists\ea4357\board_ea4357.c
+
@@ -1050,11 +1050,6 @@
1
..\..\bsp\boards\board.c
-
- board_ea4357.c
- 1
- ..\..\bsp\boards\embedded_artists\board_ea4357.c
-
printf_retarget.c
1
@@ -1135,6 +1130,11 @@
1
..\..\bsp\boards\keil\board_mcb4300.c
+
+ board_ea4357.c
+ 1
+ ..\..\bsp\boards\embedded_artists\ea4357\board_ea4357.c
+
diff --git a/demos/host/host_os_none/.cproject b/demos/host/host_os_none/.cproject
index a926209d..569f0988 100644
--- a/demos/host/host_os_none/.cproject
+++ b/demos/host/host_os_none/.cproject
@@ -30,7 +30,7 @@
-
+
-
+
@@ -62,7 +62,7 @@
-
+
@@ -119,7 +119,7 @@
-
+
-
+
@@ -157,7 +157,7 @@
-
+
@@ -216,7 +216,7 @@
-
+
-
+
@@ -250,7 +250,7 @@
-
+
@@ -308,7 +308,7 @@
-
+
-
+
@@ -342,7 +342,7 @@
-
+
@@ -400,7 +400,7 @@
-
+
-
+
@@ -432,7 +432,7 @@
-
+
@@ -489,7 +489,7 @@
-
+
-
+
@@ -524,7 +524,7 @@
-
+
@@ -563,86 +563,73 @@
<?xml version="1.0" encoding="UTF-8"?>
<TargetConfig>
-<Properties property_0="" property_2="LPC18x7_43x7_2x512_BootA.cfx" property_3="NXP" property_4="LPC4357" property_count="5" version="1"/>
-<infoList vendor="NXP"><info chip="LPC4357" flash_driver="LPC18x7_43x7_2x512_BootA.cfx" match_id="0x0" name="LPC4357" resetscript="LPC18LPC43InternalFLASHBootResetscript.scp" stub="crt_emu_lpc18_43_nxp"><chip><name>LPC4357</name>
-<family>LPC43xx</family>
+<Properties property_0="" property_3="NXP" property_4="LPC1769" property_count="5" version="1"/>
+<infoList vendor="NXP"><info chip="LPC1769" match_id="0x26113F37" name="LPC1769" package="lpc17_lqfp100.xml"><chip><name>LPC1769</name>
+<family>LPC17xx</family>
<vendor>NXP (formerly Philips)</vendor>
<reset board="None" core="Real" sys="Real"/>
<clock changeable="TRUE" freq="20MHz" is_accurate="TRUE"/>
<memory can_program="true" id="Flash" is_ro="true" type="Flash"/>
<memory id="RAM" type="RAM"/>
<memory id="Periph" is_volatile="true" type="Peripheral"/>
-<memoryInstance derived_from="Flash" id="MFlashA512" location="0x1a000000" size="0x80000"/>
-<memoryInstance derived_from="Flash" id="MFlashB512" location="0x1b000000" size="0x80000"/>
+<memoryInstance derived_from="Flash" id="MFlash512" location="0x0" size="0x80000"/>
<memoryInstance derived_from="RAM" id="RamLoc32" location="0x10000000" size="0x8000"/>
-<memoryInstance derived_from="RAM" id="RamLoc40" location="0x10080000" size="0xa000"/>
-<memoryInstance derived_from="RAM" id="RamAHB32" location="0x20000000" size="0x8000"/>
-<memoryInstance derived_from="RAM" id="RamAHB16" location="0x20008000" size="0x4000"/>
-<memoryInstance derived_from="RAM" id="RamAHB_ETB16" location="0x2000c000" size="0x4000"/>
-<prog_flash blocksz="0x2000" location="0x1a000000" maxprgbuff="0x400" progwithcode="TRUE" size="0x10000"/>
-<prog_flash blocksz="0x10000" location="0x1a010000" maxprgbuff="0x400" progwithcode="TRUE" size="0x70000"/>
-<prog_flash blocksz="0x2000" location="0x1b000000" maxprgbuff="0x400" progwithcode="TRUE" size="0x10000"/>
-<prog_flash blocksz="0x10000" location="0x1b010000" maxprgbuff="0x400" progwithcode="TRUE" size="0x70000"/>
-<peripheralInstance derived_from="V7M_MPU" id="MPU" location="0xe000ed90"/>
-<peripheralInstance derived_from="V7M_NVIC" id="NVIC" location="0xe000e000"/>
-<peripheralInstance derived_from="V7M_DCR" id="DCR" location="0xe000edf0"/>
-<peripheralInstance derived_from="V7M_ITM" id="ITM" location="0xe0000000"/>
-<peripheralInstance derived_from="SCT" id="SCT" location="0x40000000"/>
-<peripheralInstance derived_from="GPDMA" id="GPDMA" location="0x40002000"/>
-<peripheralInstance derived_from="SPIFI" id="SPIFI" location="0x40003000"/>
-<peripheralInstance derived_from="SDMMC" id="SDMMC" location="0x40004000"/>
-<peripheralInstance derived_from="EMC" id="EMC" location="0x40005000"/>
-<peripheralInstance derived_from="USB0" id="USB0" location="0x40006000"/>
-<peripheralInstance derived_from="USB1" id="USB1" location="0x40007000"/>
-<peripheralInstance derived_from="LCD" id="LCD" location="0x40008000"/>
-<peripheralInstance derived_from="EEPROM" id="EEPROM" location="0x4000e000"/>
-<peripheralInstance derived_from="ETHERNET" id="ETHERNET" location="0x40010000"/>
-<peripheralInstance derived_from="ATIMER" id="ATIMER" location="0x40040000"/>
-<peripheralInstance derived_from="REGFILE" id="REGFILE" location="0x40041000"/>
-<peripheralInstance derived_from="PMC" id="PMC" location="0x40042000"/>
-<peripheralInstance derived_from="CREG" id="CREG" location="0x40043000"/>
-<peripheralInstance derived_from="EVENTROUTER" id="EVENTROUTER" location="0x40044000"/>
-<peripheralInstance derived_from="RTC" id="RTC" location="0x40046000"/>
-<peripheralInstance derived_from="CGU" id="CGU" location="0x40050000"/>
-<peripheralInstance derived_from="CCU1" id="CCU1" location="0x40051000"/>
-<peripheralInstance derived_from="CCU2" id="CCU2" location="0x40052000"/>
-<peripheralInstance derived_from="RGU" id="RGU" location="0x40053000"/>
-<peripheralInstance derived_from="WWDT" id="WWDT" location="0x40080000"/>
-<peripheralInstance derived_from="USART0" id="USART0" location="0x40081000"/>
-<peripheralInstance derived_from="USART2" id="USART2" location="0x400c1000"/>
-<peripheralInstance derived_from="USART3" id="USART3" location="0x400c2000"/>
-<peripheralInstance derived_from="UART1" id="UART1" location="0x40082000"/>
-<peripheralInstance derived_from="SSP0" id="SSP0" location="0x40083000"/>
-<peripheralInstance derived_from="SSP1" id="SSP1" location="0x400c5000"/>
-<peripheralInstance derived_from="TIMER0" id="TIMER0" location="0x40084000"/>
-<peripheralInstance derived_from="TIMER1" id="TIMER1" location="0x40085000"/>
-<peripheralInstance derived_from="TIMER2" id="TIMER2" location="0x400c3000"/>
-<peripheralInstance derived_from="TIMER3" id="TIMER3" location="0x400c4000"/>
-<peripheralInstance derived_from="SCU" id="SCU" location="0x40086000"/>
-<peripheralInstance derived_from="GPIO-PIN-INT" id="GPIO-PIN-INT" location="0x40087000"/>
-<peripheralInstance derived_from="GPIO-GROUP-INT0" id="GPIO-GROUP-INT0" location="0x40088000"/>
-<peripheralInstance derived_from="GPIO-GROUP-INT1" id="GPIO-GROUP-INT1" location="0x40089000"/>
-<peripheralInstance derived_from="MCPWM" id="MCPWM" location="0x400a0000"/>
-<peripheralInstance derived_from="I2C0" id="I2C0" location="0x400a1000"/>
-<peripheralInstance derived_from="I2C1" id="I2C1" location="0x400e0000"/>
-<peripheralInstance derived_from="I2S0" id="I2S0" location="0x400a2000"/>
-<peripheralInstance derived_from="I2S1" id="I2S1" location="0x400a3000"/>
-<peripheralInstance derived_from="C-CAN1" id="C-CAN1" location="0x400a4000"/>
-<peripheralInstance derived_from="RITIMER" id="RITIMER" location="0x400c0000"/>
-<peripheralInstance derived_from="QEI" id="QEI" location="0x400c6000"/>
-<peripheralInstance derived_from="GIMA" id="GIMA" location="0x400c7000"/>
-<peripheralInstance derived_from="DAC" id="DAC" location="0x400e1000"/>
-<peripheralInstance derived_from="C-CAN0" id="C-CAN0" location="0x400e2000"/>
-<peripheralInstance derived_from="ADC0" id="ADC0" location="0x400e3000"/>
-<peripheralInstance derived_from="ADC1" id="ADC1" location="0x400e4000"/>
-<peripheralInstance derived_from="GPIO-PORT" id="GPIO-PORT" location="0x400f4000"/>
-<peripheralInstance derived_from="SPI" id="SPI" location="0x40100000"/>
-<peripheralInstance derived_from="SGPIO" id="SGPIO" location="0x40101000"/>
+<memoryInstance derived_from="RAM" id="RamAHB32" location="0x2007c000" size="0x8000"/>
+<prog_flash blocksz="0x1000" location="0" maxprgbuff="0x1000" progwithcode="TRUE" size="0x10000"/>
+<prog_flash blocksz="0x8000" location="0x10000" maxprgbuff="0x1000" progwithcode="TRUE" size="0x70000"/>
+<peripheralInstance derived_from="LPC17_NVIC" id="NVIC" location="0xE000E000"/>
+<peripheralInstance derived_from="TIMER" enable="SYSCTL.PCONP.PCTIM0&0x1" id="TIMER0" location="0x40004000"/>
+<peripheralInstance derived_from="TIMER" enable="SYSCTL.PCONP.PCTIM1&0x1" id="TIMER1" location="0x40008000"/>
+<peripheralInstance derived_from="TIMER" enable="SYSCTL.PCONP.PCTIM2&0x1" id="TIMER2" location="0x40090000"/>
+<peripheralInstance derived_from="TIMER" enable="SYSCTL.PCONP.PCTIM3&0x1" id="TIMER3" location="0x40094000"/>
+<peripheralInstance derived_from="LPC17_RIT" enable="SYSCTL.PCONP.PCRIT&0x1" id="RIT" location="0x400B0000"/>
+<peripheralInstance derived_from="FGPIO" enable="SYSCTL.PCONP.PCGPIO&0x1" id="GPIO0" location="0x2009C000"/>
+<peripheralInstance derived_from="FGPIO" enable="SYSCTL.PCONP.PCGPIO&0x1" id="GPIO1" location="0x2009C020"/>
+<peripheralInstance derived_from="FGPIO" enable="SYSCTL.PCONP.PCGPIO&0x1" id="GPIO2" location="0x2009C040"/>
+<peripheralInstance derived_from="FGPIO" enable="SYSCTL.PCONP.PCGPIO&0x1" id="GPIO3" location="0x2009C060"/>
+<peripheralInstance derived_from="FGPIO" enable="SYSCTL.PCONP.PCGPIO&0x1" id="GPIO4" location="0x2009C080"/>
+<peripheralInstance derived_from="LPC17_I2S" enable="SYSCTL.PCONP&0x08000000" id="I2S" location="0x400A8000"/>
+<peripheralInstance derived_from="LPC17_SYSCTL" id="SYSCTL" location="0x400FC000"/>
+<peripheralInstance derived_from="LPC17_DAC" enable="PCB.PINSEL1.P0_26&0x2=2" id="DAC" location="0x4008C000"/>
+<peripheralInstance derived_from="LPC17xx_UART" enable="SYSCTL.PCONP.PCUART0&0x1" id="UART0" location="0x4000C000"/>
+<peripheralInstance derived_from="LPC17xx_UART_MODEM" enable="SYSCTL.PCONP.PCUART1&0x1" id="UART1" location="0x40010000"/>
+<peripheralInstance derived_from="LPC17xx_UART" enable="SYSCTL.PCONP.PCUART2&0x1" id="UART2" location="0x40098000"/>
+<peripheralInstance derived_from="LPC17xx_UART" enable="SYSCTL.PCONP.PCUART3&0x1" id="UART3" location="0x4009C000"/>
+<peripheralInstance derived_from="SPI" enable="SYSCTL.PCONP.PCSPI&0x1" id="SPI" location="0x40020000"/>
+<peripheralInstance derived_from="LPC17_SSP" enable="SYSCTL.PCONP.PCSSP0&0x1" id="SSP0" location="0x40088000"/>
+<peripheralInstance derived_from="LPC17_SSP" enable="SYSCTL.PCONP.PCSSP1&0x1" id="SSP1" location="0x40030000"/>
+<peripheralInstance derived_from="LPC17_ADC" enable="SYSCTL.PCONP.PCAD&0x1" id="ADC" location="0x40034000"/>
+<peripheralInstance derived_from="LPC17_USBINTST" enable="USBCLKCTL.USBClkCtrl&0x12" id="USBINTSTAT" location="0x400fc1c0"/>
+<peripheralInstance derived_from="LPC17_USB_CLK_CTL" id="USBCLKCTL" location="0x5000cff4"/>
+<peripheralInstance derived_from="LPC17_USBDEV" enable="USBCLKCTL.USBClkSt&0x12=0x12" id="USBDEV" location="0x5000C200"/>
+<peripheralInstance derived_from="LPC17_PWM" enable="SYSCTL.PCONP.PWM1&0x1" id="PWM" location="0x40018000"/>
+<peripheralInstance derived_from="LPC17_I2C" enable="SYSCTL.PCONP.PCI2C0&0x1" id="I2C0" location="0x4001C000"/>
+<peripheralInstance derived_from="LPC17_I2C" enable="SYSCTL.PCONP.PCI2C1&0x1" id="I2C1" location="0x4005C000"/>
+<peripheralInstance derived_from="LPC17_I2C" enable="SYSCTL.PCONP.PCI2C2&0x1" id="I2C2" location="0x400A0000"/>
+<peripheralInstance derived_from="LPC17_DMA" enable="SYSCTL.PCONP.PCGPDMA&0x1" id="DMA" location="0x50004000"/>
+<peripheralInstance derived_from="LPC17_ENET" enable="SYSCTL.PCONP.PCENET&0x1" id="ENET" location="0x50000000"/>
+<peripheralInstance derived_from="CM3_DCR" id="DCR" location="0xE000EDF0"/>
+<peripheralInstance derived_from="LPC17_PCB" id="PCB" location="0x4002c000"/>
+<peripheralInstance derived_from="LPC17_QEI" enable="SYSCTL.PCONP.PCQEI&0x1" id="QEI" location="0x400bc000"/>
+<peripheralInstance derived_from="LPC17_USBHOST" enable="USBCLKCTL.USBClkSt&0x11=0x11" id="USBHOST" location="0x5000C000"/>
+<peripheralInstance derived_from="LPC17_USBOTG" enable="USBCLKCTL.USBClkSt&0x1c=0x1c" id="USBOTG" location="0x5000C000"/>
+<peripheralInstance derived_from="LPC17_RTC" enable="SYSCTL.PCONP.PCRTC&0x1" id="RTC" location="0x40024000"/>
+<peripheralInstance derived_from="MPU" id="MPU" location="0xE000ED90"/>
+<peripheralInstance derived_from="LPC1x_WDT" id="WDT" location="0x40000000"/>
+<peripheralInstance derived_from="LPC17_FLASHCFG" id="FLASHACCEL" location="0x400FC000"/>
+<peripheralInstance derived_from="GPIO_INT" id="GPIOINTMAP" location="0x40028080"/>
+<peripheralInstance derived_from="LPC17_CANAFR" enable="SYSCTL.PCONP.PCCAN1&0x1|SYSCTL.PCONP.PCCAN2&0x1" id="CANAFR" location="0x4003C000"/>
+<peripheralInstance derived_from="LPC17_CANCEN" enable="SYSCTL.PCONP.PCCAN1&0x1|SYSCTL.PCONP.PCCAN2&0x1" id="CANCEN" location="0x40040000"/>
+<peripheralInstance derived_from="LPC17_CANWAKESLEEP" id="CANWAKESLEEP" location="0x400FC110"/>
+<peripheralInstance derived_from="LPC17_CANCON" enable="SYSCTL.PCONP.PCCAN1&0x1" id="CANCON1" location="0x40044000"/>
+<peripheralInstance derived_from="LPC17_CANCON" enable="SYSCTL.PCONP.PCCAN2&0x1" id="CANCON2" location="0x40048000"/>
+<peripheralInstance derived_from="LPC17_MCPWM" enable="SYSCTL.PCONP.PCMCPWM&0x1" id="MCPWM" location="0x400B8000"/>
+<peripheralInstance derived_from="LPC17_FMC" id="FMC" location="0x40084000"/>
</chip>
-<processor><name gcc_name="cortex-m4">Cortex-M4</name>
+<processor><name gcc_name="cortex-m3">Cortex-M3</name>
<family>Cortex-M</family>
</processor>
-<link href="nxp_lpc43xx_peripheral.xme" show="embed" type="simple"/>
+<link href="nxp_lpcxxxx_peripheral.xme" show="embed" type="simple"/>
</info>
</infoList>
</TargetConfig>
diff --git a/demos/host/src/tusb_config.h b/demos/host/src/tusb_config.h
index 47004325..ddd56189 100644
--- a/demos/host/src/tusb_config.h
+++ b/demos/host/src/tusb_config.h
@@ -64,11 +64,11 @@
#define TUSB_CFG_HOST_ENUM_BUFFER_SIZE 255
//------------- CLASS -------------//
-#define TUSB_CFG_HOST_HUB 1
+#define TUSB_CFG_HOST_HUB 0
#define TUSB_CFG_HOST_HID_KEYBOARD 0
#define TUSB_CFG_HOST_HID_MOUSE 1
#define TUSB_CFG_HOST_HID_GENERIC 0
-#define TUSB_CFG_HOST_MSC 0
+#define TUSB_CFG_HOST_MSC 1
#define TUSB_CFG_HOST_CDC 0
#define TUSB_CFG_HOST_CDC_RNDIS 0
diff --git a/tinyusb/host/ehci/ehci.c b/tinyusb/host/ehci/ehci.c
index 83032527..d98773e7 100644
--- a/tinyusb/host/ehci/ehci.c
+++ b/tinyusb/host/ehci/ehci.c
@@ -153,12 +153,6 @@ void hcd_port_reset(uint8_t hostid)
regs->portsc_bit.port_enable = 0; // disable port before reset
regs->portsc_bit.port_reset = 1;
-
-#ifndef _TEST_
- // NXP specific, port reset will automatically be 0 when reset sequence complete
- // there is chance device is unplugged while reset sequence is not complete
- while( regs->portsc_bit.port_reset) {} // TODO use task delay to remove blocking
-#endif
}
bool hcd_port_connect_status(uint8_t hostid)
@@ -564,7 +558,7 @@ static void port_connect_status_change_isr(uint8_t hostid)
// NOTE There is an sequence plug->unplug->…..-> plug if device is powering with pre-plugged device
if (regs->portsc_bit.current_connect_status)
{
-// hcd_port_reset(hostid);
+ hcd_port_reset(hostid);
usbh_hcd_rhport_plugged_isr(hostid);
}else // device unplugged
{
diff --git a/tinyusb/host/usbh.c b/tinyusb/host/usbh.c
index 229c9da6..bfbaa3a6 100644
--- a/tinyusb/host/usbh.c
+++ b/tinyusb/host/usbh.c
@@ -352,6 +352,11 @@ OSAL_TASK_FUNCTION(usbh_enumeration_task) (void* p_task_para)
tusb_error_t enumeration_body_subtask(void)
{
+ enum {
+ POWER_STABLE_DELAY = 300,
+ RESET_DELAY = 100 // NXP's EHCI require more than 50ms to work properly although the USB specs say only 50ms
+ };
+
tusb_error_t error;
usbh_enumerate_t enum_entry;
@@ -375,12 +380,12 @@ tusb_error_t enumeration_body_subtask(void)
{
if( hcd_port_connect_status(usbh_devices[0].core_id) )
{ // connection event
- osal_task_delay(200); // wait until device is stable. Increase this if the first 8 bytes is failed to get
+ osal_task_delay(POWER_STABLE_DELAY); // wait until device is stable. Increase this if the first 8 bytes is failed to get
if ( !hcd_port_connect_status(usbh_devices[0].core_id) ) SUBTASK_EXIT(TUSB_ERROR_NONE); // exit if device unplugged while delaying
hcd_port_reset( usbh_devices[0].core_id ); // port must be reset to have correct speed operation
- osal_task_delay(50); // USB Specs: reset is recommended to last 50 ms
+ osal_task_delay(RESET_DELAY);
usbh_devices[0].speed = hcd_port_speed_get( usbh_devices[0].core_id );
}
@@ -446,7 +451,7 @@ tusb_error_t enumeration_body_subtask(void)
{ // connected directly to roothub
SUBTASK_ASSERT_STATUS(error); // TODO some slow device is observed to fail the very fist controller xfer, can try more times
hcd_port_reset( usbh_devices[0].core_id ); // reset port after 8 byte descriptor
- osal_task_delay(50); // TODO reset is recommended to last 50 ms (NXP EHCI passes this)
+ osal_task_delay(RESET_DELAY);
}
#if TUSB_CFG_HOST_HUB
else