diff --git a/hw/mcu/nxp/lpc43xx/tusb_port/dcd_lpc43xx.c b/hw/mcu/nxp/lpc43xx/tusb_port/dcd_lpc43xx.c
index 43e33a4e..f0952927 100644
--- a/hw/mcu/nxp/lpc43xx/tusb_port/dcd_lpc43xx.c
+++ b/hw/mcu/nxp/lpc43xx/tusb_port/dcd_lpc43xx.c
@@ -85,17 +85,17 @@ static dcd_data_t* const dcd_data_ptr[2] = { &dcd_data0, &dcd_data1 };
 //--------------------------------------------------------------------+
 // CONTROLLER API
 //--------------------------------------------------------------------+
-void hal_dcd_connect(uint8_t port)
+void tusb_dcd_connect(uint8_t port)
 {
   LPC_USB[port]->USBCMD_D |= BIT_(0);
 }
 
-void hal_dcd_set_address(uint8_t port, uint8_t dev_addr)
+void tusb_dcd_set_address(uint8_t port, uint8_t dev_addr)
 {
   LPC_USB[port]->DEVICEADDR = (dev_addr << 25) | BIT_(24);
 }
 
-void hal_dcd_set_config(uint8_t port, uint8_t config_num)
+void tusb_dcd_set_config(uint8_t port, uint8_t config_num)
 {
 
 }
@@ -146,7 +146,7 @@ static void bus_reset(uint8_t port)
 
 }
 
-bool hal_dcd_init(uint8_t port)
+bool tusb_dcd_init(uint8_t port)
 {
   LPC_USB0_Type* const lpc_usb = LPC_USB[port];
   dcd_data_t* p_dcd = dcd_data_ptr[port];
@@ -222,14 +222,14 @@ static inline uint8_t qtd_find_free(uint8_t port)
 //--------------------------------------------------------------------+
 // CONTROL PIPE API
 //--------------------------------------------------------------------+
-void hal_dcd_control_stall(uint8_t port)
+void tusb_dcd_control_stall(uint8_t port)
 {
   LPC_USB[port]->ENDPTCTRL0 |= (ENDPTCTRL_MASK_STALL << 16); // stall Control IN TODO stall control OUT as well
 }
 
 // control transfer does not need to use qtd find function
 // follows UM 24.10.8.1.1 Setup packet handling using setup lockout mechanism
-bool hal_dcd_control_xfer(uint8_t port, tusb_direction_t dir, uint8_t * p_buffer, uint16_t length, bool int_on_complete)
+bool tusb_dcd_control_xfer(uint8_t port, tusb_direction_t dir, uint8_t * p_buffer, uint16_t length, bool int_on_complete)
 {
   LPC_USB0_Type* const lpc_usb = LPC_USB[port];
   dcd_data_t* const p_dcd      = dcd_data_ptr[port];
@@ -273,14 +273,14 @@ static inline volatile uint32_t * get_reg_control_addr(uint8_t port, uint8_t phy
  return &(LPC_USB[port]->ENDPTCTRL0) + edpt_phy2log(physical_endpoint);
 }
 
-void hal_dcd_pipe_stall(edpt_hdl_t edpt_hdl)
+void tusb_dcd_pipe_stall(edpt_hdl_t edpt_hdl)
 {
   volatile uint32_t * reg_control = get_reg_control_addr(edpt_hdl.port, edpt_hdl.index);
 
   (*reg_control) |= ENDPTCTRL_MASK_STALL << (edpt_hdl.index & 0x01 ? 16 : 0);
 }
 
-void hal_dcd_pipe_clear_stall(uint8_t port, uint8_t edpt_addr)
+void tusb_dcd_pipe_clear_stall(uint8_t port, uint8_t edpt_addr)
 {
   volatile uint32_t * reg_control = get_reg_control_addr(port, edpt_addr2phy(edpt_addr));
 
@@ -289,7 +289,7 @@ void hal_dcd_pipe_clear_stall(uint8_t port, uint8_t edpt_addr)
   (*reg_control) &= ~(ENDPTCTRL_MASK_STALL << ((edpt_addr & TUSB_DIR_DEV_TO_HOST_MASK) ? 16 : 0));
 }
 
-bool hal_dcd_pipe_open(uint8_t port, tusb_descriptor_endpoint_t const * p_endpoint_desc, edpt_hdl_t* eh)
+bool tusb_dcd_pipe_open(uint8_t port, tusb_descriptor_endpoint_t const * p_endpoint_desc, edpt_hdl_t* eh)
 {
   // TODO USB1 only has 4 non-control enpoint (USB0 has 5)
   // TODO not support ISO yet
@@ -358,12 +358,12 @@ static tusb_error_t pipe_add_xfer(edpt_hdl_t edpt_hdl, void * buffer, uint16_t t
   return TUSB_ERROR_NONE;
 }
 
-tusb_error_t dcd_pipe_queue_xfer(edpt_hdl_t edpt_hdl, uint8_t * buffer, uint16_t total_bytes)
+tusb_error_t tusb_dcd_pipe_queue_xfer(edpt_hdl_t edpt_hdl, uint8_t * buffer, uint16_t total_bytes)
 {
   return pipe_add_xfer( edpt_hdl, buffer, total_bytes, false);
 }
 
-tusb_error_t  hal_dcd_pipe_xfer(edpt_hdl_t edpt_hdl, uint8_t * buffer, uint16_t total_bytes, bool int_on_complete)
+tusb_error_t  tusb_dcd_pipe_xfer(edpt_hdl_t edpt_hdl, uint8_t * buffer, uint16_t total_bytes, bool int_on_complete)
 {
   ASSERT_STATUS ( pipe_add_xfer(edpt_hdl, buffer, total_bytes, int_on_complete) );
 
@@ -427,7 +427,7 @@ void hal_dcd_isr(uint8_t port)
   if (int_status & INT_MASK_RESET)
   {
     bus_reset(port);
-    hal_dcd_bus_event(port, USBD_BUS_EVENT_RESET);
+    tusb_dcd_bus_event(port, USBD_BUS_EVENT_RESET);
   }
 
   if (int_status & INT_MASK_SUSPEND)
@@ -436,7 +436,7 @@ void hal_dcd_isr(uint8_t port)
     { // Note: Host may delay more than 3 ms before and/or after bus reset before doing enumeration.
       if ((lpc_usb->DEVICEADDR >> 25) & 0x0f)
       {
-        hal_dcd_bus_event(0, USBD_BUS_EVENT_SUSPENDED);
+        tusb_dcd_bus_event(0, USBD_BUS_EVENT_SUSPENDED);
       }
     }
   }
@@ -446,7 +446,7 @@ void hal_dcd_isr(uint8_t port)
 //	{
 //	  if ( !(lpc_usb->PORTSC1_D & PORTSC_CURRENT_CONNECT_STATUS_MASK) )
 //	  {
-//	    hal_dcd_bus_event(0, USBD_BUS_EVENT_UNPLUGGED);
+//	    tusb_dcd_bus_event(0, USBD_BUS_EVENT_UNPLUGGED);
 //	  }
 //	}
 
@@ -462,7 +462,7 @@ void hal_dcd_isr(uint8_t port)
     { // 23.10.10.2 Operational model for setup transfers
       lpc_usb->ENDPTSETUPSTAT = lpc_usb->ENDPTSETUPSTAT;// acknowledge
 
-      hal_dcd_setup_received(port, (uint8_t*) &p_dcd->qhd[0].setup_request);
+      tusb_dcd_setup_received(port, (uint8_t*) &p_dcd->qhd[0].setup_request);
     }
     //------------- Control Request Completed -------------//
     else if ( edpt_complete & 0x03 )
@@ -498,7 +498,7 @@ void hal_dcd_isr(uint8_t port)
 
   if (int_status & INT_MASK_SOF)
   {
-    hal_dcd_bus_event(port, USBD_BUS_EVENT_SOF);
+    tusb_dcd_bus_event(port, USBD_BUS_EVENT_SOF);
   }
 
   if (int_status & INT_MASK_NAK) {}
diff --git a/tinyusb/class/cdc/cdc_device.c b/tinyusb/class/cdc/cdc_device.c
index c121a97f..75b7da20 100644
--- a/tinyusb/class/cdc/cdc_device.c
+++ b/tinyusb/class/cdc/cdc_device.c
@@ -157,7 +157,7 @@ tusb_error_t cdcd_open(uint8_t port, tusb_descriptor_interface_t const * p_inter
 
   if ( TUSB_DESC_TYPE_ENDPOINT == p_desc[DESCRIPTOR_OFFSET_TYPE])
   { // notification endpoint if any
-    VERIFY( hal_dcd_pipe_open(port, (tusb_descriptor_endpoint_t const *) p_desc, &p_cdc->edpt_hdl[CDC_PIPE_NOTIFICATION]), TUSB_ERROR_DCD_OPEN_PIPE_FAILED);
+    VERIFY( tusb_dcd_pipe_open(port, (tusb_descriptor_endpoint_t const *) p_desc, &p_cdc->edpt_hdl[CDC_PIPE_NOTIFICATION]), TUSB_ERROR_DCD_OPEN_PIPE_FAILED);
 
     (*p_length) += p_desc[DESCRIPTOR_OFFSET_LENGTH];
     p_desc = descriptor_next(p_desc);
@@ -180,7 +180,7 @@ tusb_error_t cdcd_open(uint8_t port, tusb_descriptor_interface_t const * p_inter
       edpt_hdl_t * p_edpt_hdl =  ( p_endpoint->bEndpointAddress &  TUSB_DIR_DEV_TO_HOST_MASK ) ?
           &p_cdc->edpt_hdl[CDC_PIPE_DATA_IN] : &p_cdc->edpt_hdl[CDC_PIPE_DATA_OUT] ;
 
-      ASSERT_( hal_dcd_pipe_open(port, p_endpoint, p_edpt_hdl), TUSB_ERROR_DCD_OPEN_PIPE_FAILED);
+      ASSERT_( tusb_dcd_pipe_open(port, p_endpoint, p_edpt_hdl), TUSB_ERROR_DCD_OPEN_PIPE_FAILED);
 
       (*p_length) += p_desc[DESCRIPTOR_OFFSET_LENGTH];
       p_desc = descriptor_next( p_desc );
@@ -190,7 +190,7 @@ tusb_error_t cdcd_open(uint8_t port, tusb_descriptor_interface_t const * p_inter
   p_cdc->interface_number   = p_interface_desc->bInterfaceNumber;
 
   // Prepare for incoming data
-  hal_dcd_pipe_xfer(p_cdc->edpt_hdl[CDC_PIPE_DATA_OUT], _tmp_rx_buf, sizeof(_tmp_rx_buf), true);
+  tusb_dcd_pipe_xfer(p_cdc->edpt_hdl[CDC_PIPE_DATA_OUT], _tmp_rx_buf, sizeof(_tmp_rx_buf), true);
 
 
   return TUSB_ERROR_NONE;
@@ -213,12 +213,12 @@ tusb_error_t cdcd_control_request_subtask(uint8_t port, tusb_control_request_t c
   switch(p_request->bRequest)
   {
     case CDC_REQUEST_GET_LINE_CODING:
-      hal_dcd_control_xfer(port, (tusb_direction_t) p_request->bmRequestType_bit.direction,
+      tusb_dcd_control_xfer(port, (tusb_direction_t) p_request->bmRequestType_bit.direction,
                             (uint8_t*) &cdcd_line_coding[port], min16_of(sizeof(cdc_line_coding_t), p_request->wLength), false );
     break;
 
     case CDC_REQUEST_SET_LINE_CODING:
-      hal_dcd_control_xfer(port, (tusb_direction_t) p_request->bmRequestType_bit.direction,
+      tusb_dcd_control_xfer(port, (tusb_direction_t) p_request->bmRequestType_bit.direction,
                             (uint8_t*) &cdcd_line_coding[port], min16_of(sizeof(cdc_line_coding_t), p_request->wLength), false );
       // TODO notify application on xfer completea
     break;
@@ -264,7 +264,7 @@ tusb_error_t cdcd_xfer_cb(edpt_hdl_t edpt_hdl, tusb_event_t event, uint32_t xfer
     fifo_write_n(&_rx_ff, _tmp_rx_buf, xferred_bytes);
 
     // preparing for next
-    hal_dcd_pipe_xfer(p_cdc->edpt_hdl[CDC_PIPE_DATA_OUT], _tmp_rx_buf, sizeof(_tmp_rx_buf), true);
+    tusb_dcd_pipe_xfer(p_cdc->edpt_hdl[CDC_PIPE_DATA_OUT], _tmp_rx_buf, sizeof(_tmp_rx_buf), true);
 
     // fire callback
     tud_cdc_rx_cb(edpt_hdl.port);
@@ -283,7 +283,7 @@ void cdcd_sof(uint8_t port)
   {
     uint16_t count = fifo_read_n(&_tx_ff, _tmp_tx_buf, sizeof(_tmp_tx_buf));
 
-    hal_dcd_pipe_xfer(ep, _tmp_tx_buf, count, false);
+    tusb_dcd_pipe_xfer(ep, _tmp_tx_buf, count, false);
   }
 }
 
diff --git a/tinyusb/class/hid/hid_device.c b/tinyusb/class/hid/hid_device.c
index 91ca53e7..e7ba3c2f 100644
--- a/tinyusb/class/hid/hid_device.c
+++ b/tinyusb/class/hid/hid_device.c
@@ -118,7 +118,7 @@ tusb_error_t tud_hid_keyboard_send(uint8_t port, hid_keyboard_report_t const *p_
 
   hidd_interface_t * p_kbd = &keyboardd_data; // TODO &keyboardd_data[port];
 
-  ASSERT_STATUS( hal_dcd_pipe_xfer(p_kbd->ept_handle, (void*) p_report, sizeof(hid_keyboard_report_t), true) ) ;
+  ASSERT_STATUS( tusb_dcd_pipe_xfer(p_kbd->ept_handle, (void*) p_report, sizeof(hid_keyboard_report_t), true) ) ;
 
   return TUSB_ERROR_NONE;
 }
@@ -141,7 +141,7 @@ tusb_error_t tusbd_hid_mouse_send(uint8_t port, hid_mouse_report_t const *p_repo
 
   hidd_interface_t * p_mouse = &moused_data; // TODO &keyboardd_data[port];
 
-  ASSERT_STATUS( hal_dcd_pipe_xfer(p_mouse->ept_handle, (void*) p_report, sizeof(hid_mouse_report_t), true) ) ;
+  ASSERT_STATUS( tusb_dcd_pipe_xfer(p_mouse->ept_handle, (void*) p_report, sizeof(hid_mouse_report_t), true) ) ;
 
   return TUSB_ERROR_NONE;
 }
@@ -202,7 +202,7 @@ tusb_error_t hidd_control_request_subtask(uint8_t port, tusb_control_request_t c
     ASSERT ( p_hid->report_length <= HIDD_BUFFER_SIZE, TUSB_ERROR_NOT_ENOUGH_MEMORY);
 
     memcpy(m_hid_buffer, p_hid->p_report_desc, p_hid->report_length); // to allow report descriptor not to be in USBRAM
-    hal_dcd_control_xfer(port, TUSB_DIR_DEV_TO_HOST, m_hid_buffer, p_hid->report_length, false);
+    tusb_dcd_control_xfer(port, TUSB_DIR_DEV_TO_HOST, m_hid_buffer, p_hid->report_length, false);
   }
   //------------- Class Specific Request -------------//
   else if (p_request->bmRequestType_bit.type == TUSB_REQUEST_TYPE_CLASS)
@@ -218,7 +218,7 @@ tusb_error_t hidd_control_request_subtask(uint8_t port, tusb_control_request_t c
                                                        &p_buffer, p_request->wLength);
       SUBTASK_ASSERT( p_buffer != NULL && actual_length > 0 );
 
-      hal_dcd_control_xfer(port, (tusb_direction_t) p_request->bmRequestType_bit.direction, p_buffer, actual_length, false);
+      tusb_dcd_control_xfer(port, (tusb_direction_t) p_request->bmRequestType_bit.direction, p_buffer, actual_length, false);
     }
     else if ( (HID_REQUEST_CONTROL_SET_REPORT == p_request->bRequest) && (p_driver->set_report_cb != NULL) )
     {
@@ -226,7 +226,7 @@ tusb_error_t hidd_control_request_subtask(uint8_t port, tusb_control_request_t c
       // wValue = Report Type | Report ID
       tusb_error_t error;
 
-      hal_dcd_control_xfer(port, (tusb_direction_t) p_request->bmRequestType_bit.direction, m_hid_buffer, p_request->wLength, true);
+      tusb_dcd_control_xfer(port, (tusb_direction_t) p_request->bmRequestType_bit.direction, m_hid_buffer, p_request->wLength, true);
 
       osal_semaphore_wait(usbd_control_xfer_sem_hdl, OSAL_TIMEOUT_NORMAL, &error); // wait for control xfer complete
       SUBTASK_ASSERT_STATUS(error);
@@ -280,7 +280,7 @@ tusb_error_t hidd_open(uint8_t port, tusb_descriptor_interface_t const * p_inter
 
         VERIFY(p_hid, TUSB_ERROR_FAILED);
 
-        VERIFY( hal_dcd_pipe_open(port, p_desc_endpoint, &p_hid->ept_handle), TUSB_ERROR_DCD_FAILED );
+        VERIFY( tusb_dcd_pipe_open(port, p_desc_endpoint, &p_hid->ept_handle), TUSB_ERROR_DCD_FAILED );
 
         p_hid->interface_number = p_interface_desc->bInterfaceNumber;
         p_hid->p_report_desc    = (p_interface_desc->bInterfaceProtocol == HID_PROTOCOL_KEYBOARD) ? tusbd_descriptor_pointers.p_hid_keyboard_report : tusbd_descriptor_pointers.p_hid_mouse_report;
diff --git a/tinyusb/class/msc/msc_device.c b/tinyusb/class/msc/msc_device.c
index 16dd2e41..09a76e23 100644
--- a/tinyusb/class/msc/msc_device.c
+++ b/tinyusb/class/msc/msc_device.c
@@ -101,7 +101,7 @@ tusb_error_t mscd_open(uint8_t port, tusb_descriptor_interface_t const * p_inter
     edpt_hdl_t * p_edpt_hdl =  ( p_endpoint->bEndpointAddress &  TUSB_DIR_DEV_TO_HOST_MASK ) ?
         &p_msc->edpt_in : &p_msc->edpt_out;
 
-    VERIFY( hal_dcd_pipe_open(port, p_endpoint, p_edpt_hdl), TUSB_ERROR_DCD_FAILED );
+    VERIFY( tusb_dcd_pipe_open(port, p_endpoint, p_edpt_hdl), TUSB_ERROR_DCD_FAILED );
     p_endpoint = (tusb_descriptor_endpoint_t const *) descriptor_next( (uint8_t const*)  p_endpoint );
   }
 
@@ -110,7 +110,7 @@ tusb_error_t mscd_open(uint8_t port, tusb_descriptor_interface_t const * p_inter
   (*p_length) += sizeof(tusb_descriptor_interface_t) + 2*sizeof(tusb_descriptor_endpoint_t);
 
   //------------- Queue Endpoint OUT for Command Block Wrapper -------------//
-  ASSERT_STATUS( hal_dcd_pipe_xfer(p_msc->edpt_out, (uint8_t*) &p_msc->cbw, sizeof(msc_cmd_block_wrapper_t), true) );
+  ASSERT_STATUS( tusb_dcd_pipe_xfer(p_msc->edpt_out, (uint8_t*) &p_msc->cbw, sizeof(msc_cmd_block_wrapper_t), true) );
 
   return TUSB_ERROR_NONE;
 }
@@ -124,12 +124,12 @@ tusb_error_t mscd_control_request_subtask(uint8_t port, tusb_control_request_t c
   switch(p_request->bRequest)
   {
     case MSC_REQUEST_RESET:
-      hal_dcd_control_xfer(port, TUSB_DIR_HOST_TO_DEV, NULL, 0, false);
+      tusb_dcd_control_xfer(port, TUSB_DIR_HOST_TO_DEV, NULL, 0, false);
     break;
 
     case MSC_REQUEST_GET_MAX_LUN:
       p_msc->scsi_data[0] = p_msc->max_lun; // Note: lpc11/13u need xfer data's address to be aligned 64 -> make use of scsi_data instead of using max_lun directly
-      hal_dcd_control_xfer(port, TUSB_DIR_DEV_TO_HOST, p_msc->scsi_data, 1, false);
+      tusb_dcd_control_xfer(port, TUSB_DIR_DEV_TO_HOST, p_msc->scsi_data, 1, false);
     break;
 
     default:
@@ -186,12 +186,12 @@ tusb_error_t mscd_xfer_cb(edpt_hdl_t edpt_hdl, tusb_event_t event, uint32_t xfer
 
         if ( p_buffer == NULL || actual_length == 0 )
         { // application does not provide data to response --> possibly unsupported SCSI command
-          hal_dcd_pipe_stall(edpt_data);
+          tusb_dcd_pipe_stall(edpt_data);
           p_csw->status = MSC_CSW_STATUS_FAILED;
         }else
         {
           memcpy(p_msc->scsi_data, p_buffer, actual_length);
-          ASSERT_STATUS( dcd_pipe_queue_xfer( edpt_data, p_msc->scsi_data, actual_length ) );
+          ASSERT_STATUS( tusb_dcd_pipe_queue_xfer( edpt_data, p_msc->scsi_data, actual_length ) );
         }
       }
     }
@@ -207,10 +207,10 @@ tusb_error_t mscd_xfer_cb(edpt_hdl_t edpt_hdl, tusb_event_t event, uint32_t xfer
   // Either bulk in & out can be stalled in the data phase, dcd must make sure these queued transfer will be resumed after host clear stall
   if (!is_waiting_read10_write10)
   {
-    ASSERT_STATUS( hal_dcd_pipe_xfer( p_msc->edpt_in , (uint8_t*) p_csw, sizeof(msc_cmd_status_wrapper_t), false) );
+    ASSERT_STATUS( tusb_dcd_pipe_xfer( p_msc->edpt_in , (uint8_t*) p_csw, sizeof(msc_cmd_status_wrapper_t), false) );
 
     //------------- Queue the next CBW -------------//
-    ASSERT_STATUS( hal_dcd_pipe_xfer( p_msc->edpt_out, (uint8_t*) p_cbw, sizeof(msc_cmd_block_wrapper_t), true) );
+    ASSERT_STATUS( tusb_dcd_pipe_xfer( p_msc->edpt_out, (uint8_t*) p_cbw, sizeof(msc_cmd_block_wrapper_t), true) );
   }
 
   return TUSB_ERROR_NONE;
@@ -241,12 +241,12 @@ static bool read10_write10_data_xfer(mscd_interface_t* p_msc)
     p_csw->data_residue = p_cbw->xfer_bytes;
     p_csw->status       = MSC_CSW_STATUS_FAILED;
 
-    hal_dcd_pipe_stall(edpt_hdl);
+    tusb_dcd_pipe_stall(edpt_hdl);
 
     return true;
   } else if (xferred_block < block_count)
   {
-    ASSERT_STATUS( hal_dcd_pipe_xfer( edpt_hdl, p_buffer, xferred_byte, true) );
+    ASSERT_STATUS( tusb_dcd_pipe_xfer( edpt_hdl, p_buffer, xferred_byte, true) );
 
     // adjust lba, block_count, xfer_bytes for the next call
     p_readwrite->lba         = __n2be(lba+xferred_block);
@@ -257,7 +257,7 @@ static bool read10_write10_data_xfer(mscd_interface_t* p_msc)
   }else
   {
     p_csw->status = MSC_CSW_STATUS_PASSED;
-    ASSERT_STATUS( dcd_pipe_queue_xfer( edpt_hdl, p_buffer, xferred_byte) );
+    ASSERT_STATUS( tusb_dcd_pipe_queue_xfer( edpt_hdl, p_buffer, xferred_byte) );
     return true;
   }
 }
diff --git a/tinyusb/device/dcd_lpc175x_6x.c b/tinyusb/device/dcd_lpc175x_6x.c
index f6bdcaf4..4328fbf1 100644
--- a/tinyusb/device/dcd_lpc175x_6x.c
+++ b/tinyusb/device/dcd_lpc175x_6x.c
@@ -122,7 +122,7 @@ static void bus_reset(void)
 	memclr_(&dcd_data, sizeof(dcd_data_t));
 }
 
-bool hal_dcd_init(uint8_t port)
+bool tusb_dcd_init(uint8_t port)
 {
   (void) port;
 
@@ -188,7 +188,7 @@ static void endpoint_control_isr(void)
 
     tusb_control_request_t control_request;
     pipe_control_read(&control_request, 8); // TODO read before clear setup above
-    hal_dcd_setup_received(0, (uint8_t*) &control_request);
+    tusb_dcd_setup_received(0, (uint8_t*) &control_request);
   }
   else if (endpoint_int_status & 0x03)
   {
@@ -230,23 +230,23 @@ void hal_dcd_isr(uint8_t port)
     if (dev_status_reg & SIE_DEV_STATUS_RESET_MASK)
     {
       bus_reset();
-      hal_dcd_bus_event(0, USBD_BUS_EVENT_RESET);
+      tusb_dcd_bus_event(0, USBD_BUS_EVENT_RESET);
     }
 
     if (dev_status_reg & SIE_DEV_STATUS_CONNECT_CHANGE_MASK)
     { // device is disconnected, require using VBUS (P1_30)
-      hal_dcd_bus_event(0, USBD_BUS_EVENT_UNPLUGGED);
+      tusb_dcd_bus_event(0, USBD_BUS_EVENT_UNPLUGGED);
     }
 
     if (dev_status_reg & SIE_DEV_STATUS_SUSPEND_CHANGE_MASK)
     {
       if (dev_status_reg & SIE_DEV_STATUS_SUSPEND_MASK)
       {
-        hal_dcd_bus_event(0, USBD_BUS_EVENT_SUSPENDED);
+        tusb_dcd_bus_event(0, USBD_BUS_EVENT_SUSPENDED);
       }
 //      else
 //      {
-//        hal_dcd_bus_event(0, USBD_BUS_EVENT_RESUME);
+//        tusb_dcd_bus_event(0, USBD_BUS_EVENT_RESUME);
 //      }
     }
   }
@@ -280,19 +280,19 @@ void hal_dcd_isr(uint8_t port)
 //--------------------------------------------------------------------+
 // USBD API - CONTROLLER
 //--------------------------------------------------------------------+
-void hal_dcd_connect(uint8_t port)
+void tusb_dcd_connect(uint8_t port)
 {
   (void) port;
   sie_write(SIE_CMDCODE_DEVICE_STATUS, 1, 1);
 }
 
-void hal_dcd_set_address(uint8_t port, uint8_t dev_addr)
+void tusb_dcd_set_address(uint8_t port, uint8_t dev_addr)
 {
   (void) port;
   sie_write(SIE_CMDCODE_SET_ADDRESS, 1, 0x80 | dev_addr); // 7th bit is : device_enable
 }
 
-void hal_dcd_set_config(uint8_t port, uint8_t config_num)
+void tusb_dcd_set_config(uint8_t port, uint8_t config_num)
 {
   (void) port;
   (void) config_num;
@@ -373,12 +373,12 @@ static tusb_error_t pipe_control_read(void * buffer, uint16_t length)
 //--------------------------------------------------------------------+
 // CONTROL PIPE API
 //--------------------------------------------------------------------+
-void hal_dcd_control_stall(uint8_t port)
+void tusb_dcd_control_stall(uint8_t port)
 {
   sie_write(SIE_CMDCODE_ENDPOINT_SET_STATUS+0, 1, SIE_SET_ENDPOINT_STALLED_MASK | SIE_SET_ENDPOINT_CONDITION_STALLED_MASK);
 }
 
-bool hal_dcd_control_xfer(uint8_t port, tusb_direction_t dir, uint8_t * p_buffer, uint16_t length, bool int_on_complete)
+bool tusb_dcd_control_xfer(uint8_t port, tusb_direction_t dir, uint8_t * p_buffer, uint16_t length, bool int_on_complete)
 {
   (void) port;
 
@@ -412,7 +412,7 @@ bool hal_dcd_control_xfer(uint8_t port, tusb_direction_t dir, uint8_t * p_buffer
 //--------------------------------------------------------------------+
 // BULK/INTERRUPT/ISO PIPE API
 //--------------------------------------------------------------------+
-edpt_hdl_t hal_dcd_pipe_open(uint8_t port, tusb_descriptor_endpoint_t const * p_endpoint_desc, uint8_t class_code)
+edpt_hdl_t tusb_dcd_pipe_open(uint8_t port, tusb_descriptor_endpoint_t const * p_endpoint_desc, uint8_t class_code)
 {
   (void) port;
 
@@ -453,12 +453,12 @@ bool dcd_pipe_is_busy(edpt_hdl_t edpt_hdl)
   return (dcd_data.udca[edpt_hdl.index] != NULL && !dcd_data.udca[edpt_hdl.index]->is_retired);
 }
 
-void hal_dcd_pipe_stall(edpt_hdl_t edpt_hdl)
+void tusb_dcd_pipe_stall(edpt_hdl_t edpt_hdl)
 {
   sie_write(SIE_CMDCODE_ENDPOINT_SET_STATUS+edpt_hdl.index, 1, SIE_SET_ENDPOINT_STALLED_MASK);
 }
 
-void hal_dcd_pipe_clear_stall(uint8_t port, uint8_t edpt_addr)
+void tusb_dcd_pipe_clear_stall(uint8_t port, uint8_t edpt_addr)
 {
   uint8_t ep_id = edpt_addr2phy(edpt_addr);
 
@@ -476,7 +476,7 @@ void dd_xfer_init(dcd_dma_descriptor_t* p_dd, void* buffer, uint16_t total_bytes
   p_dd->present_count         = 0;
 }
 
-tusb_error_t dcd_pipe_queue_xfer(edpt_hdl_t edpt_hdl, uint8_t * buffer, uint16_t total_bytes)
+tusb_error_t tusb_dcd_pipe_queue_xfer(edpt_hdl_t edpt_hdl, uint8_t * buffer, uint16_t total_bytes)
 { // NOTE for sure the qhd has no dds
   dcd_dma_descriptor_t* const p_fixed_dd = &dcd_data.dd[edpt_hdl.index][0]; // always queue with the fixed DD
 
@@ -487,7 +487,7 @@ tusb_error_t dcd_pipe_queue_xfer(edpt_hdl_t edpt_hdl, uint8_t * buffer, uint16_t
   return TUSB_ERROR_NONE;
 }
 
-tusb_error_t hal_dcd_pipe_xfer(edpt_hdl_t edpt_hdl, uint8_t* buffer, uint16_t total_bytes, bool int_on_complete)
+tusb_error_t tusb_dcd_pipe_xfer(edpt_hdl_t edpt_hdl, uint8_t* buffer, uint16_t total_bytes, bool int_on_complete)
 {
   dcd_dma_descriptor_t* const p_first_dd = &dcd_data.dd[edpt_hdl.index][0];
 
diff --git a/tinyusb/device/dcd_lpc_11uxx_13uxx.c b/tinyusb/device/dcd_lpc_11uxx_13uxx.c
index a4f8a595..8a5691dc 100644
--- a/tinyusb/device/dcd_lpc_11uxx_13uxx.c
+++ b/tinyusb/device/dcd_lpc_11uxx_13uxx.c
@@ -108,7 +108,7 @@ typedef struct ATTR_PACKED
 STATIC_ASSERT( sizeof(dcd_11u_13u_qhd_t) == 4, "size is not correct" );
 
 // NOTE data will be transferred as soon as dcd get request by dcd_pipe(_queue)_xfer using double buffering.
-// If there is another hal_dcd_pipe_xfer request, the new request will be saved and executed when the first is done.
+// If there is another tusb_dcd_pipe_xfer request, the new request will be saved and executed when the first is done.
 // next_td stored the 2nd request information
 // current_td is used to keep track of number of remaining & xferred bytes of the current request.
 // queued_bytes_in_buff keep track of number of bytes queued to each buffer (in case of short packet)
@@ -164,18 +164,18 @@ static void queue_xfer_in_next_td(uint8_t ep_id);
 //--------------------------------------------------------------------+
 // CONTROLLER API
 //--------------------------------------------------------------------+
-void hal_dcd_connect(uint8_t port)
+void tusb_dcd_connect(uint8_t port)
 {
   (void) port;
   LPC_USB->DEVCMDSTAT |= CMDSTAT_DEVICE_CONNECT_MASK;
 }
 
-void hal_dcd_set_config(uint8_t port, uint8_t config_num)
+void tusb_dcd_set_config(uint8_t port, uint8_t config_num)
 {
 
 }
 
-void hal_dcd_set_address(uint8_t port, uint8_t dev_addr)
+void tusb_dcd_set_address(uint8_t port, uint8_t dev_addr)
 {
   (void) port;
 
@@ -183,7 +183,7 @@ void hal_dcd_set_address(uint8_t port, uint8_t dev_addr)
   LPC_USB->DEVCMDSTAT |= dev_addr;
 }
 
-bool hal_dcd_init(uint8_t port)
+bool tusb_dcd_init(uint8_t port)
 {
   (void) port;
 
@@ -315,14 +315,14 @@ void hal_dcd_isr(uint8_t port)
     if ( dev_cmd_stat & CMDSTAT_RESET_CHANGE_MASK) // bus reset
     {
       bus_reset();
-      hal_dcd_bus_event(0, USBD_BUS_EVENT_RESET);
+      tusb_dcd_bus_event(0, USBD_BUS_EVENT_RESET);
     }
 
     if (dev_cmd_stat & CMDSTAT_CONNECT_CHANGE_MASK)
     { // device disconnect
       if (dev_cmd_stat & CMDSTAT_DEVICE_ADDR_MASK)
       { // debouncing as this can be set when device is powering
-        hal_dcd_bus_event(0, USBD_BUS_EVENT_UNPLUGGED);
+        tusb_dcd_bus_event(0, USBD_BUS_EVENT_UNPLUGGED);
       }
     }
 
@@ -334,13 +334,13 @@ void hal_dcd_isr(uint8_t port)
         // Note: Host may delay more than 3 ms before and/or after bus reset before doing enumeration.
         if (dev_cmd_stat & CMDSTAT_DEVICE_ADDR_MASK)
         {
-          hal_dcd_bus_event(0, USBD_BUS_EVENT_SUSPENDED);
+          tusb_dcd_bus_event(0, USBD_BUS_EVENT_SUSPENDED);
         }
       }
     }
 //        else
 //      { // resume signal
-//        hal_dcd_bus_event(0, USBD_BUS_EVENT_RESUME);
+//        tusb_dcd_bus_event(0, USBD_BUS_EVENT_RESUME);
 //      }
 //    }
   }
@@ -349,7 +349,7 @@ void hal_dcd_isr(uint8_t port)
   if ( BIT_TEST_(int_status, 0) && (dev_cmd_stat & CMDSTAT_SETUP_RECEIVED_MASK) )
   { // received control request from host
     // copy setup request & acknowledge so that the next setup can be received by hw
-    hal_dcd_setup_received(port, (uint8_t*)&dcd_data.setup_request);
+    tusb_dcd_setup_received(port, (uint8_t*)&dcd_data.setup_request);
 
     // NXP control flowchart clear Active & Stall on both Control IN/OUT endpoints
     dcd_data.qhd[0][0].stall = dcd_data.qhd[1][0].stall = 0;
@@ -373,14 +373,14 @@ void hal_dcd_isr(uint8_t port)
 //--------------------------------------------------------------------+
 // CONTROL PIPE API
 //--------------------------------------------------------------------+
-void hal_dcd_control_stall(uint8_t port)
+void tusb_dcd_control_stall(uint8_t port)
 {
   (void) port;
   // TODO cannot able to STALL Control OUT endpoint !!!!! FIXME try some walk-around
   dcd_data.qhd[0][0].stall = dcd_data.qhd[1][0].stall = 1;
 }
 
-bool hal_dcd_control_xfer(uint8_t port, tusb_direction_t dir, uint8_t * p_buffer, uint16_t length, bool int_on_complete)
+bool tusb_dcd_control_xfer(uint8_t port, tusb_direction_t dir, uint8_t * p_buffer, uint16_t length, bool int_on_complete)
 {
   (void) port;
 
@@ -428,7 +428,7 @@ static inline uint8_t edpt_phy2log(uint8_t physical_endpoint)
 //--------------------------------------------------------------------+
 // BULK/INTERRUPT/ISOCHRONOUS PIPE API
 //--------------------------------------------------------------------+
-void hal_dcd_pipe_stall(edpt_hdl_t edpt_hdl)
+void tusb_dcd_pipe_stall(edpt_hdl_t edpt_hdl)
 {
   dcd_data.qhd[edpt_hdl.index][0].stall = dcd_data.qhd[edpt_hdl.index][1].stall = 1;
 }
@@ -438,7 +438,7 @@ bool dcd_pipe_is_stalled(edpt_hdl_t edpt_hdl)
   return dcd_data.qhd[edpt_hdl.index][0].stall || dcd_data.qhd[edpt_hdl.index][1].stall;
 }
 
-void hal_dcd_pipe_clear_stall(uint8_t port, uint8_t edpt_addr)
+void tusb_dcd_pipe_clear_stall(uint8_t port, uint8_t edpt_addr)
 {
   uint8_t ep_id = edpt_addr2phy(edpt_addr);
 //  uint8_t active_buffer = BIT_TEST_(LPC_USB->EPINUSE, ep_id) ? 1 : 0;
@@ -456,7 +456,7 @@ void hal_dcd_pipe_clear_stall(uint8_t port, uint8_t edpt_addr)
   }
 }
 
-edpt_hdl_t hal_dcd_pipe_open(uint8_t port, tusb_descriptor_endpoint_t const * p_endpoint_desc, uint8_t class_code)
+edpt_hdl_t tusb_dcd_pipe_open(uint8_t port, tusb_descriptor_endpoint_t const * p_endpoint_desc, uint8_t class_code)
 {
   (void) port;
   edpt_hdl_t const null_handle = { 0 };
@@ -535,7 +535,7 @@ static void queue_xfer_in_next_td(uint8_t ep_id)
   dcd_data.next_td[ep_id].total_bytes = 0; // clear this field as it is used to indicate whehther next TD available
 }
 
-tusb_error_t dcd_pipe_queue_xfer(edpt_hdl_t edpt_hdl, uint8_t * buffer, uint16_t total_bytes)
+tusb_error_t tusb_dcd_pipe_queue_xfer(edpt_hdl_t edpt_hdl, uint8_t * buffer, uint16_t total_bytes)
 {
   ASSERT( !dcd_pipe_is_busy(edpt_hdl), TUSB_ERROR_INTERFACE_IS_BUSY); // endpoint must not in transferring
 
@@ -546,7 +546,7 @@ tusb_error_t dcd_pipe_queue_xfer(edpt_hdl_t edpt_hdl, uint8_t * buffer, uint16_t
   return TUSB_ERROR_NONE;
 }
 
-tusb_error_t  hal_dcd_pipe_xfer(edpt_hdl_t edpt_hdl, uint8_t* buffer, uint16_t total_bytes, bool int_on_complete)
+tusb_error_t  tusb_dcd_pipe_xfer(edpt_hdl_t edpt_hdl, uint8_t* buffer, uint16_t total_bytes, bool int_on_complete)
 {
   if( dcd_pipe_is_busy(edpt_hdl) || dcd_pipe_is_stalled(edpt_hdl) )
   { // save this transfer data to next td if pipe is busy or already been stalled
diff --git a/tinyusb/device/usbd.c b/tinyusb/device/usbd.c
index 5fdd306d..f090bc14 100644
--- a/tinyusb/device/usbd.c
+++ b/tinyusb/device/usbd.c
@@ -167,11 +167,11 @@ static tusb_error_t usbd_body_subtask(void);
 tusb_error_t usbd_init (void)
 {
   #if (TUSB_CFG_CONTROLLER_0_MODE & TUSB_MODE_DEVICE)
-  hal_dcd_init(0);
+  tusb_dcd_init(0);
   #endif
 
   #if (TUSB_CFG_CONTROLLER_1_MODE & TUSB_MODE_DEVICE)
-  hal_dcd_init(1);
+  tusb_dcd_init(1);
   #endif
 
   //------------- Task init -------------//
@@ -296,12 +296,12 @@ tusb_error_t usbd_control_request_subtask(uint8_t port, tusb_control_request_t c
 
       if ( TUSB_ERROR_NONE == error )
       {
-        hal_dcd_control_xfer(port, (tusb_direction_t) p_request->bmRequestType_bit.direction, (uint8_t*) p_buffer, length, false);
+        tusb_dcd_control_xfer(port, (tusb_direction_t) p_request->bmRequestType_bit.direction, (uint8_t*) p_buffer, length, false);
       }
     }
     else if ( TUSB_REQUEST_SET_ADDRESS == p_request->bRequest )
     {
-      hal_dcd_set_address(port, (uint8_t) p_request->wValue);
+      tusb_dcd_set_address(port, (uint8_t) p_request->wValue);
       usbd_devices[port].state = TUSB_DEVICE_STATE_ADDRESSED;
     }
     else if ( TUSB_REQUEST_SET_CONFIGURATION == p_request->bRequest )
@@ -335,7 +335,7 @@ tusb_error_t usbd_control_request_subtask(uint8_t port, tusb_control_request_t c
             TUSB_REQUEST_TYPE_STANDARD      == p_request->bmRequestType_bit.type &&
             TUSB_REQUEST_CLEAR_FEATURE      == p_request->bRequest )
   {
-    hal_dcd_pipe_clear_stall(port, u16_low_u8(p_request->wIndex) );
+    tusb_dcd_pipe_clear_stall(port, u16_low_u8(p_request->wIndex) );
   } else
   {
     error = TUSB_ERROR_DCD_CONTROL_REQUEST_NOT_SUPPORT;
@@ -343,11 +343,11 @@ tusb_error_t usbd_control_request_subtask(uint8_t port, tusb_control_request_t c
 
   if(TUSB_ERROR_NONE != error)
   { // Response with Protocol Stall if request is not supported
-    hal_dcd_control_stall(port);
+    tusb_dcd_control_stall(port);
     //    ASSERT(error == TUSB_ERROR_NONE, VOID_RETURN);
   }else if (p_request->wLength == 0)
   {
-    hal_dcd_control_xfer(port, (tusb_direction_t) p_request->bmRequestType_bit.direction, NULL, 0, false); // zero length for non-data
+    tusb_dcd_control_xfer(port, (tusb_direction_t) p_request->bmRequestType_bit.direction, NULL, 0, false); // zero length for non-data
   }
 
   OSAL_SUBTASK_END
@@ -357,7 +357,7 @@ tusb_error_t usbd_control_request_subtask(uint8_t port, tusb_control_request_t c
 // may need to open interface before set configured
 static tusb_error_t usbd_set_configure_received(uint8_t port, uint8_t config_number)
 {
-  hal_dcd_set_config(port, config_number);
+  tusb_dcd_set_config(port, config_number);
   usbd_devices[port].state = TUSB_DEVICE_STATE_CONFIGURED;
 
   //------------- parse configuration & open drivers -------------//
@@ -448,7 +448,7 @@ static tusb_error_t get_descriptor(uint8_t port, tusb_control_request_t const *
 //--------------------------------------------------------------------+
 // USBD-DCD Callback API
 //--------------------------------------------------------------------+
-void hal_dcd_bus_event(uint8_t port, usbd_bus_event_type_t bus_event)
+void tusb_dcd_bus_event(uint8_t port, usbd_bus_event_type_t bus_event)
 {
   switch(bus_event)
   {
@@ -486,7 +486,7 @@ void hal_dcd_bus_event(uint8_t port, usbd_bus_event_type_t bus_event)
   }
 }
 
-void hal_dcd_setup_received(uint8_t port, uint8_t const* p_request)
+void tusb_dcd_setup_received(uint8_t port, uint8_t const* p_request)
 {
   usbd_task_event_t task_event =
   {
diff --git a/tinyusb/tusb_dcd.h b/tinyusb/tusb_dcd.h
index a7aec4ef..2b7734f1 100644
--- a/tinyusb/tusb_dcd.h
+++ b/tinyusb/tusb_dcd.h
@@ -69,32 +69,32 @@ static inline bool edpt_equal(edpt_hdl_t x, edpt_hdl_t y)
 }
 
 //------------- Controller API -------------//
-bool hal_dcd_init        (uint8_t port);
-void hal_dcd_connect     (uint8_t port);
-void hal_dcd_disconnect  (uint8_t port);
-void hal_dcd_set_address (uint8_t port, uint8_t dev_addr);
-void hal_dcd_set_config  (uint8_t port, uint8_t config_num);
+bool tusb_dcd_init        (uint8_t port);
+void tusb_dcd_connect     (uint8_t port);
+void tusb_dcd_disconnect  (uint8_t port);
+void tusb_dcd_set_address (uint8_t port, uint8_t dev_addr);
+void tusb_dcd_set_config  (uint8_t port, uint8_t config_num);
 
 /*------------- Event function -------------*/
-void hal_dcd_bus_event(uint8_t port, usbd_bus_event_type_t bus_event);
-void hal_dcd_setup_received(uint8_t port, uint8_t const* p_request);
+void tusb_dcd_bus_event(uint8_t port, usbd_bus_event_type_t bus_event);
+void tusb_dcd_setup_received(uint8_t port, uint8_t const* p_request);
 void usbd_xfer_isr(edpt_hdl_t edpt_hdl, tusb_event_t event, uint32_t xferred_bytes);
 
 //------------- PIPE API -------------//
-bool hal_dcd_control_xfer(uint8_t port, tusb_direction_t dir, uint8_t * p_buffer, uint16_t length, bool int_on_complete);
-void hal_dcd_control_stall(uint8_t port);
+bool tusb_dcd_control_xfer(uint8_t port, tusb_direction_t dir, uint8_t * p_buffer, uint16_t length, bool int_on_complete);
+void tusb_dcd_control_stall(uint8_t port);
 
-bool hal_dcd_pipe_open(uint8_t port, tusb_descriptor_endpoint_t const * p_endpoint_desc, edpt_hdl_t* eh);
+bool tusb_dcd_pipe_open(uint8_t port, tusb_descriptor_endpoint_t const * p_endpoint_desc, edpt_hdl_t* eh);
 
 
-tusb_error_t dcd_pipe_queue_xfer(edpt_hdl_t edpt_hdl, uint8_t * buffer, uint16_t total_bytes); // only queue, not transferring yet
-tusb_error_t hal_dcd_pipe_xfer(edpt_hdl_t edpt_hdl, uint8_t * buffer, uint16_t total_bytes, bool int_on_complete);
+tusb_error_t tusb_dcd_pipe_queue_xfer(edpt_hdl_t edpt_hdl, uint8_t * buffer, uint16_t total_bytes); // only queue, not transferring yet
+tusb_error_t tusb_dcd_pipe_xfer(edpt_hdl_t edpt_hdl, uint8_t * buffer, uint16_t total_bytes, bool int_on_complete);
 
 bool dcd_pipe_is_busy(edpt_hdl_t edpt_hdl);
 
 // TODO port + endpoint address are part of endpoint handle, not endpoint handle, data toggle also need to be reset
-void hal_dcd_pipe_stall(edpt_hdl_t edpt_hdl);
-void hal_dcd_pipe_clear_stall(uint8_t port, uint8_t edpt_addr);
+void tusb_dcd_pipe_stall(edpt_hdl_t edpt_hdl);
+void tusb_dcd_pipe_clear_stall(uint8_t port, uint8_t edpt_addr);
 
 #ifdef __cplusplus
  }