diff --git a/demos/device/device_os_none/.cproject b/demos/device/device_os_none/.cproject
index 240247db..7733a45b 100644
--- a/demos/device/device_os_none/.cproject
+++ b/demos/device/device_os_none/.cproject
@@ -46,7 +46,7 @@
-
+
@@ -473,73 +473,49 @@
<?xml version="1.0" encoding="UTF-8"?>
<TargetConfig>
-<Properties property_0="" property_3="NXP" property_4="LPC1769" property_count="5" version="1"/>
-<infoList vendor="NXP"><info chip="LPC1769" match_id="0x26113F37" name="LPC1769" package="lpc17_lqfp100.xml"><chip><name>LPC1769</name>
-<family>LPC17xx</family>
+<Properties property_0="" property_3="NXP" property_4="LPC1347" property_count="5" version="1"/>
+<infoList vendor="NXP"><info chip="LPC1347" match_id="0x08020543" name="LPC1347" stub="crt_emu_lpc11_13_nxp"><chip><name>LPC1347</name>
+<family>LPC13xx (12bit ADC)</family>
<vendor>NXP (formerly Philips)</vendor>
<reset board="None" core="Real" sys="Real"/>
-<clock changeable="TRUE" freq="20MHz" is_accurate="TRUE"/>
+<clock changeable="TRUE" freq="12MHz" is_accurate="TRUE"/>
<memory can_program="true" id="Flash" is_ro="true" type="Flash"/>
<memory id="RAM" type="RAM"/>
<memory id="Periph" is_volatile="true" type="Peripheral"/>
-<memoryInstance derived_from="Flash" id="MFlash512" location="0x0" size="0x80000"/>
-<memoryInstance derived_from="RAM" id="RamLoc32" location="0x10000000" size="0x8000"/>
-<memoryInstance derived_from="RAM" id="RamAHB32" location="0x2007c000" size="0x8000"/>
-<prog_flash blocksz="0x1000" location="0" maxprgbuff="0x1000" progwithcode="TRUE" size="0x10000"/>
-<prog_flash blocksz="0x8000" location="0x10000" maxprgbuff="0x1000" progwithcode="TRUE" size="0x70000"/>
-<peripheralInstance derived_from="LPC17_NVIC" id="NVIC" location="0xE000E000"/>
-<peripheralInstance derived_from="TIMER" enable="SYSCTL.PCONP.PCTIM0&0x1" id="TIMER0" location="0x40004000"/>
-<peripheralInstance derived_from="TIMER" enable="SYSCTL.PCONP.PCTIM1&0x1" id="TIMER1" location="0x40008000"/>
-<peripheralInstance derived_from="TIMER" enable="SYSCTL.PCONP.PCTIM2&0x1" id="TIMER2" location="0x40090000"/>
-<peripheralInstance derived_from="TIMER" enable="SYSCTL.PCONP.PCTIM3&0x1" id="TIMER3" location="0x40094000"/>
-<peripheralInstance derived_from="LPC17_RIT" enable="SYSCTL.PCONP.PCRIT&0x1" id="RIT" location="0x400B0000"/>
-<peripheralInstance derived_from="FGPIO" enable="SYSCTL.PCONP.PCGPIO&0x1" id="GPIO0" location="0x2009C000"/>
-<peripheralInstance derived_from="FGPIO" enable="SYSCTL.PCONP.PCGPIO&0x1" id="GPIO1" location="0x2009C020"/>
-<peripheralInstance derived_from="FGPIO" enable="SYSCTL.PCONP.PCGPIO&0x1" id="GPIO2" location="0x2009C040"/>
-<peripheralInstance derived_from="FGPIO" enable="SYSCTL.PCONP.PCGPIO&0x1" id="GPIO3" location="0x2009C060"/>
-<peripheralInstance derived_from="FGPIO" enable="SYSCTL.PCONP.PCGPIO&0x1" id="GPIO4" location="0x2009C080"/>
-<peripheralInstance derived_from="LPC17_I2S" enable="SYSCTL.PCONP&0x08000000" id="I2S" location="0x400A8000"/>
-<peripheralInstance derived_from="LPC17_SYSCTL" id="SYSCTL" location="0x400FC000"/>
-<peripheralInstance derived_from="LPC17_DAC" enable="PCB.PINSEL1.P0_26&0x2=2" id="DAC" location="0x4008C000"/>
-<peripheralInstance derived_from="LPC17xx_UART" enable="SYSCTL.PCONP.PCUART0&0x1" id="UART0" location="0x4000C000"/>
-<peripheralInstance derived_from="LPC17xx_UART_MODEM" enable="SYSCTL.PCONP.PCUART1&0x1" id="UART1" location="0x40010000"/>
-<peripheralInstance derived_from="LPC17xx_UART" enable="SYSCTL.PCONP.PCUART2&0x1" id="UART2" location="0x40098000"/>
-<peripheralInstance derived_from="LPC17xx_UART" enable="SYSCTL.PCONP.PCUART3&0x1" id="UART3" location="0x4009C000"/>
-<peripheralInstance derived_from="SPI" enable="SYSCTL.PCONP.PCSPI&0x1" id="SPI" location="0x40020000"/>
-<peripheralInstance derived_from="LPC17_SSP" enable="SYSCTL.PCONP.PCSSP0&0x1" id="SSP0" location="0x40088000"/>
-<peripheralInstance derived_from="LPC17_SSP" enable="SYSCTL.PCONP.PCSSP1&0x1" id="SSP1" location="0x40030000"/>
-<peripheralInstance derived_from="LPC17_ADC" enable="SYSCTL.PCONP.PCAD&0x1" id="ADC" location="0x40034000"/>
-<peripheralInstance derived_from="LPC17_USBINTST" enable="USBCLKCTL.USBClkCtrl&0x12" id="USBINTSTAT" location="0x400fc1c0"/>
-<peripheralInstance derived_from="LPC17_USB_CLK_CTL" id="USBCLKCTL" location="0x5000cff4"/>
-<peripheralInstance derived_from="LPC17_USBDEV" enable="USBCLKCTL.USBClkSt&0x12=0x12" id="USBDEV" location="0x5000C200"/>
-<peripheralInstance derived_from="LPC17_PWM" enable="SYSCTL.PCONP.PWM1&0x1" id="PWM" location="0x40018000"/>
-<peripheralInstance derived_from="LPC17_I2C" enable="SYSCTL.PCONP.PCI2C0&0x1" id="I2C0" location="0x4001C000"/>
-<peripheralInstance derived_from="LPC17_I2C" enable="SYSCTL.PCONP.PCI2C1&0x1" id="I2C1" location="0x4005C000"/>
-<peripheralInstance derived_from="LPC17_I2C" enable="SYSCTL.PCONP.PCI2C2&0x1" id="I2C2" location="0x400A0000"/>
-<peripheralInstance derived_from="LPC17_DMA" enable="SYSCTL.PCONP.PCGPDMA&0x1" id="DMA" location="0x50004000"/>
-<peripheralInstance derived_from="LPC17_ENET" enable="SYSCTL.PCONP.PCENET&0x1" id="ENET" location="0x50000000"/>
-<peripheralInstance derived_from="CM3_DCR" id="DCR" location="0xE000EDF0"/>
-<peripheralInstance derived_from="LPC17_PCB" id="PCB" location="0x4002c000"/>
-<peripheralInstance derived_from="LPC17_QEI" enable="SYSCTL.PCONP.PCQEI&0x1" id="QEI" location="0x400bc000"/>
-<peripheralInstance derived_from="LPC17_USBHOST" enable="USBCLKCTL.USBClkSt&0x11=0x11" id="USBHOST" location="0x5000C000"/>
-<peripheralInstance derived_from="LPC17_USBOTG" enable="USBCLKCTL.USBClkSt&0x1c=0x1c" id="USBOTG" location="0x5000C000"/>
-<peripheralInstance derived_from="LPC17_RTC" enable="SYSCTL.PCONP.PCRTC&0x1" id="RTC" location="0x40024000"/>
-<peripheralInstance derived_from="MPU" id="MPU" location="0xE000ED90"/>
-<peripheralInstance derived_from="LPC1x_WDT" id="WDT" location="0x40000000"/>
-<peripheralInstance derived_from="LPC17_FLASHCFG" id="FLASHACCEL" location="0x400FC000"/>
-<peripheralInstance derived_from="GPIO_INT" id="GPIOINTMAP" location="0x40028080"/>
-<peripheralInstance derived_from="LPC17_CANAFR" enable="SYSCTL.PCONP.PCCAN1&0x1|SYSCTL.PCONP.PCCAN2&0x1" id="CANAFR" location="0x4003C000"/>
-<peripheralInstance derived_from="LPC17_CANCEN" enable="SYSCTL.PCONP.PCCAN1&0x1|SYSCTL.PCONP.PCCAN2&0x1" id="CANCEN" location="0x40040000"/>
-<peripheralInstance derived_from="LPC17_CANWAKESLEEP" id="CANWAKESLEEP" location="0x400FC110"/>
-<peripheralInstance derived_from="LPC17_CANCON" enable="SYSCTL.PCONP.PCCAN1&0x1" id="CANCON1" location="0x40044000"/>
-<peripheralInstance derived_from="LPC17_CANCON" enable="SYSCTL.PCONP.PCCAN2&0x1" id="CANCON2" location="0x40048000"/>
-<peripheralInstance derived_from="LPC17_MCPWM" enable="SYSCTL.PCONP.PCMCPWM&0x1" id="MCPWM" location="0x400B8000"/>
-<peripheralInstance derived_from="LPC17_FMC" id="FMC" location="0x40084000"/>
+<memoryInstance derived_from="Flash" id="MFlash64" location="0x0" size="0x10000"/>
+<memoryInstance derived_from="RAM" id="RamLoc8" location="0x10000000" size="0x2000"/>
+<memoryInstance derived_from="RAM" id="RamUsb2" location="0x20004000" size="0x800"/>
+<memoryInstance derived_from="RAM" id="RamPeriph2" location="0x20000000" size="0x800"/>
+<prog_flash blocksz="0x1000" location="0x0" maxprgbuff="0x400" progwithcode="TRUE" size="0x10000"/>
+<peripheralInstance derived_from="V7M_MPU" id="MPU" location="0xe000ed90"/>
+<peripheralInstance derived_from="V7M_NVIC" id="NVIC" location="0xe000e000"/>
+<peripheralInstance derived_from="V7M_DCR" id="DCR" location="0xe000edf0"/>
+<peripheralInstance derived_from="V7M_ITM" id="ITM" location="0xe0000000"/>
+<peripheralInstance derived_from="I2C" id="I2C" location="0x40000000"/>
+<peripheralInstance derived_from="WWDT" id="WWDT" location="0x40004000"/>
+<peripheralInstance derived_from="USART" id="USART" location="0x40008000"/>
+<peripheralInstance derived_from="CT16B0" id="CT16B0" location="0x4000c000"/>
+<peripheralInstance derived_from="CT16B1" id="CT16B1" location="0x40010000"/>
+<peripheralInstance derived_from="CT32B0" id="CT32B0" location="0x40014000"/>
+<peripheralInstance derived_from="CT32B1" id="CT32B1" location="0x40018000"/>
+<peripheralInstance derived_from="ADC" id="ADC" location="0x4001c000"/>
+<peripheralInstance derived_from="PMU" id="PMU" location="0x40038000"/>
+<peripheralInstance derived_from="FLASHCTRL" id="FLASHCTRL" location="0x4003c000"/>
+<peripheralInstance derived_from="SSP0" id="SSP0" location="0x40040000"/>
+<peripheralInstance derived_from="IOCON" id="IOCON" location="0x40044000"/>
+<peripheralInstance derived_from="SYSCON" id="SYSCON" location="0x40048000"/>
+<peripheralInstance derived_from="GPIO-PIN-INT" id="GPIO-PIN-INT" location="0x4004c000"/>
+<peripheralInstance derived_from="SSP1" id="SSP1" location="0x40058000"/>
+<peripheralInstance derived_from="GPIO-GROUP-INT0" id="GPIO-GROUP-INT0" location="0x4005c000"/>
+<peripheralInstance derived_from="GPIO-GROUP-INT1" id="GPIO-GROUP-INT1" location="0x40060000"/>
+<peripheralInstance derived_from="RITIMER" id="RITIMER" location="0x40064000"/>
+<peripheralInstance derived_from="USB" id="USB" location="0x40080000"/>
+<peripheralInstance derived_from="GPIO-PORT" id="GPIO-PORT" location="0x50000000"/>
</chip>
<processor><name gcc_name="cortex-m3">Cortex-M3</name>
<family>Cortex-M</family>
</processor>
-<link href="nxp_lpcxxxx_peripheral.xme" show="embed" type="simple"/>
+<link href="nxp_lpc13Uxx_peripheral.xme" show="embed" type="simple"/>
</info>
</infoList>
</TargetConfig>
diff --git a/demos/host/src/cli.c b/demos/host/src/cli.c
index a9bef79a..8816d43b 100644
--- a/demos/host/src/cli.c
+++ b/demos/host/src/cli.c
@@ -88,7 +88,7 @@ static char const * const cli_error_message[] =
// Expands the function to have the standard function signature
//--------------------------------------------------------------------+
#define CLI_PROTOTYPE_EXPAND(command, function, description) \
- cli_error_t function(char *);
+ cli_error_t function(char * p_para);
CLI_COMMAND_TABLE(CLI_PROTOTYPE_EXPAND);
@@ -108,7 +108,6 @@ typedef enum {
char const* const cli_string_tbl[] =
{
CLI_COMMAND_TABLE(CLI_STRING_EXPAND)
- 0
};
//--------------------------------------------------------------------+
@@ -118,7 +117,6 @@ char const* const cli_string_tbl[] =
char const* const cli_description_tbl[] =
{
CLI_COMMAND_TABLE(CLI_DESCRIPTION_EXPAND)
- 0
};
diff --git a/tinyusb/common/common.h b/tinyusb/common/common.h
index 3ab530e6..ecc7bf42 100644
--- a/tinyusb/common/common.h
+++ b/tinyusb/common/common.h
@@ -110,14 +110,15 @@
#define U32_TO_U8S_LE(u32) U32_B4_U8(u32), U32_B3_U8(u32), U32_B2_U8(u32), U32_B1_U8(u32)
//------------- Endian Conversion -------------//
-#define ENDIAN_BE(le32) \
- (uint32_t) ( ((le32 & 0xFF) << 24) | ((le32 & 0xFF00) << 8) | ((le32 >> 8) & 0xFF00) | ((le32 >> 24) & 0xFF) )
+#define ENDIAN_BE(u32) \
+ (uint32_t) ( (((u32) & 0xFF) << 24) | (((u32) & 0xFF00) << 8) | (((u32) >> 8) & 0xFF00) | (((u32) >> 24) & 0xFF) )
#define ENDIAN_BE16(le16) ((uint16_t) ((U16_LOW_U8(le16) << 8) | U16_HIGH_U8(le16)) )
-// TODO refractor to built-in function
+#ifndef __n2be_16
#define __n2be_16(u16) ((uint16_t) ((U16_LOW_U8(u16) << 8) | U16_HIGH_U8(u16)) )
#define __be2n_16(u16) __n2be_16(u16)
+#endif
//--------------------------------------------------------------------+
// INLINE FUNCTION
diff --git a/tinyusb/common/compiler/compiler_gcc.h b/tinyusb/common/compiler/compiler_gcc.h
index 1733fab0..188ae271 100644
--- a/tinyusb/common/compiler/compiler_gcc.h
+++ b/tinyusb/common/compiler/compiler_gcc.h
@@ -130,12 +130,14 @@
* @{
*/
-//#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
-// built-in function to convert 32-bit from native to Big Endian
-#define __be2n __builtin_bswap32
-#define __n2be __be2n
+// TODO mcu specific
+#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
+#define __n2be(x) __REV(x) ///< built-in function to convert 32-bit from native to Big Endian
+#define __be2n(x) __n2be(x) ///< built-in function to convert 32-bit from Big Endian to native
-//#define __le2be_16 __builtin_bswap16
+#define __n2be_16(u16) ((uint16_t) __REV16(u16))
+#define __be2n_16(u16) __n2be_16(u16)
+#endif
/** @} */