From bdee6397ebf87ba83043fec15ca03e3542deb7a3 Mon Sep 17 00:00:00 2001 From: Yakovenko Andrey Date: Wed, 23 Dec 2020 12:52:51 +0200 Subject: [PATCH 01/14] Added MSC read10 and write10 function --- src/class/msc/msc_host.c | 91 ++++++++++++++++++++-------------------- src/class/msc/msc_host.h | 22 ++++------ 2 files changed, 52 insertions(+), 61 deletions(-) diff --git a/src/class/msc/msc_host.c b/src/class/msc/msc_host.c index 02ca81e7..9ba41d94 100644 --- a/src/class/msc/msc_host.c +++ b/src/class/msc/msc_host.c @@ -192,60 +192,59 @@ bool tuh_msc_request_sense(uint8_t dev_addr, uint8_t lun, void *resposne, tuh_ms return tuh_msc_scsi_command(dev_addr, &cbw, resposne, complete_cb); } -#if 0 - -tusb_error_t tuh_msc_read10(uint8_t dev_addr, uint8_t lun, void * p_buffer, uint32_t lba, uint16_t block_count) +bool tuh_msc_read10(uint8_t dev_addr, uint8_t lun, void * p_buffer, uint32_t lba, uint16_t block_count, tuh_msc_complete_cb_t complete_cb) { - msch_interface_t* p_msch = &msch_data[dev_addr-1]; + msch_interface_t* p_msc = get_itf(dev_addr); + if ( !p_msc->mounted ){ return false;}; - //------------- Command Block Wrapper -------------// - msc_cbw_add_signature(&p_msch->cbw, lun); - - p_msch->cbw.total_bytes = p_msch->block_size*block_count; // Number of bytes - p_msch->cbw.dir = TUSB_DIR_IN_MASK; - p_msch->cbw.cmd_len = sizeof(scsi_read10_t); - - //------------- SCSI command -------------// - scsi_read10_t cmd_read10 =msch_sem_hdl + msc_cbw_t cbw = { 0 }; + + //------------- Command Block Wrapper -------------// + msc_cbw_add_signature(&cbw, lun); + + cbw.total_bytes = 512*block_count; // Number of bytes + cbw.dir = TUSB_DIR_IN_MASK; + cbw.cmd_len = sizeof(scsi_read10_t); + + //------------- SCSI command -------------// + scsi_read10_t cmd_read10 = { - .cmd_code = SCSI_CMD_READ_10, - .lba = tu_htonl(lba), - .block_count = tu_htons(block_count) + .cmd_code = SCSI_CMD_READ_10, + .lba = tu_htonl(lba), + .block_count = tu_htons(block_count) }; - - memcpy(p_msch->cbw.command, &cmd_read10, p_msch->cbw.cmd_len); - - TU_ASSERT_ERR ( send_cbw(dev_addr, p_msch, p_buffer)); - - return TUSB_ERROR_NONE; + + memcpy(cbw.command, &cmd_read10, cbw.cmd_len); + + return tuh_msc_scsi_command(dev_addr, &cbw, p_buffer, complete_cb); } - -tusb_error_t tuh_msc_write10(uint8_t dev_addr, uint8_t lun, void const * p_buffer, uint32_t lba, uint16_t block_count) + +bool tuh_msc_write10(uint8_t dev_addr, uint8_t lun, void * p_buffer, uint32_t lba, uint16_t block_count, tuh_msc_complete_cb_t complete_cb) { - msch_interface_t* p_msch = &msch_data[dev_addr-1]; + msch_interface_t* p_msc = get_itf(dev_addr); + if ( !p_msc->mounted ){ return false;}; + + msc_cbw_t cbw = { 0 }; + + //------------- Command Block Wrapper -------------// + msc_cbw_add_signature(&cbw, lun); + + cbw.total_bytes = 512*block_count; // Number of bytes + cbw.dir = TUSB_DIR_OUT; + cbw.cmd_len = sizeof(scsi_write10_t); - //------------- Command Block Wrapper -------------// - msc_cbw_add_signature(&p_msch->cbw, lun); - - p_msch->cbw.total_bytes = p_msch->block_size*block_count; // Number of bytes - p_msch->cbw.dir = TUSB_DIR_OUT; - p_msch->cbw.cmd_len = sizeof(scsi_write10_t); - - //------------- SCSI command -------------// - scsi_write10_t cmd_write10 = - { - .cmd_code = SCSI_CMD_WRITE_10, - .lba = tu_htonl(lba), - .block_count = tu_htons(block_count) - }; - - memcpy(p_msch->cbw.command, &cmd_write10, p_msch->cbw.cmd_len); - - TU_ASSERT_ERR ( send_cbw(dev_addr, p_msch, (void*) p_buffer)); - - return TUSB_ERROR_NONE; + //------------- SCSI command -------------// + scsi_write10_t cmd_write10 = + { + .cmd_code = SCSI_CMD_WRITE_10, + .lba = tu_htonl(lba), + .block_count = tu_htons(block_count) + }; + + memcpy(cbw.command, &cmd_write10, cbw.cmd_len); + + return tuh_msc_scsi_command(dev_addr, &cbw, p_buffer, complete_cb); } -#endif #if 0 // MSC interface Reset (not used now) diff --git a/src/class/msc/msc_host.h b/src/class/msc/msc_host.h index 5913350b..016e4e21 100644 --- a/src/class/msc/msc_host.h +++ b/src/class/msc/msc_host.h @@ -81,20 +81,16 @@ bool tuh_msc_request_sense(uint8_t dev_addr, uint8_t lun, void *resposne, tuh_ms // Carry out SCSI READ CAPACITY (10) command in non-blocking manner. bool tuh_msc_read_capacity(uint8_t dev_addr, uint8_t lun, scsi_read_capacity10_resp_t* response, tuh_msc_complete_cb_t complete_cb); -#if 0 /** \brief Perform SCSI READ 10 command to read data from MassStorage device * \param[in] dev_addr device address * \param[in] lun Targeted Logical Unit - * \param[out] p_buffer Buffer used to store data read from device. Must be accessible by USB controller (see \ref CFG_TUSB_MEM_SECTION) + * \param[out] p_buffer Buffer used to store data read from device. Must be accessible by USB controller (see \ref CFG_TUSB_MEM_SECTION) * \param[in] lba Starting Logical Block Address to be read * \param[in] block_count Number of Block to be read - * \retval TUSB_ERROR_NONE on success - * \retval TUSB_ERROR_INTERFACE_IS_BUSY if the interface is already transferring data with device - * \retval TUSB_ERROR_DEVICE_NOT_READY if device is not yet configured (by SET CONFIGURED request) - * \retval TUSB_ERROR_INVALID_PARA if input parameters are not correct - * \note This function is non-blocking and returns immediately. The result of USB transfer will be reported by the interface's callback function + * \retval true on success + * \note This function is non-blocking and returns immediately. The result of USB transfer will be reported by \ref complete_cb callback function */ -tusb_error_t tuh_msc_read10 (uint8_t dev_addr, uint8_t lun, void * p_buffer, uint32_t lba, uint16_t block_count); +bool tuh_msc_read10(uint8_t dev_addr, uint8_t lun, void * p_buffer, uint32_t lba, uint16_t block_count, tuh_msc_complete_cb_t complete_cb); /** \brief Perform SCSI WRITE 10 command to write data to MassStorage device * \param[in] dev_addr device address @@ -102,14 +98,10 @@ tusb_error_t tuh_msc_read10 (uint8_t dev_addr, uint8_t lun, void * p_buffer, uin * \param[in] p_buffer Buffer containing data. Must be accessible by USB controller (see \ref CFG_TUSB_MEM_SECTION) * \param[in] lba Starting Logical Block Address to be written * \param[in] block_count Number of Block to be written - * \retval TUSB_ERROR_NONE on success - * \retval TUSB_ERROR_INTERFACE_IS_BUSY if the interface is already transferring data with device - * \retval TUSB_ERROR_DEVICE_NOT_READY if device is not yet configured (by SET CONFIGURED request) - * \retval TUSB_ERROR_INVALID_PARA if input parameters are not correct - * \note This function is non-blocking and returns immediately. The result of USB transfer will be reported by the interface's callback function + * \retval true on success + * \note This function is non-blocking and returns immediately. The result of USB transfer will be reported by \ref complete_cb callback function */ -tusb_error_t tuh_msc_write10(uint8_t dev_addr, uint8_t lun, void const * p_buffer, uint32_t lba, uint16_t block_count); -#endif +bool tuh_msc_write10(uint8_t dev_addr, uint8_t lun, void * p_buffer, uint32_t lba, uint16_t block_count, tuh_msc_complete_cb_t complete_cb); //------------- Application Callback -------------// From 00b4b74e8276691dfc4a20163b472c7bd15f4f51 Mon Sep 17 00:00:00 2001 From: hathach Date: Mon, 22 Feb 2021 17:15:06 +0700 Subject: [PATCH 02/14] rename hcd_lpc18_43 to hcd_transdimension --- examples/host/cdc_msc_hid/Makefile | 2 +- .../hcd_lpc18_43.c => transdimension/hcd_transdimension.c} | 0 2 files changed, 1 insertion(+), 1 deletion(-) rename src/portable/nxp/{lpc18_43/hcd_lpc18_43.c => transdimension/hcd_transdimension.c} (100%) diff --git a/examples/host/cdc_msc_hid/Makefile b/examples/host/cdc_msc_hid/Makefile index b49c4c75..3a0e94d7 100644 --- a/examples/host/cdc_msc_hid/Makefile +++ b/examples/host/cdc_msc_hid/Makefile @@ -21,7 +21,7 @@ SRC_C += \ src/host/usbh_control.c \ src/host/ehci/ehci.c \ src/host/ohci/ohci.c \ - src/portable/nxp/lpc18_43/hcd_lpc18_43.c \ + src/portable/nxp/transdimension/hcd_transdimension.c \ src/portable/nxp/lpc17_40/hcd_lpc17_40.c include ../../rules.mk diff --git a/src/portable/nxp/lpc18_43/hcd_lpc18_43.c b/src/portable/nxp/transdimension/hcd_transdimension.c similarity index 100% rename from src/portable/nxp/lpc18_43/hcd_lpc18_43.c rename to src/portable/nxp/transdimension/hcd_transdimension.c From 8a2e4c79fd6a5b7927ae07bececc30ca79d9edf2 Mon Sep 17 00:00:00 2001 From: hathach Date: Mon, 22 Feb 2021 18:02:52 +0700 Subject: [PATCH 03/14] make hcd tdi more generic --- src/host/ehci/ehci.c | 5 ++- .../nxp/transdimension/dcd_transdimension.c | 5 +-- .../nxp/transdimension/hcd_transdimension.c | 45 ++++++++++++++++--- 3 files changed, 45 insertions(+), 10 deletions(-) diff --git a/src/host/ehci/ehci.c b/src/host/ehci/ehci.c index 23c8ea9e..f3a5cf9c 100644 --- a/src/host/ehci/ehci.c +++ b/src/host/ehci/ehci.c @@ -26,7 +26,10 @@ #include "common/tusb_common.h" -#if TUSB_OPT_HOST_ENABLED && (CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_LPC18XX) +#if TUSB_OPT_HOST_ENABLED && \ + (CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_LPC18XX || \ + CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX ) + //--------------------------------------------------------------------+ // INCLUDE //--------------------------------------------------------------------+ diff --git a/src/portable/nxp/transdimension/dcd_transdimension.c b/src/portable/nxp/transdimension/dcd_transdimension.c index 755e7635..6f1923ec 100644 --- a/src/portable/nxp/transdimension/dcd_transdimension.c +++ b/src/portable/nxp/transdimension/dcd_transdimension.c @@ -26,9 +26,8 @@ #include "tusb_option.h" -#if TUSB_OPT_DEVICE_ENABLED && (CFG_TUSB_MCU == OPT_MCU_LPC18XX || \ - CFG_TUSB_MCU == OPT_MCU_LPC43XX || \ - CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX) +#if TUSB_OPT_DEVICE_ENABLED && \ + (CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX) //--------------------------------------------------------------------+ // INCLUDE diff --git a/src/portable/nxp/transdimension/hcd_transdimension.c b/src/portable/nxp/transdimension/hcd_transdimension.c index cb509e7a..f8ad7c71 100644 --- a/src/portable/nxp/transdimension/hcd_transdimension.c +++ b/src/portable/nxp/transdimension/hcd_transdimension.c @@ -26,25 +26,58 @@ #include "tusb_option.h" -#if TUSB_OPT_HOST_ENABLED && (CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_LPC43XX) +// NXP Trans-Dimension USB IP implement EHCI for host functionality -#include "chip.h" +#if TUSB_OPT_HOST_ENABLED && \ + (CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX) + +#if CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX + #include "fsl_device_registers.h" +#else + // LPCOpen for 18xx & 43xx + #include "chip.h" +#endif + +typedef struct +{ + uint32_t regs_addr; // registers base + const IRQn_Type irqnum; // IRQ number +}hcd_controller_t; + +#if CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX + static const hcd_controller_t _hcd_controller[] = + { + // RT1010 and RT1020 only has 1 USB controller + #if FSL_FEATURE_SOC_USBHS_COUNT == 1 + { .regs_addr = (uint32_t) &USB->USBCMD , .irqnum = USB_OTG1_IRQn } + #else + { .regs_addr = (uint32_t) &USB1->USBCMD, .irqnum = USB_OTG1_IRQn }, + { .regs_addr = (uint32_t) &USB2->USBCMD, .irqnum = USB_OTG2_IRQn } + #endif + }; + +#else + static const hcd_controller_t _hcd_controller[] = + { + { .regs_addr = (uint32_t) &LPC_USB0->USBCMD_H, .irqnum = USB0_IRQn }, + { .regs_addr = (uint32_t) &LPC_USB1->USBCMD_H, .irqnum = USB1_IRQn } + }; +#endif -// LPC18xx and 43xx use EHCI driver void hcd_int_enable(uint8_t rhport) { - NVIC_EnableIRQ(rhport ? USB1_IRQn : USB0_IRQn); + NVIC_EnableIRQ(_hcd_controller[rhport].irqnum); } void hcd_int_disable(uint8_t rhport) { - NVIC_DisableIRQ(rhport ? USB1_IRQn : USB0_IRQn); + NVIC_DisableIRQ(_hcd_controller[rhport].irqnum); } uint32_t hcd_ehci_register_addr(uint8_t rhport) { - return (uint32_t) (rhport ? &LPC_USB1->USBCMD_H : &LPC_USB0->USBCMD_H ); + return _hcd_controller[rhport].regs_addr; } #endif From 1e07fc024c91453cd71d357698b05d40eb571431 Mon Sep 17 00:00:00 2001 From: hathach Date: Mon, 22 Feb 2021 22:32:56 +0700 Subject: [PATCH 04/14] add rhport to hcd_init() --- src/host/ehci/ehci.c | 4 ++-- src/host/hcd.h | 2 +- src/host/usbh.c | 2 +- 3 files changed, 4 insertions(+), 4 deletions(-) diff --git a/src/host/ehci/ehci.c b/src/host/ehci/ehci.c index f3a5cf9c..b5f872c8 100644 --- a/src/host/ehci/ehci.c +++ b/src/host/ehci/ehci.c @@ -105,10 +105,10 @@ static bool ehci_init (uint8_t rhport); //--------------------------------------------------------------------+ // HCD API //--------------------------------------------------------------------+ -bool hcd_init(void) +bool hcd_init(uint8_t rhport) { tu_memclr(&ehci_data, sizeof(ehci_data_t)); - return ehci_init(TUH_OPT_RHPORT); + return ehci_init(rhport); } uint32_t hcd_uframe_number(uint8_t rhport) diff --git a/src/host/hcd.h b/src/host/hcd.h index db98f611..4810ef8d 100644 --- a/src/host/hcd.h +++ b/src/host/hcd.h @@ -98,7 +98,7 @@ enum { //--------------------------------------------------------------------+ // Controller & Port API //--------------------------------------------------------------------+ -bool hcd_init(void); +bool hcd_init(uint8_t rhport); void hcd_int_handler(uint8_t rhport); void hcd_int_enable (uint8_t rhport); void hcd_int_disable(uint8_t rhport); diff --git a/src/host/usbh.c b/src/host/usbh.c index f278f4d9..0bc6378b 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -197,7 +197,7 @@ bool tuh_init(void) usbh_class_drivers[drv_id].init(); } - TU_ASSERT(hcd_init()); + TU_ASSERT(hcd_init(TUH_OPT_RHPORT)); hcd_int_enable(TUH_OPT_RHPORT); return true; From c5b8980398a8e79f6501af1f1b1e17e0a599fabf Mon Sep 17 00:00:00 2001 From: hathach Date: Mon, 22 Feb 2021 22:40:51 +0700 Subject: [PATCH 05/14] separate hcd_init from ehci --- src/host/ehci/ehci.c | 12 ++++-------- src/portable/nxp/transdimension/hcd_transdimension.c | 8 ++++++++ 2 files changed, 12 insertions(+), 8 deletions(-) diff --git a/src/host/ehci/ehci.c b/src/host/ehci/ehci.c index b5f872c8..5626abcc 100644 --- a/src/host/ehci/ehci.c +++ b/src/host/ehci/ehci.c @@ -51,6 +51,7 @@ CFG_TUSB_MEM_SECTION TU_ATTR_ALIGNED(4096) static ehci_data_t ehci_data; // EHCI portable uint32_t hcd_ehci_register_addr(uint8_t rhport); +bool hcd_ehci_init (uint8_t rhport); // TODO move later //--------------------------------------------------------------------+ // PROTOTYPE @@ -100,16 +101,9 @@ static void qtd_init (ehci_qtd_t* p_qtd, void* buffer, uint16_t total_bytes); static inline void list_insert (ehci_link_t *current, ehci_link_t *new, uint8_t new_type); static inline ehci_link_t* list_next (ehci_link_t *p_link_pointer); -static bool ehci_init (uint8_t rhport); - //--------------------------------------------------------------------+ // HCD API //--------------------------------------------------------------------+ -bool hcd_init(uint8_t rhport) -{ - tu_memclr(&ehci_data, sizeof(ehci_data_t)); - return ehci_init(rhport); -} uint32_t hcd_uframe_number(uint8_t rhport) { @@ -206,8 +200,10 @@ void hcd_device_close(uint8_t rhport, uint8_t dev_addr) } // EHCI controller init -static bool ehci_init(uint8_t rhport) +bool hcd_ehci_init(uint8_t rhport) { + tu_memclr(&ehci_data, sizeof(ehci_data_t)); + ehci_data.regs = (ehci_registers_t* ) hcd_ehci_register_addr(rhport); ehci_registers_t* regs = ehci_data.regs; diff --git a/src/portable/nxp/transdimension/hcd_transdimension.c b/src/portable/nxp/transdimension/hcd_transdimension.c index f8ad7c71..62b14364 100644 --- a/src/portable/nxp/transdimension/hcd_transdimension.c +++ b/src/portable/nxp/transdimension/hcd_transdimension.c @@ -65,6 +65,14 @@ typedef struct #endif +// TODO better prototype later +extern bool hcd_ehci_init (uint8_t rhport); // from ehci.c + +bool hcd_init(uint8_t rhport) +{ + return hcd_ehci_init(rhport); +} + void hcd_int_enable(uint8_t rhport) { NVIC_EnableIRQ(_hcd_controller[rhport].irqnum); From de955852586eb88cac4c107cfa0ace267ce079d1 Mon Sep 17 00:00:00 2001 From: hathach Date: Tue, 23 Feb 2021 01:27:52 +0700 Subject: [PATCH 06/14] nxp tdi: hcd_init() reset and set host mode --- hw/bsp/mcb1800/mcb1800.c | 39 ----- .../transdimension/common_transdimension.h | 136 ++++++++++++++++++ .../nxp/transdimension/dcd_transdimension.c | 108 +------------- .../nxp/transdimension/hcd_transdimension.c | 52 +++++-- 4 files changed, 185 insertions(+), 150 deletions(-) create mode 100644 src/portable/nxp/transdimension/common_transdimension.h diff --git a/hw/bsp/mcb1800/mcb1800.c b/hw/bsp/mcb1800/mcb1800.c index 569d3383..5256501e 100644 --- a/hw/bsp/mcb1800/mcb1800.c +++ b/hw/bsp/mcb1800/mcb1800.c @@ -157,51 +157,12 @@ void board_init(void) Chip_UART_TXEnable(UART_DEV); //------------- USB -------------// - enum { - USBMODE_DEVICE = 2, - USBMODE_HOST = 3 - }; - - enum { - USBMODE_VBUS_LOW = 0, - USBMODE_VBUS_HIGH = 1 - }; - - // USB0 #if CFG_TUSB_RHPORT0_MODE Chip_USB0_Init(); - - // Host/Device mode can only be set right after controller reset - LPC_USB0->USBCMD_D |= 0x02; - while( LPC_USB0->USBCMD_D & 0x02 ) {} - - // Set mode - #if CFG_TUSB_RHPORT0_MODE & OPT_MODE_HOST - LPC_USB0->USBMODE_H = USBMODE_HOST | (USBMODE_VBUS_HIGH << 5); - LPC_USB0->PORTSC1_H |= (1<<24); // FIXME force full speed for debugging - #else // TODO OTG - LPC_USB0->USBMODE_D = USBMODE_DEVICE; - LPC_USB0->OTGSC = (1<<3) | (1<<0) /*| (1<<16)| (1<<24)| (1<<25)| (1<<26)| (1<<27)| (1<<28)| (1<<29)| (1<<30)*/; - #endif #endif - // USB1 #if CFG_TUSB_RHPORT1_MODE Chip_USB1_Init(); - -// // Reset controller -// LPC_USB1->USBCMD_D |= 0x02; -// while( LPC_USB1->USBCMD_D & 0x02 ) {} -// -// // Set mode -// #if CFG_TUSB_RHPORT1_MODE & OPT_MODE_HOST -// LPC_USB1->USBMODE_H = USBMODE_HOST | (USBMODE_VBUS_HIGH << 5); -// #else // TODO OTG -// LPC_USB1->USBMODE_D = USBMODE_DEVICE; -// #endif -// -// // USB1 as fullspeed -// LPC_USB1->PORTSC1_D |= (1<<24); #endif } diff --git a/src/portable/nxp/transdimension/common_transdimension.h b/src/portable/nxp/transdimension/common_transdimension.h new file mode 100644 index 00000000..7b94dac3 --- /dev/null +++ b/src/portable/nxp/transdimension/common_transdimension.h @@ -0,0 +1,136 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2021, Ha Thach (tinyusb.org) + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#ifndef COMMON_TRANSDIMENSION_H_ +#define COMMON_TRANSDIMENSION_H_ + +#ifdef __cplusplus + extern "C" { +#endif + +// USBCMD +enum { + USBCMD_RUN_STOP = TU_BIT(0), + USBCMD_RESET = TU_BIT(1), + USBCMD_SETUP_TRIPWIRE = TU_BIT(13), + USBCMD_ADD_QTD_TRIPWIRE = TU_BIT(14) ///< This bit is used as a semaphore to ensure the to proper addition of a new dTD to an active (primed) endpoint’s linked list. This bit is set and cleared by software during the process of adding a new dTD +// Interrupt Threshold bit 23:16 +}; + +// PORTSC1 +#define PORTSC1_PORT_SPEED_POS 26 + +enum { + PORTSC1_CURRENT_CONNECT_STATUS = TU_BIT(0), + PORTSC1_FORCE_PORT_RESUME = TU_BIT(6), + PORTSC1_SUSPEND = TU_BIT(7), + PORTSC1_FORCE_FULL_SPEED = TU_BIT(24), + PORTSC1_PORT_SPEED = TU_BIT(26) | TU_BIT(27) +}; + +// OTGSC +enum { + OTGSC_VBUS_DISCHARGE = TU_BIT(0), + OTGSC_VBUS_CHARGE = TU_BIT(1), +// OTGSC_HWASSIST_AUTORESET = TU_BIT(2), + OTGSC_OTG_TERMINATION = TU_BIT(3), ///< Must set to 1 when OTG go to device mode + OTGSC_DATA_PULSING = TU_BIT(4), + OTGSC_ID_PULLUP = TU_BIT(5), +// OTGSC_HWASSIT_DATA_PULSE = TU_BIT(6), +// OTGSC_HWASSIT_BDIS_ACONN = TU_BIT(7), + OTGSC_ID = TU_BIT(8), ///< 0 = A device, 1 = B Device + OTGSC_A_VBUS_VALID = TU_BIT(9), + OTGSC_A_SESSION_VALID = TU_BIT(10), + OTGSC_B_SESSION_VALID = TU_BIT(11), + OTGSC_B_SESSION_END = TU_BIT(12), + OTGSC_1MS_TOGGLE = TU_BIT(13), + OTGSC_DATA_BUS_PULSING_STATUS = TU_BIT(14), +}; + +// USBMode +enum { + USBMODE_CM_DEVICE = 2, + USBMODE_CM_HOST = 3, + + USBMODE_SLOM = TU_BIT(3), + USBMODE_SDIS = TU_BIT(4), + + USBMODE_VBUS_POWER_SELECT = TU_BIT(5), // Need to be enabled for LPC18XX/43XX in host mode +}; + +// Device Registers +typedef struct +{ + //------------- ID + HW Parameter Registers-------------// + __I uint32_t TU_RESERVED[64]; ///< For iMX RT10xx, but not used by LPC18XX/LPC43XX + + //------------- Capability Registers-------------// + __I uint8_t CAPLENGTH; ///< Capability Registers Length + __I uint8_t TU_RESERVED[1]; + __I uint16_t HCIVERSION; ///< Host Controller Interface Version + + __I uint32_t HCSPARAMS; ///< Host Controller Structural Parameters + __I uint32_t HCCPARAMS; ///< Host Controller Capability Parameters + __I uint32_t TU_RESERVED[5]; + + __I uint16_t DCIVERSION; ///< Device Controller Interface Version + __I uint8_t TU_RESERVED[2]; + + __I uint32_t DCCPARAMS; ///< Device Controller Capability Parameters + __I uint32_t TU_RESERVED[6]; + + //------------- Operational Registers -------------// + __IO uint32_t USBCMD; ///< USB Command Register + __IO uint32_t USBSTS; ///< USB Status Register + __IO uint32_t USBINTR; ///< Interrupt Enable Register + __IO uint32_t FRINDEX; ///< USB Frame Index + __I uint32_t TU_RESERVED; + __IO uint32_t DEVICEADDR; ///< Device Address + __IO uint32_t ENDPTLISTADDR; ///< Endpoint List Address + __I uint32_t TU_RESERVED; + __IO uint32_t BURSTSIZE; ///< Programmable Burst Size + __IO uint32_t TXFILLTUNING; ///< TX FIFO Fill Tuning + uint32_t TU_RESERVED[4]; + __IO uint32_t ENDPTNAK; ///< Endpoint NAK + __IO uint32_t ENDPTNAKEN; ///< Endpoint NAK Enable + __I uint32_t TU_RESERVED; + __IO uint32_t PORTSC1; ///< Port Status & Control + __I uint32_t TU_RESERVED[7]; + __IO uint32_t OTGSC; ///< On-The-Go Status & control + __IO uint32_t USBMODE; ///< USB Device Mode + __IO uint32_t ENDPTSETUPSTAT; ///< Endpoint Setup Status + __IO uint32_t ENDPTPRIME; ///< Endpoint Prime + __IO uint32_t ENDPTFLUSH; ///< Endpoint Flush + __I uint32_t ENDPTSTAT; ///< Endpoint Status + __IO uint32_t ENDPTCOMPLETE; ///< Endpoint Complete + __IO uint32_t ENDPTCTRL[8]; ///< Endpoint Control 0 - 7 +} dcd_registers_t; + +#ifdef __cplusplus + } +#endif + +#endif /* COMMON_TRANSDIMENSION_H_ */ diff --git a/src/portable/nxp/transdimension/dcd_transdimension.c b/src/portable/nxp/transdimension/dcd_transdimension.c index 6f1923ec..afc7184a 100644 --- a/src/portable/nxp/transdimension/dcd_transdimension.c +++ b/src/portable/nxp/transdimension/dcd_transdimension.c @@ -32,9 +32,6 @@ //--------------------------------------------------------------------+ // INCLUDE //--------------------------------------------------------------------+ -#include "common/tusb_common.h" -#include "device/dcd.h" - #if CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX #include "fsl_device_registers.h" #else @@ -42,6 +39,10 @@ #include "chip.h" #endif +#include "common/tusb_common.h" +#include "device/dcd.h" +#include "common_transdimension.h" + #if defined(__CORTEX_M) && __CORTEX_M == 7 && __DCACHE_PRESENT == 1 #define CleanInvalidateDCache_by_Addr SCB_CleanInvalidateDCache_by_Addr #else @@ -60,15 +61,6 @@ enum { ENDPTCTRL_ENABLE = TU_BIT(7) }; -// USBCMD -enum { - USBCMD_RUN_STOP = TU_BIT(0), - USBCMD_RESET = TU_BIT(1), - USBCMD_SETUP_TRIPWIRE = TU_BIT(13), - USBCMD_ADD_QTD_TRIPWIRE = TU_BIT(14) ///< This bit is used as a semaphore to ensure the to proper addition of a new dTD to an active (primed) endpoint’s linked list. This bit is set and cleared by software during the process of adding a new dTD -}; -// Interrupt Threshold bit 23:16 - // USBSTS, USBINTR enum { INTR_USB = TU_BIT(0), @@ -80,96 +72,6 @@ enum { INTR_NAK = TU_BIT(16) }; -// PORTSC1 -#define PORTSC1_PORT_SPEED_POS 26 - -enum { - PORTSC1_CURRENT_CONNECT_STATUS = TU_BIT(0), - PORTSC1_FORCE_PORT_RESUME = TU_BIT(6), - PORTSC1_SUSPEND = TU_BIT(7), - PORTSC1_FORCE_FULL_SPEED = TU_BIT(24), - PORTSC1_PORT_SPEED = TU_BIT(26) | TU_BIT(27) -}; - -// OTGSC -enum { - OTGSC_VBUS_DISCHARGE = TU_BIT(0), - OTGSC_VBUS_CHARGE = TU_BIT(1), -// OTGSC_HWASSIST_AUTORESET = TU_BIT(2), - OTGSC_OTG_TERMINATION = TU_BIT(3), ///< Must set to 1 when OTG go to device mode - OTGSC_DATA_PULSING = TU_BIT(4), - OTGSC_ID_PULLUP = TU_BIT(5), -// OTGSC_HWASSIT_DATA_PULSE = TU_BIT(6), -// OTGSC_HWASSIT_BDIS_ACONN = TU_BIT(7), - OTGSC_ID = TU_BIT(8), ///< 0 = A device, 1 = B Device - OTGSC_A_VBUS_VALID = TU_BIT(9), - OTGSC_A_SESSION_VALID = TU_BIT(10), - OTGSC_B_SESSION_VALID = TU_BIT(11), - OTGSC_B_SESSION_END = TU_BIT(12), - OTGSC_1MS_TOGGLE = TU_BIT(13), - OTGSC_DATA_BUS_PULSING_STATUS = TU_BIT(14), -}; - -// USBMode -enum { - USBMODE_CM_DEVICE = 2, - USBMODE_CM_HOST = 3, - - USBMODE_SLOM = TU_BIT(3), - USBMODE_SDIS = TU_BIT(4), - - USBMODE_VBUS_POWER_SELCT = TU_BIT(5), // Enable for LPC18XX/43XX in host most only -}; - -// Device Registers -typedef struct -{ - //------------- ID + HW Parameter Registers-------------// - __I uint32_t TU_RESERVED[64]; ///< For iMX RT10xx, but not used by LPC18XX/LPC43XX - - //------------- Capability Registers-------------// - __I uint8_t CAPLENGTH; ///< Capability Registers Length - __I uint8_t TU_RESERVED[1]; - __I uint16_t HCIVERSION; ///< Host Controller Interface Version - - __I uint32_t HCSPARAMS; ///< Host Controller Structural Parameters - __I uint32_t HCCPARAMS; ///< Host Controller Capability Parameters - __I uint32_t TU_RESERVED[5]; - - __I uint16_t DCIVERSION; ///< Device Controller Interface Version - __I uint8_t TU_RESERVED[2]; - - __I uint32_t DCCPARAMS; ///< Device Controller Capability Parameters - __I uint32_t TU_RESERVED[6]; - - //------------- Operational Registers -------------// - __IO uint32_t USBCMD; ///< USB Command Register - __IO uint32_t USBSTS; ///< USB Status Register - __IO uint32_t USBINTR; ///< Interrupt Enable Register - __IO uint32_t FRINDEX; ///< USB Frame Index - __I uint32_t TU_RESERVED; - __IO uint32_t DEVICEADDR; ///< Device Address - __IO uint32_t ENDPTLISTADDR; ///< Endpoint List Address - __I uint32_t TU_RESERVED; - __IO uint32_t BURSTSIZE; ///< Programmable Burst Size - __IO uint32_t TXFILLTUNING; ///< TX FIFO Fill Tuning - uint32_t TU_RESERVED[4]; - __IO uint32_t ENDPTNAK; ///< Endpoint NAK - __IO uint32_t ENDPTNAKEN; ///< Endpoint NAK Enable - __I uint32_t TU_RESERVED; - __IO uint32_t PORTSC1; ///< Port Status & Control - __I uint32_t TU_RESERVED[7]; - __IO uint32_t OTGSC; ///< On-The-Go Status & control - __IO uint32_t USBMODE; ///< USB Device Mode - __IO uint32_t ENDPTSETUPSTAT; ///< Endpoint Setup Status - __IO uint32_t ENDPTPRIME; ///< Endpoint Prime - __IO uint32_t ENDPTFLUSH; ///< Endpoint Flush - __I uint32_t ENDPTSTAT; ///< Endpoint Status - __IO uint32_t ENDPTCOMPLETE; ///< Endpoint Complete - __IO uint32_t ENDPTCTRL[8]; ///< Endpoint Control 0 - 7 -} dcd_registers_t; - - // Queue Transfer Descriptor typedef struct { @@ -279,7 +181,7 @@ CFG_TUSB_MEM_SECTION TU_ATTR_ALIGNED(2048) static dcd_data_t _dcd_data; //--------------------------------------------------------------------+ -// CONTROLLER API +// Controller API //--------------------------------------------------------------------+ /// follows LPC43xx User Manual 23.10.3 diff --git a/src/portable/nxp/transdimension/hcd_transdimension.c b/src/portable/nxp/transdimension/hcd_transdimension.c index 62b14364..e6b7afe8 100644 --- a/src/portable/nxp/transdimension/hcd_transdimension.c +++ b/src/portable/nxp/transdimension/hcd_transdimension.c @@ -31,6 +31,9 @@ #if TUSB_OPT_HOST_ENABLED && \ (CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX) +//--------------------------------------------------------------------+ +// INCLUDE +//--------------------------------------------------------------------+ #if CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX #include "fsl_device_registers.h" #else @@ -38,9 +41,17 @@ #include "chip.h" #endif +#include "common/tusb_common.h" +#include "common_transdimension.h" + +//--------------------------------------------------------------------+ +// MACRO CONSTANT TYPEDEF +//--------------------------------------------------------------------+ + +// TODO can be merged with dcd_controller_t typedef struct { - uint32_t regs_addr; // registers base + uint32_t regs_base; // registers base const IRQn_Type irqnum; // IRQ number }hcd_controller_t; @@ -49,27 +60,49 @@ typedef struct { // RT1010 and RT1020 only has 1 USB controller #if FSL_FEATURE_SOC_USBHS_COUNT == 1 - { .regs_addr = (uint32_t) &USB->USBCMD , .irqnum = USB_OTG1_IRQn } + { .regs_base = USB_BASE , .irqnum = USB_OTG1_IRQn } #else - { .regs_addr = (uint32_t) &USB1->USBCMD, .irqnum = USB_OTG1_IRQn }, - { .regs_addr = (uint32_t) &USB2->USBCMD, .irqnum = USB_OTG2_IRQn } + { .regs_base = USB1_BASE, .irqnum = USB_OTG1_IRQn }, + { .regs_base = USB2_BASE, .irqnum = USB_OTG2_IRQn } #endif }; #else static const hcd_controller_t _hcd_controller[] = { - { .regs_addr = (uint32_t) &LPC_USB0->USBCMD_H, .irqnum = USB0_IRQn }, - { .regs_addr = (uint32_t) &LPC_USB1->USBCMD_H, .irqnum = USB1_IRQn } + { .regs_base = LPC_USB0_BASE, .irqnum = USB0_IRQn }, + { .regs_base = LPC_USB1_BASE, .irqnum = USB1_IRQn } }; #endif - // TODO better prototype later extern bool hcd_ehci_init (uint8_t rhport); // from ehci.c +//--------------------------------------------------------------------+ +// Controller API +//--------------------------------------------------------------------+ + bool hcd_init(uint8_t rhport) { + dcd_registers_t* dcd_reg = (dcd_registers_t*) _hcd_controller[rhport].regs_base; + + // Reset controller + dcd_reg->USBCMD |= USBCMD_RESET; + while( dcd_reg->USBCMD & USBCMD_RESET ) {} + + // Set mode to device, must be set immediately after reset +#if CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_LPC43XX + // LPC18XX/43XX need to set VBUS Power Select to HIGH + // RHPORT1 is fullspeed only (need external PHY for Highspeed) + dcd_reg->USBMODE = USBMODE_CM_HOST | USBMODE_VBUS_POWER_SELECT; + if (rhport == 1) dcd_reg->PORTSC1 |= PORTSC1_FORCE_FULL_SPEED; +#else + dcd_reg->USBMODE = USBMODE_CM_HOST; +#endif + + // FIXME force full speed, still have issue with Highspeed enumeration + dcd_reg->PORTSC1 |= PORTSC1_FORCE_FULL_SPEED; + return hcd_ehci_init(rhport); } @@ -85,7 +118,10 @@ void hcd_int_disable(uint8_t rhport) uint32_t hcd_ehci_register_addr(uint8_t rhport) { - return _hcd_controller[rhport].regs_addr; + dcd_registers_t* hcd_reg = (dcd_registers_t*) _hcd_controller[rhport].regs_base; + + // EHCI USBCMD has same address within dcd_register_t + return (uint32_t) &hcd_reg->USBCMD; } #endif From ebc6253bd47ca7a38fe802ee161774938deb3e3b Mon Sep 17 00:00:00 2001 From: hathach Date: Tue, 23 Feb 2021 10:20:11 +0700 Subject: [PATCH 07/14] rt1011 msc host work --- hw/bsp/imxrt/family.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/hw/bsp/imxrt/family.c b/hw/bsp/imxrt/family.c index 9dff104f..c6b1a315 100644 --- a/hw/bsp/imxrt/family.c +++ b/hw/bsp/imxrt/family.c @@ -82,10 +82,15 @@ void board_init(void) LPUART_Init(UART_PORT, &uart_config, (CLOCK_GetPllFreq(kCLOCK_PllUsb1) / 6U) / (CLOCK_GetDiv(kCLOCK_UartDiv) + 1U)); //------------- USB0 -------------// + // Clock CLOCK_EnableUsbhs0PhyPllClock(kCLOCK_Usbphy480M, 480000000U); CLOCK_EnableUsbhs0Clock(kCLOCK_Usb480M, 480000000U); + // USB1 +// CLOCK_EnableUsbhs1PhyPllClock(kCLOCK_Usbphy480M, 480000000U); +// CLOCK_EnableUsbhs1Clock(kCLOCK_Usb480M, 480000000U); + USBPHY_Type* usb_phy; // RT105x RT106x have dual USB controller. TODO support USB2 @@ -106,10 +111,6 @@ void board_init(void) phytx &= ~(USBPHY_TX_D_CAL_MASK | USBPHY_TX_TXCAL45DM_MASK | USBPHY_TX_TXCAL45DP_MASK); phytx |= USBPHY_TX_D_CAL(0x0C) | USBPHY_TX_TXCAL45DP(0x06) | USBPHY_TX_TXCAL45DM(0x06); usb_phy->TX = phytx; - - // USB1 -// CLOCK_EnableUsbhs1PhyPllClock(kCLOCK_Usbphy480M, 480000000U); -// CLOCK_EnableUsbhs1Clock(kCLOCK_Usb480M, 480000000U); } //--------------------------------------------------------------------+ From f2ed2ae09a480835eacf049d8959b3c904713be7 Mon Sep 17 00:00:00 2001 From: hathach Date: Tue, 23 Feb 2021 11:14:19 +0700 Subject: [PATCH 08/14] rename tuh_msc_scsi_inquiry() to tuh_msc_inquiry() --- examples/host/cdc_msc_hid/src/msc_app.c | 2 +- src/class/msc/msc_host.c | 2 +- src/class/msc/msc_host.h | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/examples/host/cdc_msc_hid/src/msc_app.c b/examples/host/cdc_msc_hid/src/msc_app.c index a45fba73..5e2ea308 100644 --- a/examples/host/cdc_msc_hid/src/msc_app.c +++ b/examples/host/cdc_msc_hid/src/msc_app.c @@ -82,7 +82,7 @@ void tuh_msc_mounted_cb(uint8_t dev_addr) block_size = block_count = 0; uint8_t const lun = 0; - tuh_msc_scsi_inquiry(dev_addr, lun, &inquiry_resp, inquiry_complete_cb); + tuh_msc_inquiry(dev_addr, lun, &inquiry_resp, inquiry_complete_cb); // // //------------- file system (only 1 LUN support) -------------// // uint8_t phy_disk = dev_addr-1; diff --git a/src/class/msc/msc_host.c b/src/class/msc/msc_host.c index 02ca81e7..9a44d063 100644 --- a/src/class/msc/msc_host.c +++ b/src/class/msc/msc_host.c @@ -139,7 +139,7 @@ bool tuh_msc_read_capacity(uint8_t dev_addr, uint8_t lun, scsi_read_capacity10_r return tuh_msc_scsi_command(dev_addr, &cbw, response, complete_cb); } -bool tuh_msc_scsi_inquiry(uint8_t dev_addr, uint8_t lun, scsi_inquiry_resp_t* response, tuh_msc_complete_cb_t complete_cb) +bool tuh_msc_inquiry(uint8_t dev_addr, uint8_t lun, scsi_inquiry_resp_t* response, tuh_msc_complete_cb_t complete_cb) { msc_cbw_t cbw = { 0 }; diff --git a/src/class/msc/msc_host.h b/src/class/msc/msc_host.h index 5913350b..61f6e6a2 100644 --- a/src/class/msc/msc_host.h +++ b/src/class/msc/msc_host.h @@ -70,7 +70,7 @@ uint8_t tuh_msc_get_maxlun(uint8_t dev_addr); bool tuh_msc_scsi_command(uint8_t dev_addr, msc_cbw_t const* cbw, void* data, tuh_msc_complete_cb_t complete_cb); // Carry out SCSI INQUIRY command in non-blocking manner. -bool tuh_msc_scsi_inquiry(uint8_t dev_addr, uint8_t lun, scsi_inquiry_resp_t* response, tuh_msc_complete_cb_t complete_cb); +bool tuh_msc_inquiry(uint8_t dev_addr, uint8_t lun, scsi_inquiry_resp_t* response, tuh_msc_complete_cb_t complete_cb); // Carry out SCSI REQUEST SENSE (10) command in non-blocking manner. bool tuh_msc_test_unit_ready(uint8_t dev_addr, uint8_t lun, tuh_msc_complete_cb_t complete_cb); From ade4bf74ea7343bcebff4c1b2bbd1ebaac9009c0 Mon Sep 17 00:00:00 2001 From: hathach Date: Tue, 23 Feb 2021 11:38:15 +0700 Subject: [PATCH 09/14] update function comment --- src/class/msc/msc_host.h | 21 +++++++-------------- 1 file changed, 7 insertions(+), 14 deletions(-) diff --git a/src/class/msc/msc_host.h b/src/class/msc/msc_host.h index 61f6e6a2..3d196370 100644 --- a/src/class/msc/msc_host.h +++ b/src/class/msc/msc_host.h @@ -51,34 +51,27 @@ typedef bool (*tuh_msc_complete_cb_t)(uint8_t dev_addr, msc_cbw_t const* cbw, ms // This function true after tuh_msc_mounted_cb() and false after tuh_msc_unmounted_cb() bool tuh_msc_mounted(uint8_t dev_addr); -/** \brief Check if the interface is currently busy or not - * \param[in] dev_addr device address - * \retval true if the interface is busy meaning the stack is still transferring/waiting data from/to device - * \retval false if the interface is not busy meaning the stack successfully transferred data from/to device - * \note This function is used to check if previous transfer is complete (success or error), so that the next transfer - * can be scheduled. User needs to make sure the corresponding interface is mounted (by \ref tuh_msc_is_mounted) - * before calling this function - */ -bool tuh_msc_is_busy(uint8_t dev_addr); +// Check if the interface is currently busy transferring data +bool tuh_msc_is_busy(uint8_t dev_addr); // Get Max Lun uint8_t tuh_msc_get_maxlun(uint8_t dev_addr); -// Carry out a full SCSI command (cbw, data, csw) in non-blocking manner. +// Perform a full SCSI command (cbw, data, csw) in non-blocking manner. // `complete_cb` callback is invoked when SCSI op is complete. // return true if success, false if there is already pending operation. bool tuh_msc_scsi_command(uint8_t dev_addr, msc_cbw_t const* cbw, void* data, tuh_msc_complete_cb_t complete_cb); -// Carry out SCSI INQUIRY command in non-blocking manner. +// Perform SCSI Inquiry command bool tuh_msc_inquiry(uint8_t dev_addr, uint8_t lun, scsi_inquiry_resp_t* response, tuh_msc_complete_cb_t complete_cb); -// Carry out SCSI REQUEST SENSE (10) command in non-blocking manner. +// Perform SCSI Test Unit Ready command bool tuh_msc_test_unit_ready(uint8_t dev_addr, uint8_t lun, tuh_msc_complete_cb_t complete_cb); -// Carry out SCSI REQUEST SENSE (10) command in non-blocking manner. +// Perform SCSI Request Sense (10) command bool tuh_msc_request_sense(uint8_t dev_addr, uint8_t lun, void *resposne, tuh_msc_complete_cb_t complete_cb); -// Carry out SCSI READ CAPACITY (10) command in non-blocking manner. +// Perform SCSI Read Capacity (10) command bool tuh_msc_read_capacity(uint8_t dev_addr, uint8_t lun, scsi_read_capacity10_resp_t* response, tuh_msc_complete_cb_t complete_cb); #if 0 From 386a386345fbaa1a9c63a4346c2d946fe015da72 Mon Sep 17 00:00:00 2001 From: hathach Date: Tue, 23 Feb 2021 12:20:30 +0700 Subject: [PATCH 10/14] clean up host msc --- src/class/msc/msc_host.c | 91 +++++++++++++++++++--------------------- src/class/msc/msc_host.h | 36 ++++++---------- 2 files changed, 56 insertions(+), 71 deletions(-) diff --git a/src/class/msc/msc_host.c b/src/class/msc/msc_host.c index ce3693dc..943dc541 100644 --- a/src/class/msc/msc_host.c +++ b/src/class/msc/msc_host.c @@ -99,11 +99,12 @@ bool tuh_msc_is_busy(uint8_t dev_addr) //--------------------------------------------------------------------+ // PUBLIC API: SCSI COMMAND //--------------------------------------------------------------------+ -static inline void msc_cbw_add_signature(msc_cbw_t *p_cbw, uint8_t lun) +static inline void cbw_init(msc_cbw_t *cbw, uint8_t lun) { - p_cbw->signature = MSC_CBW_SIGNATURE; - p_cbw->tag = 0x54555342; // TUSB - p_cbw->lun = lun; + tu_memclr(cbw, sizeof(msc_cbw_t)); + cbw->signature = MSC_CBW_SIGNATURE; + cbw->tag = 0x54555342; // TUSB + cbw->lun = lun; } bool tuh_msc_scsi_command(uint8_t dev_addr, msc_cbw_t const* cbw, void* data, tuh_msc_complete_cb_t complete_cb) @@ -126,11 +127,11 @@ bool tuh_msc_scsi_command(uint8_t dev_addr, msc_cbw_t const* cbw, void* data, tu bool tuh_msc_read_capacity(uint8_t dev_addr, uint8_t lun, scsi_read_capacity10_resp_t* response, tuh_msc_complete_cb_t complete_cb) { msch_interface_t* p_msc = get_itf(dev_addr); - if ( !p_msc->mounted ) return false; + TU_VERIFY(p_msc->mounted); - msc_cbw_t cbw = { 0 }; + msc_cbw_t cbw; + cbw_init(&cbw, lun); - msc_cbw_add_signature(&cbw, lun); cbw.total_bytes = sizeof(scsi_read_capacity10_resp_t); cbw.dir = TUSB_DIR_IN_MASK; cbw.cmd_len = sizeof(scsi_read_capacity10_t); @@ -141,9 +142,9 @@ bool tuh_msc_read_capacity(uint8_t dev_addr, uint8_t lun, scsi_read_capacity10_r bool tuh_msc_inquiry(uint8_t dev_addr, uint8_t lun, scsi_inquiry_resp_t* response, tuh_msc_complete_cb_t complete_cb) { - msc_cbw_t cbw = { 0 }; + msc_cbw_t cbw; + cbw_init(&cbw, lun); - msc_cbw_add_signature(&cbw, lun); cbw.total_bytes = sizeof(scsi_inquiry_resp_t); cbw.dir = TUSB_DIR_IN_MASK; cbw.cmd_len = sizeof(scsi_inquiry_t); @@ -160,8 +161,8 @@ bool tuh_msc_inquiry(uint8_t dev_addr, uint8_t lun, scsi_inquiry_resp_t* respons bool tuh_msc_test_unit_ready(uint8_t dev_addr, uint8_t lun, tuh_msc_complete_cb_t complete_cb) { - msc_cbw_t cbw = { 0 }; - msc_cbw_add_signature(&cbw, lun); + msc_cbw_t cbw; + cbw_init(&cbw, lun); cbw.total_bytes = 0; // Number of bytes cbw.dir = TUSB_DIR_OUT; @@ -174,8 +175,8 @@ bool tuh_msc_test_unit_ready(uint8_t dev_addr, uint8_t lun, tuh_msc_complete_cb_ bool tuh_msc_request_sense(uint8_t dev_addr, uint8_t lun, void *resposne, tuh_msc_complete_cb_t complete_cb) { - msc_cbw_t cbw = { 0 }; - msc_cbw_add_signature(&cbw, lun); + msc_cbw_t cbw; + cbw_init(&cbw, lun); cbw.total_bytes = 18; // TODO sense response cbw.dir = TUSB_DIR_IN_MASK; @@ -192,58 +193,52 @@ bool tuh_msc_request_sense(uint8_t dev_addr, uint8_t lun, void *resposne, tuh_ms return tuh_msc_scsi_command(dev_addr, &cbw, resposne, complete_cb); } -bool tuh_msc_read10(uint8_t dev_addr, uint8_t lun, void * p_buffer, uint32_t lba, uint16_t block_count, tuh_msc_complete_cb_t complete_cb) +bool tuh_msc_read10(uint8_t dev_addr, uint8_t lun, void * buffer, uint32_t lba, uint16_t block_count, tuh_msc_complete_cb_t complete_cb) { msch_interface_t* p_msc = get_itf(dev_addr); - if ( !p_msc->mounted ){ return false;}; + TU_VERIFY(p_msc->mounted); - msc_cbw_t cbw = { 0 }; + msc_cbw_t cbw; + cbw_init(&cbw, lun); - //------------- Command Block Wrapper -------------// - msc_cbw_add_signature(&cbw, lun); - - cbw.total_bytes = 512*block_count; // Number of bytes + cbw.total_bytes = 512*block_count; // Number of bytes TODO get block size from READ CAPACITY 10 cbw.dir = TUSB_DIR_IN_MASK; cbw.cmd_len = sizeof(scsi_read10_t); - //------------- SCSI command -------------// scsi_read10_t cmd_read10 = { - .cmd_code = SCSI_CMD_READ_10, - .lba = tu_htonl(lba), - .block_count = tu_htons(block_count) + .cmd_code = SCSI_CMD_READ_10, + .lba = tu_htonl(lba), + .block_count = tu_htons(block_count) }; memcpy(cbw.command, &cmd_read10, cbw.cmd_len); - return tuh_msc_scsi_command(dev_addr, &cbw, p_buffer, complete_cb); + return tuh_msc_scsi_command(dev_addr, &cbw, buffer, complete_cb); } -bool tuh_msc_write10(uint8_t dev_addr, uint8_t lun, void * p_buffer, uint32_t lba, uint16_t block_count, tuh_msc_complete_cb_t complete_cb) +bool tuh_msc_write10(uint8_t dev_addr, uint8_t lun, void const * buffer, uint32_t lba, uint16_t block_count, tuh_msc_complete_cb_t complete_cb) { - msch_interface_t* p_msc = get_itf(dev_addr); - if ( !p_msc->mounted ){ return false;}; - - msc_cbw_t cbw = { 0 }; - - //------------- Command Block Wrapper -------------// - msc_cbw_add_signature(&cbw, lun); - - cbw.total_bytes = 512*block_count; // Number of bytes - cbw.dir = TUSB_DIR_OUT; - cbw.cmd_len = sizeof(scsi_write10_t); + msch_interface_t* p_msc = get_itf(dev_addr); + TU_VERIFY(p_msc->mounted); - //------------- SCSI command -------------// - scsi_write10_t cmd_write10 = - { - .cmd_code = SCSI_CMD_WRITE_10, - .lba = tu_htonl(lba), - .block_count = tu_htons(block_count) - }; - - memcpy(cbw.command, &cmd_write10, cbw.cmd_len); - - return tuh_msc_scsi_command(dev_addr, &cbw, p_buffer, complete_cb); + msc_cbw_t cbw; + cbw_init(&cbw, lun); + + cbw.total_bytes = 512*block_count; // Number of bytes TODO get block size from READ CAPACITY 10 + cbw.dir = TUSB_DIR_OUT; + cbw.cmd_len = sizeof(scsi_write10_t); + + scsi_write10_t cmd_write10 = + { + .cmd_code = SCSI_CMD_WRITE_10, + .lba = tu_htonl(lba), + .block_count = tu_htons(block_count) + }; + + memcpy(cbw.command, &cmd_write10, cbw.cmd_len); + + return tuh_msc_scsi_command(dev_addr, &cbw, (void*) buffer, complete_cb); } #if 0 diff --git a/src/class/msc/msc_host.h b/src/class/msc/msc_host.h index d80e3e44..b6ead28c 100644 --- a/src/class/msc/msc_host.h +++ b/src/class/msc/msc_host.h @@ -58,43 +58,33 @@ bool tuh_msc_is_busy(uint8_t dev_addr); uint8_t tuh_msc_get_maxlun(uint8_t dev_addr); // Perform a full SCSI command (cbw, data, csw) in non-blocking manner. -// `complete_cb` callback is invoked when SCSI op is complete. +// Complete callback is invoked when SCSI op is complete. // return true if success, false if there is already pending operation. bool tuh_msc_scsi_command(uint8_t dev_addr, msc_cbw_t const* cbw, void* data, tuh_msc_complete_cb_t complete_cb); // Perform SCSI Inquiry command +// Complete callback is invoked when SCSI op is complete. bool tuh_msc_inquiry(uint8_t dev_addr, uint8_t lun, scsi_inquiry_resp_t* response, tuh_msc_complete_cb_t complete_cb); // Perform SCSI Test Unit Ready command +// Complete callback is invoked when SCSI op is complete. bool tuh_msc_test_unit_ready(uint8_t dev_addr, uint8_t lun, tuh_msc_complete_cb_t complete_cb); -// Perform SCSI Request Sense (10) command +// Perform SCSI Request Sense 10 command +// Complete callback is invoked when SCSI op is complete. bool tuh_msc_request_sense(uint8_t dev_addr, uint8_t lun, void *resposne, tuh_msc_complete_cb_t complete_cb); -// Perform SCSI Read Capacity (10) command +// Perform SCSI Read Capacity 10 command +// Complete callback is invoked when SCSI op is complete. bool tuh_msc_read_capacity(uint8_t dev_addr, uint8_t lun, scsi_read_capacity10_resp_t* response, tuh_msc_complete_cb_t complete_cb); -/** \brief Perform SCSI READ 10 command to read data from MassStorage device - * \param[in] dev_addr device address - * \param[in] lun Targeted Logical Unit - * \param[out] p_buffer Buffer used to store data read from device. Must be accessible by USB controller (see \ref CFG_TUSB_MEM_SECTION) - * \param[in] lba Starting Logical Block Address to be read - * \param[in] block_count Number of Block to be read - * \retval true on success - * \note This function is non-blocking and returns immediately. The result of USB transfer will be reported by \ref complete_cb callback function - */ -bool tuh_msc_read10(uint8_t dev_addr, uint8_t lun, void * p_buffer, uint32_t lba, uint16_t block_count, tuh_msc_complete_cb_t complete_cb); +// Perform SCSI Read 10 command. Read n blocks starting from LBA to buffer +// Complete callback is invoked when SCSI op is complete. +bool tuh_msc_read10(uint8_t dev_addr, uint8_t lun, void * buffer, uint32_t lba, uint16_t block_count, tuh_msc_complete_cb_t complete_cb); -/** \brief Perform SCSI WRITE 10 command to write data to MassStorage device - * \param[in] dev_addr device address - * \param[in] lun Targeted Logical Unit - * \param[in] p_buffer Buffer containing data. Must be accessible by USB controller (see \ref CFG_TUSB_MEM_SECTION) - * \param[in] lba Starting Logical Block Address to be written - * \param[in] block_count Number of Block to be written - * \retval true on success - * \note This function is non-blocking and returns immediately. The result of USB transfer will be reported by \ref complete_cb callback function - */ -bool tuh_msc_write10(uint8_t dev_addr, uint8_t lun, void * p_buffer, uint32_t lba, uint16_t block_count, tuh_msc_complete_cb_t complete_cb); +// Perform SCSI Write 10 command. Write n blocks starting from LBA to device +// Complete callback is invoked when SCSI op is complete. +bool tuh_msc_write10(uint8_t dev_addr, uint8_t lun, void const * buffer, uint32_t lba, uint16_t block_count, tuh_msc_complete_cb_t complete_cb); //------------- Application Callback -------------// From 5108d7613600449c50af9e8ce373571d56bed3cc Mon Sep 17 00:00:00 2001 From: hathach Date: Tue, 23 Feb 2021 19:41:11 +0700 Subject: [PATCH 11/14] host msc: call read_capacity as part of enumeration - add tuh_msc_get_block_count(), tuh_msc_get_block_size() - rename tuh_msc_mounted_cb/tuh_msc_unmounted_cb to tuh_msc_mount_cb/tuh_msc_unmount_cb to match device stack naming - change tuh_msc_is_busy() to tuh_msc_ready() - add CFG_TUH_MSC_MAXLUN (default to 4) to hold lun capacities - add host msc configured to for state check. --- examples/host/cdc_msc_hid/src/msc_app.c | 46 ++------ examples/obsolete/host/src/msc_host_app.c | 4 +- lib/fatfs/diskio.c | 2 +- src/class/msc/msc_host.c | 133 +++++++++++++++------- src/class/msc/msc_host.h | 33 ++++-- 5 files changed, 125 insertions(+), 93 deletions(-) diff --git a/examples/host/cdc_msc_hid/src/msc_app.c b/examples/host/cdc_msc_hid/src/msc_app.c index 5e2ea308..623141ea 100644 --- a/examples/host/cdc_msc_hid/src/msc_app.c +++ b/examples/host/cdc_msc_hid/src/msc_app.c @@ -31,31 +31,6 @@ // MACRO TYPEDEF CONSTANT ENUM DECLARATION //--------------------------------------------------------------------+ static scsi_inquiry_resp_t inquiry_resp; -static scsi_read_capacity10_resp_t capacity_resp; - -uint32_t block_size; -uint32_t block_count; - -bool capacity_complete_cb(uint8_t dev_addr, msc_cbw_t const* cbw, msc_csw_t const* csw) -{ - (void) dev_addr; - (void) cbw; - - if (csw->status != 0) - { - printf("Read Capacity (10) failed\r\n"); - return false; - } - - // Capacity response field: Block size and Last LBA are both Big-Endian - block_count = tu_ntohl(capacity_resp.last_lba) + 1; - block_size = tu_ntohl(capacity_resp.block_size); - - printf("Disk Size: %lu MB\r\n", block_count / ((1024*1024)/block_size)); - printf("Block Count = %lu, Block Size: %lu\r\n", block_count, block_size); - - return true; -} bool inquiry_complete_cb(uint8_t dev_addr, msc_cbw_t const* cbw, msc_csw_t const* csw) { @@ -68,19 +43,21 @@ bool inquiry_complete_cb(uint8_t dev_addr, msc_cbw_t const* cbw, msc_csw_t const // Print out Vendor ID, Product ID and Rev printf("%.8s %.16s rev %.4s\r\n", inquiry_resp.vendor_id, inquiry_resp.product_id, inquiry_resp.product_rev); - // Read capacity of device - tuh_msc_read_capacity(dev_addr, cbw->lun, &capacity_resp, capacity_complete_cb); + // Get capacity of device + uint32_t const block_count = tuh_msc_get_block_count(dev_addr, cbw->lun); + uint32_t const block_size = tuh_msc_get_block_size(dev_addr, cbw->lun); + + printf("Disk Size: %lu MB\r\n", block_count / ((1024*1024)/block_size)); + printf("Block Count = %lu, Block Size: %lu\r\n", block_count, block_size); return true; } //------------- IMPLEMENTATION -------------// -void tuh_msc_mounted_cb(uint8_t dev_addr) +void tuh_msc_mount_cb(uint8_t dev_addr) { printf("A MassStorage device is mounted\r\n"); - block_size = block_count = 0; - uint8_t const lun = 0; tuh_msc_inquiry(dev_addr, lun, &inquiry_resp, inquiry_complete_cb); // @@ -110,7 +87,7 @@ void tuh_msc_mounted_cb(uint8_t dev_addr) // } } -void tuh_msc_unmounted_cb(uint8_t dev_addr) +void tuh_msc_unmount_cb(uint8_t dev_addr) { (void) dev_addr; printf("A MassStorage device is unmounted\r\n"); @@ -133,11 +110,4 @@ void tuh_msc_unmounted_cb(uint8_t dev_addr) // } } -//void tuh_msc_scsi_complete_cb(uint8_t dev_addr, msc_cbw_t const* cbw, msc_csw_t const* csw) -//{ -// (void) dev_addr; -// (void) cbw; -// (void) csw; -//} - #endif diff --git a/examples/obsolete/host/src/msc_host_app.c b/examples/obsolete/host/src/msc_host_app.c index 8afb6ede..5399e662 100644 --- a/examples/obsolete/host/src/msc_host_app.c +++ b/examples/obsolete/host/src/msc_host_app.c @@ -48,7 +48,7 @@ CFG_TUSB_MEM_SECTION static FATFS fatfs[CFG_TUSB_HOST_DEVICE_MAX]; //--------------------------------------------------------------------+ // tinyusb callbacks //--------------------------------------------------------------------+ -void tuh_msc_mounted_cb(uint8_t dev_addr) +void tuh_msc_mount_cb(uint8_t dev_addr) { puts("\na MassStorage device is mounted"); @@ -94,7 +94,7 @@ void tuh_msc_mounted_cb(uint8_t dev_addr) } } -void tuh_msc_unmounted_cb(uint8_t dev_addr) +void tuh_msc_unmount_cb(uint8_t dev_addr) { puts("\na MassStorage device is unmounted"); diff --git a/lib/fatfs/diskio.c b/lib/fatfs/diskio.c index 38503148..401f583a 100644 --- a/lib/fatfs/diskio.c +++ b/lib/fatfs/diskio.c @@ -48,7 +48,7 @@ static DSTATUS disk_state[CFG_TUSB_HOST_DEVICE_MAX]; static DRESULT wait_for_io_complete(uint8_t usb_addr) { // TODO with RTOS, this should use semaphore instead of blocking - while ( tuh_msc_is_busy(usb_addr) ) + while ( !tuh_msc_ready(usb_addr) ) { // TODO should have timeout here #if CFG_TUSB_OS != OPT_OS_NONE diff --git a/src/class/msc/msc_host.c b/src/class/msc/msc_host.c index 943dc541..34dbec2e 100644 --- a/src/class/msc/msc_host.c +++ b/src/class/msc/msc_host.c @@ -47,14 +47,21 @@ enum typedef struct { - uint8_t itf_num; - uint8_t ep_in; - uint8_t ep_out; + uint8_t itf_num; + uint8_t ep_in; + uint8_t ep_out; - uint8_t max_lun; + uint8_t max_lun; - volatile bool mounted; + volatile bool configured; // Receive SET_CONFIGURE + volatile bool mounted; // Enumeration is complete + struct { + uint32_t block_size; + uint32_t block_count; + } capacity[CFG_TUH_MSC_MAXLUN]; + + //------------- SCSI -------------// uint8_t stage; void* buffer; tuh_msc_complete_cb_t complete_cb; @@ -63,14 +70,15 @@ typedef struct msc_csw_t csw; }msch_interface_t; -CFG_TUSB_MEM_SECTION static msch_interface_t msch_data[CFG_TUSB_HOST_DEVICE_MAX]; +CFG_TUSB_MEM_SECTION static msch_interface_t _msch_itf[CFG_TUSB_HOST_DEVICE_MAX]; -// buffer used to read scsi information when mounted, largest response data currently is inquiry -CFG_TUSB_MEM_SECTION TU_ATTR_ALIGNED(4) static uint8_t msch_buffer[sizeof(scsi_inquiry_resp_t)]; +// buffer used to read scsi information when mounted +// largest response data currently is inquiry TODO Inquiry is not part of enum anymore +CFG_TUSB_MEM_SECTION TU_ATTR_ALIGNED(4) static uint8_t _msch_buffer[sizeof(scsi_inquiry_resp_t)]; static inline msch_interface_t* get_itf(uint8_t dev_addr) { - return &msch_data[dev_addr-1]; + return &_msch_itf[dev_addr-1]; } //--------------------------------------------------------------------+ @@ -82,18 +90,28 @@ uint8_t tuh_msc_get_maxlun(uint8_t dev_addr) return p_msc->max_lun; } +uint32_t tuh_msc_get_block_count(uint8_t dev_addr, uint8_t lun) +{ + msch_interface_t* p_msc = get_itf(dev_addr); + return p_msc->capacity[lun].block_count; +} + +uint32_t tuh_msc_get_block_size(uint8_t dev_addr, uint8_t lun) +{ + msch_interface_t* p_msc = get_itf(dev_addr); + return p_msc->capacity[lun].block_size; +} + bool tuh_msc_mounted(uint8_t dev_addr) { msch_interface_t* p_msc = get_itf(dev_addr); - - // is configured can be omitted - return tuh_device_is_configured(dev_addr) && p_msc->mounted; + return p_msc->mounted; } -bool tuh_msc_is_busy(uint8_t dev_addr) +bool tuh_msc_ready(uint8_t dev_addr) { msch_interface_t* p_msc = get_itf(dev_addr); - return p_msc->mounted && hcd_edpt_busy(dev_addr, p_msc->ep_in); + return p_msc->mounted && !hcd_edpt_busy(dev_addr, p_msc->ep_in); } //--------------------------------------------------------------------+ @@ -110,7 +128,7 @@ static inline void cbw_init(msc_cbw_t *cbw, uint8_t lun) bool tuh_msc_scsi_command(uint8_t dev_addr, msc_cbw_t const* cbw, void* data, tuh_msc_complete_cb_t complete_cb) { msch_interface_t* p_msc = get_itf(dev_addr); - // TU_VERIFY(p_msc->mounted); // TODO part of the enumeration also use scsi command + TU_VERIFY(p_msc->configured); // TODO claim endpoint @@ -126,8 +144,8 @@ bool tuh_msc_scsi_command(uint8_t dev_addr, msc_cbw_t const* cbw, void* data, tu bool tuh_msc_read_capacity(uint8_t dev_addr, uint8_t lun, scsi_read_capacity10_resp_t* response, tuh_msc_complete_cb_t complete_cb) { - msch_interface_t* p_msc = get_itf(dev_addr); - TU_VERIFY(p_msc->mounted); + msch_interface_t* p_msc = get_itf(dev_addr); + TU_VERIFY(p_msc->configured); msc_cbw_t cbw; cbw_init(&cbw, lun); @@ -142,6 +160,9 @@ bool tuh_msc_read_capacity(uint8_t dev_addr, uint8_t lun, scsi_read_capacity10_r bool tuh_msc_inquiry(uint8_t dev_addr, uint8_t lun, scsi_inquiry_resp_t* response, tuh_msc_complete_cb_t complete_cb) { + msch_interface_t* p_msc = get_itf(dev_addr); + TU_VERIFY(p_msc->mounted); + msc_cbw_t cbw; cbw_init(&cbw, lun); @@ -161,14 +182,17 @@ bool tuh_msc_inquiry(uint8_t dev_addr, uint8_t lun, scsi_inquiry_resp_t* respons bool tuh_msc_test_unit_ready(uint8_t dev_addr, uint8_t lun, tuh_msc_complete_cb_t complete_cb) { + msch_interface_t* p_msc = get_itf(dev_addr); + TU_VERIFY(p_msc->configured); + msc_cbw_t cbw; cbw_init(&cbw, lun); - cbw.total_bytes = 0; // Number of bytes - cbw.dir = TUSB_DIR_OUT; - cbw.cmd_len = sizeof(scsi_test_unit_ready_t); - cbw.command[0] = SCSI_CMD_TEST_UNIT_READY; - cbw.command[1] = lun; // according to wiki TODO need verification + cbw.total_bytes = 0; + cbw.dir = TUSB_DIR_OUT; + cbw.cmd_len = sizeof(scsi_test_unit_ready_t); + cbw.command[0] = SCSI_CMD_TEST_UNIT_READY; + cbw.command[1] = lun; // according to wiki TODO need verification return tuh_msc_scsi_command(dev_addr, &cbw, NULL, complete_cb); } @@ -179,8 +203,8 @@ bool tuh_msc_request_sense(uint8_t dev_addr, uint8_t lun, void *resposne, tuh_ms cbw_init(&cbw, lun); cbw.total_bytes = 18; // TODO sense response - cbw.dir = TUSB_DIR_IN_MASK; - cbw.cmd_len = sizeof(scsi_request_sense_t); + cbw.dir = TUSB_DIR_IN_MASK; + cbw.cmd_len = sizeof(scsi_request_sense_t); scsi_request_sense_t const cmd_request_sense = { @@ -201,11 +225,11 @@ bool tuh_msc_read10(uint8_t dev_addr, uint8_t lun, void * buffer, uint32_t lba, msc_cbw_t cbw; cbw_init(&cbw, lun); - cbw.total_bytes = 512*block_count; // Number of bytes TODO get block size from READ CAPACITY 10 - cbw.dir = TUSB_DIR_IN_MASK; - cbw.cmd_len = sizeof(scsi_read10_t); + cbw.total_bytes = block_count*p_msc->capacity[lun].block_size; + cbw.dir = TUSB_DIR_IN_MASK; + cbw.cmd_len = sizeof(scsi_read10_t); - scsi_read10_t cmd_read10 = + scsi_read10_t const cmd_read10 = { .cmd_code = SCSI_CMD_READ_10, .lba = tu_htonl(lba), @@ -225,11 +249,11 @@ bool tuh_msc_write10(uint8_t dev_addr, uint8_t lun, void const * buffer, uint32_ msc_cbw_t cbw; cbw_init(&cbw, lun); - cbw.total_bytes = 512*block_count; // Number of bytes TODO get block size from READ CAPACITY 10 - cbw.dir = TUSB_DIR_OUT; - cbw.cmd_len = sizeof(scsi_write10_t); + cbw.total_bytes = block_count*p_msc->capacity[lun].block_size; + cbw.dir = TUSB_DIR_OUT; + cbw.cmd_len = sizeof(scsi_write10_t); - scsi_write10_t cmd_write10 = + scsi_write10_t const cmd_write10 = { .cmd_code = SCSI_CMD_WRITE_10, .lba = tu_htonl(lba), @@ -267,14 +291,14 @@ bool tuh_msc_reset(uint8_t dev_addr) //--------------------------------------------------------------------+ void msch_init(void) { - tu_memclr(msch_data, sizeof(msch_interface_t)*CFG_TUSB_HOST_DEVICE_MAX); + tu_memclr(_msch_itf, sizeof(msch_interface_t)*CFG_TUSB_HOST_DEVICE_MAX); } void msch_close(uint8_t dev_addr) { msch_interface_t* p_msc = get_itf(dev_addr); tu_memclr(p_msc, sizeof(msch_interface_t)); - tuh_msc_unmounted_cb(dev_addr); // invoke Application Callback + tuh_msc_unmount_cb(dev_addr); // invoke Application Callback } bool msch_xfer_cb(uint8_t dev_addr, uint8_t ep_addr, xfer_result_t event, uint32_t xferred_bytes) @@ -331,6 +355,7 @@ bool msch_xfer_cb(uint8_t dev_addr, uint8_t ep_addr, xfer_result_t event, uint32 static bool config_get_maxlun_complete (uint8_t dev_addr, tusb_control_request_t const * request, xfer_result_t result); static bool config_test_unit_ready_complete(uint8_t dev_addr, msc_cbw_t const* cbw, msc_csw_t const* csw); static bool config_request_sense_complete(uint8_t dev_addr, msc_cbw_t const* cbw, msc_csw_t const* csw); +static bool config_read_capacity_complete(uint8_t dev_addr, msc_cbw_t const* cbw, msc_csw_t const* csw); bool msch_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *itf_desc, uint16_t *p_length) { @@ -369,6 +394,8 @@ bool msch_set_config(uint8_t dev_addr, uint8_t itf_num) msch_interface_t* p_msc = get_itf(dev_addr); TU_ASSERT(p_msc->itf_num == itf_num); + p_msc->configured = true; + //------------- Get Max Lun -------------// TU_LOG2("MSC Get Max Lun\r\n"); tusb_control_request_t request = @@ -396,12 +423,13 @@ static bool config_get_maxlun_complete (uint8_t dev_addr, tusb_control_request_t msch_interface_t* p_msc = get_itf(dev_addr); // STALL means zero - p_msc->max_lun = (XFER_RESULT_SUCCESS == result) ? msch_buffer[0] : 0; + p_msc->max_lun = (XFER_RESULT_SUCCESS == result) ? _msch_buffer[0] : 0; p_msc->max_lun++; // MAX LUN is minus 1 by specs // TODO multiple LUN support TU_LOG2("SCSI Test Unit Ready\r\n"); - tuh_msc_test_unit_ready(dev_addr, 0, config_test_unit_ready_complete); + uint8_t const lun = 0; + tuh_msc_test_unit_ready(dev_addr, lun, config_test_unit_ready_complete); return true; } @@ -410,19 +438,16 @@ static bool config_test_unit_ready_complete(uint8_t dev_addr, msc_cbw_t const* c { if (csw->status == 0) { - msch_interface_t* p_msc = get_itf(dev_addr); - - usbh_driver_set_config_complete(dev_addr, p_msc->itf_num); - - // Unit is ready, Enumeration is complete - p_msc->mounted = true; - tuh_msc_mounted_cb(dev_addr); + // Unit is ready, read its capacity + TU_LOG2("SCSI Read Capacity\r\n"); + tuh_msc_read_capacity(dev_addr, cbw->lun, (scsi_read_capacity10_resp_t*) _msch_buffer, config_read_capacity_complete); }else { // Note: During enumeration, some device fails Test Unit Ready and require a few retries // with Request Sense to start working !! // TODO limit number of retries - TU_ASSERT(tuh_msc_request_sense(dev_addr, cbw->lun, msch_buffer, config_request_sense_complete)); + TU_LOG2("SCSI Request Sense\r\n"); + TU_ASSERT(tuh_msc_request_sense(dev_addr, cbw->lun, _msch_buffer, config_request_sense_complete)); } return true; @@ -435,4 +460,24 @@ static bool config_request_sense_complete(uint8_t dev_addr, msc_cbw_t const* cbw return true; } +static bool config_read_capacity_complete(uint8_t dev_addr, msc_cbw_t const* cbw, msc_csw_t const* csw) +{ + TU_ASSERT(csw->status == 0); + + msch_interface_t* p_msc = get_itf(dev_addr); + + // Capacity response field: Block size and Last LBA are both Big-Endian + scsi_read_capacity10_resp_t* resp = (scsi_read_capacity10_resp_t*) _msch_buffer; + p_msc->capacity[cbw->lun].block_count = tu_ntohl(resp->last_lba) + 1; + p_msc->capacity[cbw->lun].block_size = tu_ntohl(resp->block_size); + + // Mark enumeration is complete + p_msc->mounted = true; + tuh_msc_mount_cb(dev_addr); + + usbh_driver_set_config_complete(dev_addr, p_msc->itf_num); + + return true; +} + #endif diff --git a/src/class/msc/msc_host.h b/src/class/msc/msc_host.h index b6ead28c..8116e729 100644 --- a/src/class/msc/msc_host.h +++ b/src/class/msc/msc_host.h @@ -35,6 +35,15 @@ extern "C" { #endif +//--------------------------------------------------------------------+ +// Class Driver Configuration +//--------------------------------------------------------------------+ + +#ifndef CFG_TUH_MSC_MAXLUN +#define CFG_TUH_MSC_MAXLUN 4 +#endif + + /** \addtogroup ClassDriver_MSC * @{ * \defgroup MSC_Host Host @@ -51,12 +60,18 @@ typedef bool (*tuh_msc_complete_cb_t)(uint8_t dev_addr, msc_cbw_t const* cbw, ms // This function true after tuh_msc_mounted_cb() and false after tuh_msc_unmounted_cb() bool tuh_msc_mounted(uint8_t dev_addr); -// Check if the interface is currently busy transferring data -bool tuh_msc_is_busy(uint8_t dev_addr); +// Check if the interface is currently ready or busy transferring data +bool tuh_msc_ready(uint8_t dev_addr); // Get Max Lun uint8_t tuh_msc_get_maxlun(uint8_t dev_addr); +// Get number of block +uint32_t tuh_msc_get_block_count(uint8_t dev_addr, uint8_t lun); + +// Get block size in bytes +uint32_t tuh_msc_get_block_size(uint8_t dev_addr, uint8_t lun); + // Perform a full SCSI command (cbw, data, csw) in non-blocking manner. // Complete callback is invoked when SCSI op is complete. // return true if success, false if there is already pending operation. @@ -74,10 +89,6 @@ bool tuh_msc_test_unit_ready(uint8_t dev_addr, uint8_t lun, tuh_msc_complete_cb_ // Complete callback is invoked when SCSI op is complete. bool tuh_msc_request_sense(uint8_t dev_addr, uint8_t lun, void *resposne, tuh_msc_complete_cb_t complete_cb); -// Perform SCSI Read Capacity 10 command -// Complete callback is invoked when SCSI op is complete. -bool tuh_msc_read_capacity(uint8_t dev_addr, uint8_t lun, scsi_read_capacity10_resp_t* response, tuh_msc_complete_cb_t complete_cb); - // Perform SCSI Read 10 command. Read n blocks starting from LBA to buffer // Complete callback is invoked when SCSI op is complete. bool tuh_msc_read10(uint8_t dev_addr, uint8_t lun, void * buffer, uint32_t lba, uint16_t block_count, tuh_msc_complete_cb_t complete_cb); @@ -86,13 +97,19 @@ bool tuh_msc_read10(uint8_t dev_addr, uint8_t lun, void * buffer, uint32_t lba, // Complete callback is invoked when SCSI op is complete. bool tuh_msc_write10(uint8_t dev_addr, uint8_t lun, void const * buffer, uint32_t lba, uint16_t block_count, tuh_msc_complete_cb_t complete_cb); +// Perform SCSI Read Capacity 10 command +// Complete callback is invoked when SCSI op is complete. +// Note: during enumeration, host stack already carried out this request. Application can retrieve capacity by +// simply call tuh_msc_get_block_count() and tuh_msc_get_block_size() +bool tuh_msc_read_capacity(uint8_t dev_addr, uint8_t lun, scsi_read_capacity10_resp_t* response, tuh_msc_complete_cb_t complete_cb); + //------------- Application Callback -------------// // Invoked when a device with MassStorage interface is mounted -void tuh_msc_mounted_cb(uint8_t dev_addr); +void tuh_msc_mount_cb(uint8_t dev_addr); // Invoked when a device with MassStorage interface is unmounted -void tuh_msc_unmounted_cb(uint8_t dev_addr); +void tuh_msc_unmount_cb(uint8_t dev_addr); //--------------------------------------------------------------------+ // Internal Class Driver API From 0de6a05d73ca79974bc45f5cfa94b2246113c1f1 Mon Sep 17 00:00:00 2001 From: hathach Date: Tue, 23 Feb 2021 19:45:53 +0700 Subject: [PATCH 12/14] fix ohci hcd_init() signature change --- src/host/ohci/ohci.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/src/host/ohci/ohci.c b/src/host/ohci/ohci.c index d9bbfc8c..44acebf7 100644 --- a/src/host/ohci/ohci.c +++ b/src/host/ohci/ohci.c @@ -141,8 +141,10 @@ static void ed_list_remove_by_addr(ohci_ed_t * p_head, uint8_t dev_addr); // USBH-HCD API //--------------------------------------------------------------------+ // Initialization according to 5.1.1.4 -bool hcd_init(void) +bool hcd_init(uint8_t rhport) { + (void) rhport; + //------------- Data Structure init -------------// tu_memclr(&ohci_data, sizeof(ohci_data_t)); for(uint8_t i=0; i<32; i++) From afab5bf497ce429a60eee1642e8c58560f4b6147 Mon Sep 17 00:00:00 2001 From: hathach Date: Tue, 23 Feb 2021 19:50:39 +0700 Subject: [PATCH 13/14] enable host example ci build for imxrt --- examples/host/cdc_msc_hid/.only.MCU_MIMXRT10XX | 0 1 file changed, 0 insertions(+), 0 deletions(-) create mode 100644 examples/host/cdc_msc_hid/.only.MCU_MIMXRT10XX diff --git a/examples/host/cdc_msc_hid/.only.MCU_MIMXRT10XX b/examples/host/cdc_msc_hid/.only.MCU_MIMXRT10XX new file mode 100644 index 00000000..e69de29b From 451650fa32b245f2dc02c366b25fa802b75fbb1b Mon Sep 17 00:00:00 2001 From: hathach Date: Tue, 23 Feb 2021 23:09:48 +0700 Subject: [PATCH 14/14] move ehci and ohci to portable folder --- examples/host/cdc_msc_hid/Makefile | 4 ++-- examples/host/cdc_msc_hid/src/msc_app.c | 7 ------- src/{host => portable}/ehci/ehci.c | 4 ++-- src/{host => portable}/ehci/ehci.h | 2 -- src/{host => portable}/ohci/ohci.c | 8 +++++--- src/{host => portable}/ohci/ohci.h | 2 -- 6 files changed, 9 insertions(+), 18 deletions(-) rename src/{host => portable}/ehci/ehci.c (99%) rename src/{host => portable}/ehci/ehci.h (99%) rename src/{host => portable}/ohci/ohci.c (99%) rename src/{host => portable}/ohci/ohci.h (99%) diff --git a/examples/host/cdc_msc_hid/Makefile b/examples/host/cdc_msc_hid/Makefile index 3a0e94d7..6a2b4d90 100644 --- a/examples/host/cdc_msc_hid/Makefile +++ b/examples/host/cdc_msc_hid/Makefile @@ -19,8 +19,8 @@ SRC_C += \ src/host/hub.c \ src/host/usbh.c \ src/host/usbh_control.c \ - src/host/ehci/ehci.c \ - src/host/ohci/ohci.c \ + src/portable/ehci/ehci.c \ + src/portable/ohci/ohci.c \ src/portable/nxp/transdimension/hcd_transdimension.c \ src/portable/nxp/lpc17_40/hcd_lpc17_40.c diff --git a/examples/host/cdc_msc_hid/src/msc_app.c b/examples/host/cdc_msc_hid/src/msc_app.c index 623141ea..3a8ef3a0 100644 --- a/examples/host/cdc_msc_hid/src/msc_app.c +++ b/examples/host/cdc_msc_hid/src/msc_app.c @@ -73,13 +73,6 @@ void tuh_msc_mount_cb(uint8_t dev_addr) // return; // } // -// puts("---------------------------------------------------------------------"); -// puts("- MASSSTORAGE CLASS CLI IS A IMMATURE CODE. DISK-WRITING COMMANDS"); -// puts("- SUCH AS cp(COPY), mkdir(MAKE DIRECTORY) ARE POTENTIAL TO DAMAGE"); -// puts("- YOUR USB THUMBDRIVE. USING THOSE COMMANDS ARE AT YOUR OWN RISK."); -// puts("- THE AUTHOR HAS NO RESPONSIBILITY WITH YOUR DEVICE NOR ITS DATA"); -// puts("---------------------------------------------------------------------"); -// // f_chdrive(phy_disk); // change to newly mounted drive // f_chdir("/"); // root as current dir // diff --git a/src/host/ehci/ehci.c b/src/portable/ehci/ehci.c similarity index 99% rename from src/host/ehci/ehci.c rename to src/portable/ehci/ehci.c index 5626abcc..e2327fdc 100644 --- a/src/host/ehci/ehci.c +++ b/src/portable/ehci/ehci.c @@ -35,8 +35,8 @@ //--------------------------------------------------------------------+ #include "osal/osal.h" -#include "../hcd.h" -#include "../usbh_hcd.h" +#include "host/hcd.h" +#include "host/usbh_hcd.h" #include "ehci.h" //--------------------------------------------------------------------+ diff --git a/src/host/ehci/ehci.h b/src/portable/ehci/ehci.h similarity index 99% rename from src/host/ehci/ehci.h rename to src/portable/ehci/ehci.h index d8218a5f..212f605b 100644 --- a/src/host/ehci/ehci.h +++ b/src/portable/ehci/ehci.h @@ -33,8 +33,6 @@ #ifndef _TUSB_EHCI_H_ #define _TUSB_EHCI_H_ -#include "common/tusb_common.h" -#include "../hcd.h" /* Abbreviation * HC: Host Controller diff --git a/src/host/ohci/ohci.c b/src/portable/ohci/ohci.c similarity index 99% rename from src/host/ohci/ohci.c rename to src/portable/ohci/ohci.c index 44acebf7..ee294856 100644 --- a/src/host/ohci/ohci.c +++ b/src/portable/ohci/ohci.c @@ -26,14 +26,16 @@ #include -#if TUSB_OPT_HOST_ENABLED && (CFG_TUSB_MCU == OPT_MCU_LPC175X_6X || CFG_TUSB_MCU == OPT_MCU_LPC40XX) +#if TUSB_OPT_HOST_ENABLED && \ + (CFG_TUSB_MCU == OPT_MCU_LPC175X_6X || CFG_TUSB_MCU == OPT_MCU_LPC40XX) + //--------------------------------------------------------------------+ // INCLUDE //--------------------------------------------------------------------+ #include "osal/osal.h" -#include "../hcd.h" -#include "../usbh_hcd.h" +#include "host/hcd.h" +#include "host/usbh_hcd.h" #include "ohci.h" // TODO remove diff --git a/src/host/ohci/ohci.h b/src/portable/ohci/ohci.h similarity index 99% rename from src/host/ohci/ohci.h rename to src/portable/ohci/ohci.h index 2915f8b0..7f9e55b2 100644 --- a/src/host/ohci/ohci.h +++ b/src/portable/ohci/ohci.h @@ -37,8 +37,6 @@ extern "C" { #endif -#include "common/tusb_common.h" - //--------------------------------------------------------------------+ // OHCI CONFIGURATION & CONSTANTS //--------------------------------------------------------------------+