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+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/examples/device/device_composite/ses/ses_samd21/ATSAMD21G18A_Vectors.s b/examples/device/device_composite/ses/ses_samd21/ATSAMD21G18A_Vectors.s new file mode 100644 index 00000000..5cecbd23 --- /dev/null +++ b/examples/device/device_composite/ses/ses_samd21/ATSAMD21G18A_Vectors.s @@ -0,0 +1,331 @@ +/***************************************************************************** + * SEGGER Microcontroller GmbH & Co. KG * + * Solutions for real time microcontroller applications * + ***************************************************************************** + * * + * (c) 2017 SEGGER Microcontroller GmbH & Co. KG * + * * + * Internet: www.segger.com Support: support@segger.com * + * * + *****************************************************************************/ + +/***************************************************************************** + * Preprocessor Definitions * + * ------------------------ * + * VECTORS_IN_RAM * + * * + * If defined, an area of RAM will large enough to store the vector table * + * will be reserved. * + * * + *****************************************************************************/ + + .syntax unified + .code 16 + + .section .init, "ax" + .align 0 + +/***************************************************************************** + * Default Exception Handlers * + *****************************************************************************/ + + .thumb_func + .weak NMI_Handler +NMI_Handler: + b . + + .thumb_func + .weak HardFault_Handler +HardFault_Handler: + b . + + .thumb_func + .weak SVC_Handler +SVC_Handler: + b . + + .thumb_func + .weak PendSV_Handler +PendSV_Handler: + b . + + .thumb_func + .weak SysTick_Handler +SysTick_Handler: + b . + + .thumb_func +Dummy_Handler: + b . + +#if defined(__OPTIMIZATION_SMALL) + + .weak PM_Handler + .thumb_set PM_Handler,Dummy_Handler + + .weak SYSCTRL_Handler + .thumb_set SYSCTRL_Handler,Dummy_Handler + + .weak WDT_Handler + .thumb_set WDT_Handler,Dummy_Handler + + .weak RTC_Handler + .thumb_set RTC_Handler,Dummy_Handler + + .weak EIC_Handler + .thumb_set EIC_Handler,Dummy_Handler + + .weak NVMCTRL_Handler + .thumb_set NVMCTRL_Handler,Dummy_Handler + + .weak DMAC_Handler + .thumb_set DMAC_Handler,Dummy_Handler + + .weak USB_Handler + .thumb_set USB_Handler,Dummy_Handler + + .weak EVSYS_Handler + .thumb_set EVSYS_Handler,Dummy_Handler + + .weak SERCOM0_Handler + .thumb_set SERCOM0_Handler,Dummy_Handler + + .weak SERCOM1_Handler + .thumb_set SERCOM1_Handler,Dummy_Handler + + .weak SERCOM2_Handler + .thumb_set SERCOM2_Handler,Dummy_Handler + + .weak SERCOM3_Handler + .thumb_set SERCOM3_Handler,Dummy_Handler + + .weak SERCOM4_Handler + .thumb_set SERCOM4_Handler,Dummy_Handler + + .weak SERCOM5_Handler + .thumb_set SERCOM5_Handler,Dummy_Handler + + .weak TCC0_Handler + .thumb_set TCC0_Handler,Dummy_Handler + + .weak TCC1_Handler + .thumb_set TCC1_Handler,Dummy_Handler + + .weak TCC2_Handler + .thumb_set TCC2_Handler,Dummy_Handler + + .weak TC3_Handler + .thumb_set TC3_Handler,Dummy_Handler + + .weak TC4_Handler + .thumb_set TC4_Handler,Dummy_Handler + + .weak TC5_Handler + .thumb_set TC5_Handler,Dummy_Handler + + .weak ADC_Handler + .thumb_set ADC_Handler,Dummy_Handler + + .weak AC_Handler + .thumb_set AC_Handler,Dummy_Handler + + .weak DAC_Handler + .thumb_set DAC_Handler,Dummy_Handler + + .weak I2S_Handler + .thumb_set I2S_Handler,Dummy_Handler + +#else + + .thumb_func + .weak PM_Handler +PM_Handler: + b . + + .thumb_func + .weak SYSCTRL_Handler +SYSCTRL_Handler: + b . + + .thumb_func + .weak WDT_Handler +WDT_Handler: + b . + + .thumb_func + .weak RTC_Handler +RTC_Handler: + b . + + .thumb_func + .weak EIC_Handler +EIC_Handler: + b . + + .thumb_func + .weak NVMCTRL_Handler +NVMCTRL_Handler: + b . + + .thumb_func + .weak DMAC_Handler +DMAC_Handler: + b . + + .thumb_func + .weak USB_Handler +USB_Handler: + b . + + .thumb_func + .weak EVSYS_Handler +EVSYS_Handler: + b . + + .thumb_func + .weak SERCOM0_Handler +SERCOM0_Handler: + b . + + .thumb_func + .weak SERCOM1_Handler +SERCOM1_Handler: + b . + + .thumb_func + .weak SERCOM2_Handler +SERCOM2_Handler: + b . + + .thumb_func + .weak SERCOM3_Handler +SERCOM3_Handler: + b . + + .thumb_func + .weak SERCOM4_Handler +SERCOM4_Handler: + b . + + .thumb_func + .weak SERCOM5_Handler +SERCOM5_Handler: + b . + + .thumb_func + .weak TCC0_Handler +TCC0_Handler: + b . + + .thumb_func + .weak TCC1_Handler +TCC1_Handler: + b . + + .thumb_func + .weak TCC2_Handler +TCC2_Handler: + b . + + .thumb_func + .weak TC3_Handler +TC3_Handler: + b . + + .thumb_func + .weak TC4_Handler +TC4_Handler: + b . + + .thumb_func + .weak TC5_Handler +TC5_Handler: + b . + + .thumb_func + .weak ADC_Handler +ADC_Handler: + b . + + .thumb_func + .weak AC_Handler +AC_Handler: + b . + + .thumb_func + .weak DAC_Handler +DAC_Handler: + b . + + .thumb_func + .weak I2S_Handler +I2S_Handler: + b . + +#endif + +/***************************************************************************** + * Vector Table * + *****************************************************************************/ + + .section .vectors, "ax" + .align 0 + .global _vectors + .extern __stack_end__ + .extern Reset_Handler + +_vectors: + .word __stack_end__ + .word Reset_Handler + .word NMI_Handler + .word HardFault_Handler + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word SVC_Handler + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word PendSV_Handler + .word SysTick_Handler + .word PM_Handler + .word SYSCTRL_Handler + .word WDT_Handler + .word RTC_Handler + .word EIC_Handler + .word NVMCTRL_Handler + .word DMAC_Handler + .word USB_Handler + .word EVSYS_Handler + .word SERCOM0_Handler + .word SERCOM1_Handler + .word SERCOM2_Handler + .word SERCOM3_Handler + .word SERCOM4_Handler + .word SERCOM5_Handler + .word TCC0_Handler + .word TCC1_Handler + .word TCC2_Handler + .word TC3_Handler + .word TC4_Handler + .word TC5_Handler + .word Dummy_Handler /* Reserved */ + .word Dummy_Handler /* Reserved */ + .word ADC_Handler + .word AC_Handler + .word DAC_Handler + .word Dummy_Handler /* Reserved */ + .word I2S_Handler +_vectors_end: + +#ifdef VECTORS_IN_RAM + .section .vectors_ram, "ax" + .align 0 + .global _vectors_ram + +_vectors_ram: + .space _vectors_end - _vectors, 0 +#endif diff --git a/examples/device/device_composite/ses/ses_samd21/SAMD21_Startup.s b/examples/device/device_composite/ses/ses_samd21/SAMD21_Startup.s new file mode 100644 index 00000000..c4b48d35 --- /dev/null +++ b/examples/device/device_composite/ses/ses_samd21/SAMD21_Startup.s @@ -0,0 +1,114 @@ +/***************************************************************************** + * SEGGER Microcontroller GmbH & Co. KG * + * Solutions for real time microcontroller applications * + ***************************************************************************** + * * + * (c) 2017 SEGGER Microcontroller GmbH & Co. KG * + * * + * Internet: www.segger.com Support: support@segger.com * + * * + *****************************************************************************/ + +/***************************************************************************** + * Preprocessor Definitions * + * ------------------------ * + * NO_STACK_INIT * + * * + * If defined, the stack pointer will not be initialised. * + * * + * NO_SYSTEM_INIT * + * * + * If defined, the SystemInit() function will not be called. By default * + * SystemInit() is called after reset to enable the clocks and memories to * + * be initialised prior to any C startup initialisation. * + * * + * NO_VTOR_CONFIG * + * * + * If defined, the vector table offset register will not be configured. * + * * + * MEMORY_INIT * + * * + * If defined, the MemoryInit() function will be called. By default * + * MemoryInit() is called after SystemInit() to enable an external memory * + * controller. * + * * + * STACK_INIT_VAL * + * * + * If defined, specifies the initial stack pointer value. If undefined, * + * the stack pointer will be initialised to point to the end of the * + * RAM segment. * + * * + * VECTORS_IN_RAM * + * * + * If defined, the exception vectors will be copied from Flash to RAM. * + * * + *****************************************************************************/ + + .syntax unified + + .global Reset_Handler + .extern _vectors + + .section .init, "ax" + .thumb_func + + .equ VTOR_REG, 0xE000ED08 + +#ifndef STACK_INIT_VAL +#define STACK_INIT_VAL __RAM_segment_end__ +#endif + +Reset_Handler: +#ifndef NO_STACK_INIT + /* Initialise main stack */ + ldr r0, =STACK_INIT_VAL + ldr r1, =0x7 + bics r0, r1 + mov sp, r0 +#endif + +#ifndef NO_SYSTEM_INIT + /* Initialise system */ + ldr r0, =SystemInit + blx r0 + .pushsection .init_array, "aw", %init_array + .word SystemCoreClockUpdate + .popsection +#endif + +#ifdef MEMORY_INIT + ldr r0, =MemoryInit + blx r0 +#endif + +#ifdef VECTORS_IN_RAM + /* Copy exception vectors into RAM */ + ldr r0, =__vectors_start__ + ldr r1, =__vectors_end__ + ldr r2, =__vectors_ram_start__ +1: + cmp r0, r1 + beq 2f + ldr r3, [r0] + str r3, [r2] + adds r0, r0, #4 + adds r2, r2, #4 + b 1b +2: +#endif + +#ifndef NO_VTOR_CONFIG + /* Configure vector table offset register */ + ldr r0, =VTOR_REG +#ifdef VECTORS_IN_RAM + ldr r1, =_vectors_ram +#else + ldr r1, =_vectors +#endif + str r1, [r0] +#endif + + /* Jump to program start */ + b _start + + diff --git a/examples/device/device_composite/ses/ses_samd51/SAME51_Target.js b/examples/device/device_composite/ses/ses_samd21/SAMD21_Target.js similarity index 100% rename from examples/device/device_composite/ses/ses_samd51/SAME51_Target.js rename to examples/device/device_composite/ses/ses_samd21/SAMD21_Target.js diff --git a/examples/device/device_composite/ses/ses_samd21/flash_placement.xml b/examples/device/device_composite/ses/ses_samd21/flash_placement.xml new file mode 100644 index 00000000..79bedc53 --- /dev/null +++ b/examples/device/device_composite/ses/ses_samd21/flash_placement.xml @@ -0,0 +1,37 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/examples/device/device_composite/ses/ses_samd21/thumb_crt0.s b/examples/device/device_composite/ses/ses_samd21/thumb_crt0.s new file mode 100644 index 00000000..17f88e0c --- /dev/null +++ b/examples/device/device_composite/ses/ses_samd21/thumb_crt0.s @@ -0,0 +1,415 @@ +// ********************************************************************** +// * SEGGER Microcontroller GmbH * +// * The Embedded Experts * +// ********************************************************************** +// * * +// * (c) 2014 - 2018 SEGGER Microcontroller GmbH * +// * (c) 2001 - 2018 Rowley Associates Limited * +// * * +// * www.segger.com Support: support@segger.com * +// * * +// ********************************************************************** +// * * +// * All rights reserved. * +// * * +// * Redistribution and use in source and binary forms, with or * +// * without modification, are permitted provided that the following * +// * conditions are met: * +// * * +// * - Redistributions of source code must retain the above copyright * +// * notice, this list of conditions and the following disclaimer. * +// * * +// * - Neither the name of SEGGER Microcontroller GmbH * +// * nor the names of its contributors may be used to endorse or * +// * promote products derived from this software without specific * +// * prior written permission. * +// * * +// * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND * +// * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, * +// * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF * +// * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * +// * DISCLAIMED. * +// * IN NO EVENT SHALL SEGGER Microcontroller GmbH BE LIABLE FOR * +// * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * +// * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT * +// * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; * +// * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * +// * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * +// * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * +// * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * +// * DAMAGE. * +// * * +// ********************************************************************** +// +// +// Preprocessor Definitions +// ------------------------ +// APP_ENTRY_POINT +// +// Defines the application entry point function, if undefined this setting +// defaults to "main". +// +// INITIALIZE_STACK +// +// If defined, the contents of the stack will be initialized to a the +// value 0xCC. +// +// INITIALIZE_SECONDARY_SECTIONS +// +// If defined, the .data2, .text2, .rodata2 and .bss2 sections will be initialized. +// +// INITIALIZE_TCM_SECTIONS +// +// If defined, the .data_tcm, .text_tcm, .rodata_tcm and .bss_tcm sections +// will be initialized. +// +// INITIALIZE_USER_SECTIONS +// +// If defined, the function InitializeUserMemorySections will be called prior +// to entering main in order to allow the user to initialize any user defined +// memory sections. +// +// FULL_LIBRARY +// +// If defined then +// - argc, argv are setup by the debug_getargs. +// - the exit symbol is defined and executes on return from main. +// - the exit symbol calls destructors, atexit functions and then debug_exit. +// +// If not defined then +// - argc and argv are zero. +// - the exit symbol is defined, executes on return from main and loops +// + +#ifndef APP_ENTRY_POINT +#define APP_ENTRY_POINT main +#endif + +#ifndef ARGSSPACE +#define ARGSSPACE 128 +#endif + .syntax unified + + .global _start + .extern APP_ENTRY_POINT + .global exit + .weak exit + +#ifdef INITIALIZE_USER_SECTIONS + .extern InitializeUserMemorySections +#endif + + .section .init, "ax" + .code 16 + .balign 2 + .thumb_func + +_start: + /* Set up main stack if size > 0 */ + ldr r1, =__stack_end__ + ldr r0, =__stack_start__ + subs r2, r1, r0 + beq 1f +#ifdef __ARM_EABI__ + movs r2, #0x7 + bics r1, r2 +#endif + mov sp, r1 +#ifdef INITIALIZE_STACK + movs r2, #0xCC + ldr r0, =__stack_start__ + bl memory_set +#endif +1: + + /* Set up process stack if size > 0 */ + ldr r1, =__stack_process_end__ + ldr r0, =__stack_process_start__ + subs r2, r1, r0 + beq 1f +#ifdef __ARM_EABI__ + movs r2, #0x7 + bics r1, r2 +#endif + msr psp, r1 + movs r2, #2 + msr control, r2 +#ifdef INITIALIZE_STACK + movs r2, #0xCC + bl memory_set +#endif +1: + + /* Copy initialized memory sections into RAM (if necessary). */ + ldr r0, =__data_load_start__ + ldr r1, =__data_start__ + ldr r2, =__data_end__ + bl memory_copy + ldr r0, =__text_load_start__ + ldr r1, =__text_start__ + ldr r2, =__text_end__ + bl memory_copy + ldr r0, =__fast_load_start__ + ldr r1, =__fast_start__ + ldr r2, =__fast_end__ + bl memory_copy + ldr r0, =__ctors_load_start__ + ldr r1, =__ctors_start__ + ldr r2, =__ctors_end__ + bl memory_copy + ldr r0, =__dtors_load_start__ + ldr r1, =__dtors_start__ + ldr r2, =__dtors_end__ + bl memory_copy + ldr r0, =__rodata_load_start__ + ldr r1, =__rodata_start__ + ldr r2, =__rodata_end__ + bl memory_copy + ldr r0, =__tdata_load_start__ + ldr r1, =__tdata_start__ + ldr r2, =__tdata_end__ + bl memory_copy +#ifdef INITIALIZE_SECONDARY_SECTIONS + ldr r0, =__data2_load_start__ + ldr r1, =__data2_start__ + ldr r2, =__data2_end__ + bl memory_copy + ldr r0, =__text2_load_start__ + ldr r1, =__text2_start__ + ldr r2, =__text2_end__ + bl memory_copy + ldr r0, =__rodata2_load_start__ + ldr r1, =__rodata2_start__ + ldr r2, =__rodata2_end__ + bl memory_copy +#endif /* #ifdef INITIALIZE_SECONDARY_SECTIONS */ +#ifdef INITIALIZE_TCM_SECTIONS + ldr r0, =__data_tcm_load_start__ + ldr r1, =__data_tcm_start__ + ldr r2, =__data_tcm_end__ + bl memory_copy + ldr r0, =__text_tcm_load_start__ + ldr r1, =__text_tcm_start__ + ldr r2, =__text_tcm_end__ + bl memory_copy + ldr r0, =__rodata_tcm_load_start__ + ldr r1, =__rodata_tcm_start__ + ldr r2, =__rodata_tcm_end__ + bl memory_copy +#endif /* #ifdef INITIALIZE_TCM_SECTIONS */ + + /* Zero the bss. */ + ldr r0, =__bss_start__ + ldr r1, =__bss_end__ + movs r2, #0 + bl memory_set + ldr r0, =__tbss_start__ + ldr r1, =__tbss_end__ + movs r2, #0 + bl memory_set +#ifdef INITIALIZE_SECONDARY_SECTIONS + ldr r0, =__bss2_start__ + ldr r1, =__bss2_end__ + mov r2, #0 + bl memory_set +#endif /* #ifdef INITIALIZE_SECONDARY_SECTIONS */ +#ifdef INITIALIZE_TCM_SECTIONS + ldr r0, =__bss_tcm_start__ + ldr r1, =__bss_tcm_end__ + mov r2, #0 + bl memory_set +#endif /* #ifdef INITIALIZE_TCM_SECTIONS */ + + /* Initialize the heap */ + ldr r0, = __heap_start__ + ldr r1, = __heap_end__ + subs r1, r1, r0 + cmp r1, #8 + blt 1f + movs r2, #0 + str r2, [r0] + adds r0, r0, #4 + str r1, [r0] +1: + +#ifdef INITIALIZE_USER_SECTIONS + ldr r2, =InitializeUserMemorySections + blx r2 +#endif + + /* Call constructors */ + ldr r0, =__ctors_start__ + ldr r1, =__ctors_end__ +ctor_loop: + cmp r0, r1 + beq ctor_end + ldr r2, [r0] + adds r0, #4 + push {r0-r1} + blx r2 + pop {r0-r1} + b ctor_loop +ctor_end: + + /* Setup initial call frame */ + movs r0, #0 + mov lr, r0 + mov r12, sp + + .type start, function +start: + /* Jump to application entry point */ +#ifdef FULL_LIBRARY + movs r0, #ARGSSPACE + ldr r1, =args + ldr r2, =debug_getargs + blx r2 + ldr r1, =args +#else + movs r0, #0 + movs r1, #0 +#endif + ldr r2, =APP_ENTRY_POINT + blx r2 + + .thumb_func +exit: +#ifdef FULL_LIBRARY + mov r5, r0 // save the exit parameter/return result + + /* Call destructors */ + ldr r0, =__dtors_start__ + ldr r1, =__dtors_end__ +dtor_loop: + cmp r0, r1 + beq dtor_end + ldr r2, [r0] + add r0, #4 + push {r0-r1} + blx r2 + pop {r0-r1} + b dtor_loop +dtor_end: + + /* Call atexit functions */ + ldr r2, =_execute_at_exit_fns + blx r2 + + /* Call debug_exit with return result/exit parameter */ + mov r0, r5 + ldr r2, =debug_exit + blx r2 +#endif + + /* Returned from application entry point, loop forever. */ +exit_loop: + b exit_loop + + .thumb_func +memory_copy: + cmp r0, r1 + beq 2f + subs r2, r2, r1 + beq 2f +1: + ldrb r3, [r0] + adds r0, r0, #1 + strb r3, [r1] + adds r1, r1, #1 + subs r2, r2, #1 + bne 1b +2: + bx lr + + .thumb_func +memory_set: + cmp r0, r1 + beq 1f + strb r2, [r0] + adds r0, r0, #1 + b memory_set +1: + bx lr + + // default C/C++ library helpers + +.macro HELPER helper_name + .section .text.\helper_name, "ax", %progbits + .balign 2 + .global \helper_name + .weak \helper_name +\helper_name: + .thumb_func +.endm + +.macro JUMPTO name +#if defined(__thumb__) && !defined(__thumb2__) + mov r12, r0 + ldr r0, =\name + push {r0} + mov r0, r12 + pop {pc} +#else + b \name +#endif +.endm + +HELPER __aeabi_read_tp + ldr r0, =__tbss_start__-8 + bx lr +HELPER abort + b . +HELPER __assert + b . +HELPER __aeabi_assert + b . +HELPER __sync_synchronize + bx lr +HELPER __getchar + JUMPTO debug_getchar +HELPER __putchar + JUMPTO debug_putchar +HELPER __open + JUMPTO debug_fopen +HELPER __close + JUMPTO debug_fclose +HELPER __write + mov r3, r0 + mov r0, r1 + movs r1, #1 + JUMPTO debug_fwrite +HELPER __read + mov r3, r0 + mov r0, r1 + movs r1, #1 + JUMPTO debug_fread +HELPER __seek + push {r4, lr} + mov r4, r0 + bl debug_fseek + cmp r0, #0 + bne 1f + mov r0, r4 + bl debug_ftell + pop {r4, pc} +1: + ldr r0, =-1 + pop {r4, pc} + // char __user_locale_name_buffer[]; + .section .bss.__user_locale_name_buffer, "aw", %nobits + .global __user_locale_name_buffer + .weak __user_locale_name_buffer + __user_locale_name_buffer: + .word 0x0 + +#ifdef FULL_LIBRARY + .bss +args: + .space ARGSSPACE +#endif + + /* Setup attibutes of stack and heap sections so they don't take up room in the elf file */ + .section .stack, "wa", %nobits + .section .stack_process, "wa", %nobits + .section .heap, "wa", %nobits + diff --git a/examples/device/device_composite/ses/ses_samd51/ATSAME51J19A_MemoryMap.xml b/examples/device/device_composite/ses/ses_samd51/ATSAMD51J19A_MemoryMap.xml similarity index 65% rename from examples/device/device_composite/ses/ses_samd51/ATSAME51J19A_MemoryMap.xml rename to examples/device/device_composite/ses/ses_samd51/ATSAMD51J19A_MemoryMap.xml index 85094431..49d9a9cb 100644 --- a/examples/device/device_composite/ses/ses_samd51/ATSAME51J19A_MemoryMap.xml +++ b/examples/device/device_composite/ses/ses_samd51/ATSAMD51J19A_MemoryMap.xml @@ -1,5 +1,6 @@ - + + diff --git a/examples/device/device_composite/ses/ses_samd51/ATSAME51J19A_Registers.xml b/examples/device/device_composite/ses/ses_samd51/ATSAMD51J19A_Registers.xml similarity index 91% rename from examples/device/device_composite/ses/ses_samd51/ATSAME51J19A_Registers.xml rename to examples/device/device_composite/ses/ses_samd51/ATSAMD51J19A_Registers.xml index 3fdb53f8..83fe837f 100644 --- a/examples/device/device_composite/ses/ses_samd51/ATSAME51J19A_Registers.xml +++ b/examples/device/device_composite/ses/ses_samd51/ATSAMD51J19A_Registers.xml @@ -1,5 +1,5 @@ - + @@ -708,1376 +708,6 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - @@ -5817,7 +4447,7 @@ - + @@ -8893,11 +7523,33 @@ + + + + + + + + + + + + + + + + + + + + + + @@ -9290,8 +7942,6 @@ - - @@ -9863,8 +8513,6 @@ - - @@ -9925,8 +8573,6 @@ - - @@ -24499,1072 +23145,499 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + + + + + + - - - - - - + + + + + + - - + + - - + + - - - - + + + + - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + - - - - - + + + + + - - - - - - - - - - - + + + + + - - + + + + + - - - - - - - + + + + + - - - - + + + + + - - - - - - - + + + + + - - - - + + + + + - - + + + + + - - - + + + + + - - - - - - - - - - - - - - - + + + + + - - - - - - - + + + + + - - - - - - - - + + + + + - - - - - - - + + + + + - - - - + + + + + - - - - - - + + + + + - - + + + + + - - + + + + + - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + - - - - + + + + + + + + + + + + - - - - - - - - - - + + + - - + + + + + + + - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + - - - - - + + + + + + - - - - + + + + + + + + + + + + + + + + + + + - - + + + + - - - - + + - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/examples/device/device_composite/ses/ses_samd51/ATSAMD51J19A_Vectors.s b/examples/device/device_composite/ses/ses_samd51/ATSAMD51J19A_Vectors.s new file mode 100644 index 00000000..6369de86 --- /dev/null +++ b/examples/device/device_composite/ses/ses_samd51/ATSAMD51J19A_Vectors.s @@ -0,0 +1,1227 @@ +/***************************************************************************** + * SEGGER Microcontroller GmbH & Co. KG * + * Solutions for real time microcontroller applications * + ***************************************************************************** + * * + * (c) 2017 SEGGER Microcontroller GmbH & Co. KG * + * * + * Internet: www.segger.com Support: support@segger.com * + * * + *****************************************************************************/ + +/***************************************************************************** + * Preprocessor Definitions * + * ------------------------ * + * STARTUP_FROM_RESET * + * * + * If defined, the program will startup from power-on/reset. If not * + * defined the program will just loop endlessly from power-on/reset. * + * * + * VECTORS_IN_RAM * + * * + * If defined, an area of RAM will large enough to store the vector table * + * will be reserved. * + * * + *****************************************************************************/ + + .syntax unified + .code 16 + + .section .init, "ax" + .align 0 + +/***************************************************************************** + * Default Exception Handlers * + *****************************************************************************/ + +#ifndef STARTUP_FROM_RESET + + .thumb_func + .weak Reset_Wait +Reset_Wait: + b . + +#endif + + .thumb_func + .weak NMI_Handler +NMI_Handler: + b . + + .thumb_func + .weak HardFault_Handler +HardFault_Handler: + b . + + .thumb_func + .weak SVC_Handler +SVC_Handler: + b . + + .thumb_func + .weak PendSV_Handler +PendSV_Handler: + b . + + .thumb_func + .weak SysTick_Handler +SysTick_Handler: + b . + + .thumb_func +Dummy_Handler: + b . + +#if defined(__OPTIMIZATION_SMALL) + + .weak PM_Handler + .thumb_set PM_Handler,Dummy_Handler + + .weak MCLK_Handler + .thumb_set MCLK_Handler,Dummy_Handler + + .weak OSCCTRL_0_Handler + .thumb_set OSCCTRL_0_Handler,Dummy_Handler + + .weak OSCCTRL_1_Handler + .thumb_set OSCCTRL_1_Handler,Dummy_Handler + + .weak OSCCTRL_2_Handler + .thumb_set OSCCTRL_2_Handler,Dummy_Handler + + .weak OSCCTRL_3_Handler + .thumb_set OSCCTRL_3_Handler,Dummy_Handler + + .weak OSCCTRL_4_Handler + .thumb_set OSCCTRL_4_Handler,Dummy_Handler + + .weak OSC32KCTRL_Handler + .thumb_set OSC32KCTRL_Handler,Dummy_Handler + + .weak SUPC_0_Handler + .thumb_set SUPC_0_Handler,Dummy_Handler + + .weak SUPC_1_Handler + .thumb_set SUPC_1_Handler,Dummy_Handler + + .weak WDT_Handler + .thumb_set WDT_Handler,Dummy_Handler + + .weak RTC_Handler + .thumb_set RTC_Handler,Dummy_Handler + + .weak EIC_0_Handler + .thumb_set EIC_0_Handler,Dummy_Handler + + .weak EIC_1_Handler + .thumb_set EIC_1_Handler,Dummy_Handler + + .weak EIC_2_Handler + .thumb_set EIC_2_Handler,Dummy_Handler + + .weak EIC_3_Handler + .thumb_set EIC_3_Handler,Dummy_Handler + + .weak EIC_4_Handler + .thumb_set EIC_4_Handler,Dummy_Handler + + .weak EIC_5_Handler + .thumb_set EIC_5_Handler,Dummy_Handler + + .weak EIC_6_Handler + .thumb_set EIC_6_Handler,Dummy_Handler + + .weak EIC_7_Handler + .thumb_set EIC_7_Handler,Dummy_Handler + + .weak EIC_8_Handler + .thumb_set EIC_8_Handler,Dummy_Handler + + .weak EIC_9_Handler + .thumb_set EIC_9_Handler,Dummy_Handler + + .weak EIC_10_Handler + .thumb_set EIC_10_Handler,Dummy_Handler + + .weak EIC_11_Handler + .thumb_set EIC_11_Handler,Dummy_Handler + + .weak EIC_12_Handler + .thumb_set EIC_12_Handler,Dummy_Handler + + .weak EIC_13_Handler + .thumb_set EIC_13_Handler,Dummy_Handler + + .weak EIC_14_Handler + .thumb_set EIC_14_Handler,Dummy_Handler + + .weak EIC_15_Handler + .thumb_set EIC_15_Handler,Dummy_Handler + + .weak FREQM_Handler + .thumb_set FREQM_Handler,Dummy_Handler + + .weak NVMCTRL_0_Handler + .thumb_set NVMCTRL_0_Handler,Dummy_Handler + + .weak NVMCTRL_1_Handler + .thumb_set NVMCTRL_1_Handler,Dummy_Handler + + .weak DMAC_0_Handler + .thumb_set DMAC_0_Handler,Dummy_Handler + + .weak DMAC_1_Handler + .thumb_set DMAC_1_Handler,Dummy_Handler + + .weak DMAC_2_Handler + .thumb_set DMAC_2_Handler,Dummy_Handler + + .weak DMAC_3_Handler + .thumb_set DMAC_3_Handler,Dummy_Handler + + .weak DMAC_4_Handler + .thumb_set DMAC_4_Handler,Dummy_Handler + + .weak EVSYS_0_Handler + .thumb_set EVSYS_0_Handler,Dummy_Handler + + .weak EVSYS_1_Handler + .thumb_set EVSYS_1_Handler,Dummy_Handler + + .weak EVSYS_2_Handler + .thumb_set EVSYS_2_Handler,Dummy_Handler + + .weak EVSYS_3_Handler + .thumb_set EVSYS_3_Handler,Dummy_Handler + + .weak EVSYS_4_Handler + .thumb_set EVSYS_4_Handler,Dummy_Handler + + .weak PAC_Handler + .thumb_set PAC_Handler,Dummy_Handler + + .weak TAL_0_Handler + .thumb_set TAL_0_Handler,Dummy_Handler + + .weak TAL_1_Handler + .thumb_set TAL_1_Handler,Dummy_Handler + + .weak RAMECC_Handler + .thumb_set RAMECC_Handler,Dummy_Handler + + .weak SERCOM0_0_Handler + .thumb_set SERCOM0_0_Handler,Dummy_Handler + + .weak SERCOM0_1_Handler + .thumb_set SERCOM0_1_Handler,Dummy_Handler + + .weak SERCOM0_2_Handler + .thumb_set SERCOM0_2_Handler,Dummy_Handler + + .weak SERCOM0_3_Handler + .thumb_set SERCOM0_3_Handler,Dummy_Handler + + .weak SERCOM1_0_Handler + .thumb_set SERCOM1_0_Handler,Dummy_Handler + + .weak SERCOM1_1_Handler + .thumb_set SERCOM1_1_Handler,Dummy_Handler + + .weak SERCOM1_2_Handler + .thumb_set SERCOM1_2_Handler,Dummy_Handler + + .weak SERCOM1_3_Handler + .thumb_set SERCOM1_3_Handler,Dummy_Handler + + .weak SERCOM2_0_Handler + .thumb_set SERCOM2_0_Handler,Dummy_Handler + + .weak SERCOM2_1_Handler + .thumb_set SERCOM2_1_Handler,Dummy_Handler + + .weak SERCOM2_2_Handler + .thumb_set SERCOM2_2_Handler,Dummy_Handler + + .weak SERCOM2_3_Handler + .thumb_set SERCOM2_3_Handler,Dummy_Handler + + .weak SERCOM3_0_Handler + .thumb_set SERCOM3_0_Handler,Dummy_Handler + + .weak SERCOM3_1_Handler + .thumb_set SERCOM3_1_Handler,Dummy_Handler + + .weak SERCOM3_2_Handler + .thumb_set SERCOM3_2_Handler,Dummy_Handler + + .weak SERCOM3_3_Handler + .thumb_set SERCOM3_3_Handler,Dummy_Handler + + .weak SERCOM4_0_Handler + .thumb_set SERCOM4_0_Handler,Dummy_Handler + + .weak SERCOM4_1_Handler + .thumb_set SERCOM4_1_Handler,Dummy_Handler + + .weak SERCOM4_2_Handler + .thumb_set SERCOM4_2_Handler,Dummy_Handler + + .weak SERCOM4_3_Handler + .thumb_set SERCOM4_3_Handler,Dummy_Handler + + .weak SERCOM5_0_Handler + .thumb_set SERCOM5_0_Handler,Dummy_Handler + + .weak SERCOM5_1_Handler + .thumb_set SERCOM5_1_Handler,Dummy_Handler + + .weak SERCOM5_2_Handler + .thumb_set SERCOM5_2_Handler,Dummy_Handler + + .weak SERCOM5_3_Handler + .thumb_set SERCOM5_3_Handler,Dummy_Handler + + .weak USB_0_Handler + .thumb_set USB_0_Handler,Dummy_Handler + + .weak USB_1_Handler + .thumb_set USB_1_Handler,Dummy_Handler + + .weak USB_2_Handler + .thumb_set USB_2_Handler,Dummy_Handler + + .weak USB_3_Handler + .thumb_set USB_3_Handler,Dummy_Handler + + .weak TCC0_0_Handler + .thumb_set TCC0_0_Handler,Dummy_Handler + + .weak TCC0_1_Handler + .thumb_set TCC0_1_Handler,Dummy_Handler + + .weak TCC0_2_Handler + .thumb_set TCC0_2_Handler,Dummy_Handler + + .weak TCC0_3_Handler + .thumb_set TCC0_3_Handler,Dummy_Handler + + .weak TCC0_4_Handler + .thumb_set TCC0_4_Handler,Dummy_Handler + + .weak TCC0_5_Handler + .thumb_set TCC0_5_Handler,Dummy_Handler + + .weak TCC0_6_Handler + .thumb_set TCC0_6_Handler,Dummy_Handler + + .weak TCC1_0_Handler + .thumb_set TCC1_0_Handler,Dummy_Handler + + .weak TCC1_1_Handler + .thumb_set TCC1_1_Handler,Dummy_Handler + + .weak TCC1_2_Handler + .thumb_set TCC1_2_Handler,Dummy_Handler + + .weak TCC1_3_Handler + .thumb_set TCC1_3_Handler,Dummy_Handler + + .weak TCC1_4_Handler + .thumb_set TCC1_4_Handler,Dummy_Handler + + .weak TCC2_0_Handler + .thumb_set TCC2_0_Handler,Dummy_Handler + + .weak TCC2_1_Handler + .thumb_set TCC2_1_Handler,Dummy_Handler + + .weak TCC2_2_Handler + .thumb_set TCC2_2_Handler,Dummy_Handler + + .weak TCC2_3_Handler + .thumb_set TCC2_3_Handler,Dummy_Handler + + .weak TCC3_0_Handler + .thumb_set TCC3_0_Handler,Dummy_Handler + + .weak TCC3_1_Handler + .thumb_set TCC3_1_Handler,Dummy_Handler + + .weak TCC3_2_Handler + .thumb_set TCC3_2_Handler,Dummy_Handler + + .weak TCC4_0_Handler + .thumb_set TCC4_0_Handler,Dummy_Handler + + .weak TCC4_1_Handler + .thumb_set TCC4_1_Handler,Dummy_Handler + + .weak TCC4_2_Handler + .thumb_set TCC4_2_Handler,Dummy_Handler + + .weak TC0_Handler + .thumb_set TC0_Handler,Dummy_Handler + + .weak TC1_Handler + .thumb_set TC1_Handler,Dummy_Handler + + .weak TC2_Handler + .thumb_set TC2_Handler,Dummy_Handler + + .weak TC3_Handler + .thumb_set TC3_Handler,Dummy_Handler + + .weak TC4_Handler + .thumb_set TC4_Handler,Dummy_Handler + + .weak TC5_Handler + .thumb_set TC5_Handler,Dummy_Handler + + .weak PDEC_0_Handler + .thumb_set PDEC_0_Handler,Dummy_Handler + + .weak PDEC_1_Handler + .thumb_set PDEC_1_Handler,Dummy_Handler + + .weak PDEC_2_Handler + .thumb_set PDEC_2_Handler,Dummy_Handler + + .weak ADC0_0_Handler + .thumb_set ADC0_0_Handler,Dummy_Handler + + .weak ADC0_1_Handler + .thumb_set ADC0_1_Handler,Dummy_Handler + + .weak ADC1_0_Handler + .thumb_set ADC1_0_Handler,Dummy_Handler + + .weak ADC1_1_Handler + .thumb_set ADC1_1_Handler,Dummy_Handler + + .weak AC_Handler + .thumb_set AC_Handler,Dummy_Handler + + .weak DAC_0_Handler + .thumb_set DAC_0_Handler,Dummy_Handler + + .weak DAC_1_Handler + .thumb_set DAC_1_Handler,Dummy_Handler + + .weak DAC_2_Handler + .thumb_set DAC_2_Handler,Dummy_Handler + + .weak DAC_3_Handler + .thumb_set DAC_3_Handler,Dummy_Handler + + .weak DAC_4_Handler + .thumb_set DAC_4_Handler,Dummy_Handler + + .weak I2S_Handler + .thumb_set I2S_Handler,Dummy_Handler + + .weak PCC_Handler + .thumb_set PCC_Handler,Dummy_Handler + + .weak AES_Handler + .thumb_set AES_Handler,Dummy_Handler + + .weak TRNG_Handler + .thumb_set TRNG_Handler,Dummy_Handler + + .weak ICM_Handler + .thumb_set ICM_Handler,Dummy_Handler + + .weak QSPI_Handler + .thumb_set QSPI_Handler,Dummy_Handler + + .weak SDHC0_Handler + .thumb_set SDHC0_Handler,Dummy_Handler + +#else + + .thumb_func + .weak PM_Handler +PM_Handler: + b . + + .thumb_func + .weak MCLK_Handler +MCLK_Handler: + b . + + .thumb_func + .weak OSCCTRL_0_Handler +OSCCTRL_0_Handler: + b . + + .thumb_func + .weak OSCCTRL_1_Handler +OSCCTRL_1_Handler: + b . + + .thumb_func + .weak OSCCTRL_2_Handler +OSCCTRL_2_Handler: + b . + + .thumb_func + .weak OSCCTRL_3_Handler +OSCCTRL_3_Handler: + b . + + .thumb_func + .weak OSCCTRL_4_Handler +OSCCTRL_4_Handler: + b . + + .thumb_func + .weak OSC32KCTRL_Handler +OSC32KCTRL_Handler: + b . + + .thumb_func + .weak SUPC_0_Handler +SUPC_0_Handler: + b . + + .thumb_func + .weak SUPC_1_Handler +SUPC_1_Handler: + b . + + .thumb_func + .weak WDT_Handler +WDT_Handler: + b . + + .thumb_func + .weak RTC_Handler +RTC_Handler: + b . + + .thumb_func + .weak EIC_0_Handler +EIC_0_Handler: + b . + + .thumb_func + .weak EIC_1_Handler +EIC_1_Handler: + b . + + .thumb_func + .weak EIC_2_Handler +EIC_2_Handler: + b . + + .thumb_func + .weak EIC_3_Handler +EIC_3_Handler: + b . + + .thumb_func + .weak EIC_4_Handler +EIC_4_Handler: + b . + + .thumb_func + .weak EIC_5_Handler +EIC_5_Handler: + b . + + .thumb_func + .weak EIC_6_Handler +EIC_6_Handler: + b . + + .thumb_func + .weak EIC_7_Handler +EIC_7_Handler: + b . + + .thumb_func + .weak EIC_8_Handler +EIC_8_Handler: + b . + + .thumb_func + .weak EIC_9_Handler +EIC_9_Handler: + b . + + .thumb_func + .weak EIC_10_Handler +EIC_10_Handler: + b . + + .thumb_func + .weak EIC_11_Handler +EIC_11_Handler: + b . + + .thumb_func + .weak EIC_12_Handler +EIC_12_Handler: + b . + + .thumb_func + .weak EIC_13_Handler +EIC_13_Handler: + b . + + .thumb_func + .weak EIC_14_Handler +EIC_14_Handler: + b . + + .thumb_func + .weak EIC_15_Handler +EIC_15_Handler: + b . + + .thumb_func + .weak FREQM_Handler +FREQM_Handler: + b . + + .thumb_func + .weak NVMCTRL_0_Handler +NVMCTRL_0_Handler: + b . + + .thumb_func + .weak NVMCTRL_1_Handler +NVMCTRL_1_Handler: + b . + + .thumb_func + .weak DMAC_0_Handler +DMAC_0_Handler: + b . + + .thumb_func + .weak DMAC_1_Handler +DMAC_1_Handler: + b . + + .thumb_func + .weak DMAC_2_Handler +DMAC_2_Handler: + b . + + .thumb_func + .weak DMAC_3_Handler +DMAC_3_Handler: + b . + + .thumb_func + .weak DMAC_4_Handler +DMAC_4_Handler: + b . + + .thumb_func + .weak EVSYS_0_Handler +EVSYS_0_Handler: + b . + + .thumb_func + .weak EVSYS_1_Handler +EVSYS_1_Handler: + b . + + .thumb_func + .weak EVSYS_2_Handler +EVSYS_2_Handler: + b . + + .thumb_func + .weak EVSYS_3_Handler +EVSYS_3_Handler: + b . + + .thumb_func + .weak EVSYS_4_Handler +EVSYS_4_Handler: + b . + + .thumb_func + .weak PAC_Handler +PAC_Handler: + b . + + .thumb_func + .weak TAL_0_Handler +TAL_0_Handler: + b . + + .thumb_func + .weak TAL_1_Handler +TAL_1_Handler: + b . + + .thumb_func + .weak RAMECC_Handler +RAMECC_Handler: + b . + + .thumb_func + .weak SERCOM0_0_Handler +SERCOM0_0_Handler: + b . + + .thumb_func + .weak SERCOM0_1_Handler +SERCOM0_1_Handler: + b . + + .thumb_func + .weak SERCOM0_2_Handler +SERCOM0_2_Handler: + b . + + .thumb_func + .weak SERCOM0_3_Handler +SERCOM0_3_Handler: + b . + + .thumb_func + .weak SERCOM1_0_Handler +SERCOM1_0_Handler: + b . + + .thumb_func + .weak SERCOM1_1_Handler +SERCOM1_1_Handler: + b . + + .thumb_func + .weak SERCOM1_2_Handler +SERCOM1_2_Handler: + b . + + .thumb_func + .weak SERCOM1_3_Handler +SERCOM1_3_Handler: + b . + + .thumb_func + .weak SERCOM2_0_Handler +SERCOM2_0_Handler: + b . + + .thumb_func + .weak SERCOM2_1_Handler +SERCOM2_1_Handler: + b . + + .thumb_func + .weak SERCOM2_2_Handler +SERCOM2_2_Handler: + b . + + .thumb_func + .weak SERCOM2_3_Handler +SERCOM2_3_Handler: + b . + + .thumb_func + .weak SERCOM3_0_Handler +SERCOM3_0_Handler: + b . + + .thumb_func + .weak SERCOM3_1_Handler +SERCOM3_1_Handler: + b . + + .thumb_func + .weak SERCOM3_2_Handler +SERCOM3_2_Handler: + b . + + .thumb_func + .weak SERCOM3_3_Handler +SERCOM3_3_Handler: + b . + + .thumb_func + .weak SERCOM4_0_Handler +SERCOM4_0_Handler: + b . + + .thumb_func + .weak SERCOM4_1_Handler +SERCOM4_1_Handler: + b . + + .thumb_func + .weak SERCOM4_2_Handler +SERCOM4_2_Handler: + b . + + .thumb_func + .weak SERCOM4_3_Handler +SERCOM4_3_Handler: + b . + + .thumb_func + .weak SERCOM5_0_Handler +SERCOM5_0_Handler: + b . + + .thumb_func + .weak SERCOM5_1_Handler +SERCOM5_1_Handler: + b . + + .thumb_func + .weak SERCOM5_2_Handler +SERCOM5_2_Handler: + b . + + .thumb_func + .weak SERCOM5_3_Handler +SERCOM5_3_Handler: + b . + + .thumb_func + .weak USB_0_Handler +USB_0_Handler: + b . + + .thumb_func + .weak USB_1_Handler +USB_1_Handler: + b . + + .thumb_func + .weak USB_2_Handler +USB_2_Handler: + b . + + .thumb_func + .weak USB_3_Handler +USB_3_Handler: + b . + + .thumb_func + .weak TCC0_0_Handler +TCC0_0_Handler: + b . + + .thumb_func + .weak TCC0_1_Handler +TCC0_1_Handler: + b . + + .thumb_func + .weak TCC0_2_Handler +TCC0_2_Handler: + b . + + .thumb_func + .weak TCC0_3_Handler +TCC0_3_Handler: + b . + + .thumb_func + .weak TCC0_4_Handler +TCC0_4_Handler: + b . + + .thumb_func + .weak TCC0_5_Handler +TCC0_5_Handler: + b . + + .thumb_func + .weak TCC0_6_Handler +TCC0_6_Handler: + b . + + .thumb_func + .weak TCC1_0_Handler +TCC1_0_Handler: + b . + + .thumb_func + .weak TCC1_1_Handler +TCC1_1_Handler: + b . + + .thumb_func + .weak TCC1_2_Handler +TCC1_2_Handler: + b . + + .thumb_func + .weak TCC1_3_Handler +TCC1_3_Handler: + b . + + .thumb_func + .weak TCC1_4_Handler +TCC1_4_Handler: + b . + + .thumb_func + .weak TCC2_0_Handler +TCC2_0_Handler: + b . + + .thumb_func + .weak TCC2_1_Handler +TCC2_1_Handler: + b . + + .thumb_func + .weak TCC2_2_Handler +TCC2_2_Handler: + b . + + .thumb_func + .weak TCC2_3_Handler +TCC2_3_Handler: + b . + + .thumb_func + .weak TCC3_0_Handler +TCC3_0_Handler: + b . + + .thumb_func + .weak TCC3_1_Handler +TCC3_1_Handler: + b . + + .thumb_func + .weak TCC3_2_Handler +TCC3_2_Handler: + b . + + .thumb_func + .weak TCC4_0_Handler +TCC4_0_Handler: + b . + + .thumb_func + .weak TCC4_1_Handler +TCC4_1_Handler: + b . + + .thumb_func + .weak TCC4_2_Handler +TCC4_2_Handler: + b . + + .thumb_func + .weak TC0_Handler +TC0_Handler: + b . + + .thumb_func + .weak TC1_Handler +TC1_Handler: + b . + + .thumb_func + .weak TC2_Handler +TC2_Handler: + b . + + .thumb_func + .weak TC3_Handler +TC3_Handler: + b . + + .thumb_func + .weak TC4_Handler +TC4_Handler: + b . + + .thumb_func + .weak TC5_Handler +TC5_Handler: + b . + + .thumb_func + .weak PDEC_0_Handler +PDEC_0_Handler: + b . + + .thumb_func + .weak PDEC_1_Handler +PDEC_1_Handler: + b . + + .thumb_func + .weak PDEC_2_Handler +PDEC_2_Handler: + b . + + .thumb_func + .weak ADC0_0_Handler +ADC0_0_Handler: + b . + + .thumb_func + .weak ADC0_1_Handler +ADC0_1_Handler: + b . + + .thumb_func + .weak ADC1_0_Handler +ADC1_0_Handler: + b . + + .thumb_func + .weak ADC1_1_Handler +ADC1_1_Handler: + b . + + .thumb_func + .weak AC_Handler +AC_Handler: + b . + + .thumb_func + .weak DAC_0_Handler +DAC_0_Handler: + b . + + .thumb_func + .weak DAC_1_Handler +DAC_1_Handler: + b . + + .thumb_func + .weak DAC_2_Handler +DAC_2_Handler: + b . + + .thumb_func + .weak DAC_3_Handler +DAC_3_Handler: + b . + + .thumb_func + .weak DAC_4_Handler +DAC_4_Handler: + b . + + .thumb_func + .weak I2S_Handler +I2S_Handler: + b . + + .thumb_func + .weak PCC_Handler +PCC_Handler: + b . + + .thumb_func + .weak AES_Handler +AES_Handler: + b . + + .thumb_func + .weak TRNG_Handler +TRNG_Handler: + b . + + .thumb_func + .weak ICM_Handler +ICM_Handler: + b . + + .thumb_func + .weak QSPI_Handler +QSPI_Handler: + b . + + .thumb_func + .weak SDHC0_Handler +SDHC0_Handler: + b . + +#endif + +/***************************************************************************** + * Vector Table * + *****************************************************************************/ + + .section .vectors, "ax" + .align 0 + .global _vectors + .extern __stack_end__ +#ifdef STARTUP_FROM_RESET + .extern Reset_Handler +#endif + +_vectors: + .word __stack_end__ +#ifdef STARTUP_FROM_RESET + .word Reset_Handler +#else + .word Reset_Wait +#endif + .word NMI_Handler + .word HardFault_Handler + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word SVC_Handler + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word PendSV_Handler + .word SysTick_Handler + .word PM_Handler + .word MCLK_Handler + .word OSCCTRL_0_Handler + .word OSCCTRL_1_Handler + .word OSCCTRL_2_Handler + .word OSCCTRL_3_Handler + .word OSCCTRL_4_Handler + .word OSC32KCTRL_Handler + .word SUPC_0_Handler + .word SUPC_1_Handler + .word WDT_Handler + .word RTC_Handler + .word EIC_0_Handler + .word EIC_1_Handler + .word EIC_2_Handler + .word EIC_3_Handler + .word EIC_4_Handler + .word EIC_5_Handler + .word EIC_6_Handler + .word EIC_7_Handler + .word EIC_8_Handler + .word EIC_9_Handler + .word EIC_10_Handler + .word EIC_11_Handler + .word EIC_12_Handler + .word EIC_13_Handler + .word EIC_14_Handler + .word EIC_15_Handler + .word FREQM_Handler + .word NVMCTRL_0_Handler + .word NVMCTRL_1_Handler + .word DMAC_0_Handler + .word DMAC_1_Handler + .word DMAC_2_Handler + .word DMAC_3_Handler + .word DMAC_4_Handler + .word EVSYS_0_Handler + .word EVSYS_1_Handler + .word EVSYS_2_Handler + .word EVSYS_3_Handler + .word EVSYS_4_Handler + .word PAC_Handler + .word TAL_0_Handler + .word TAL_1_Handler + .word Dummy_Handler /* Reserved */ + .word RAMECC_Handler + .word SERCOM0_0_Handler + .word SERCOM0_1_Handler + .word SERCOM0_2_Handler + .word SERCOM0_3_Handler + .word SERCOM1_0_Handler + .word SERCOM1_1_Handler + .word SERCOM1_2_Handler + .word SERCOM1_3_Handler + .word SERCOM2_0_Handler + .word SERCOM2_1_Handler + .word SERCOM2_2_Handler + .word SERCOM2_3_Handler + .word SERCOM3_0_Handler + .word SERCOM3_1_Handler + .word SERCOM3_2_Handler + .word SERCOM3_3_Handler + .word SERCOM4_0_Handler + .word SERCOM4_1_Handler + .word SERCOM4_2_Handler + .word SERCOM4_3_Handler + .word SERCOM5_0_Handler + .word SERCOM5_1_Handler + .word SERCOM5_2_Handler + .word SERCOM5_3_Handler + .word Dummy_Handler /* Reserved */ + .word Dummy_Handler /* Reserved */ + .word Dummy_Handler /* Reserved */ + .word Dummy_Handler /* Reserved */ + .word Dummy_Handler /* Reserved */ + .word Dummy_Handler /* Reserved */ + .word Dummy_Handler /* Reserved */ + .word Dummy_Handler /* Reserved */ + .word Dummy_Handler /* Reserved */ + .word Dummy_Handler /* Reserved */ + .word USB_0_Handler + .word USB_1_Handler + .word USB_2_Handler + .word USB_3_Handler + .word Dummy_Handler /* Reserved */ + .word TCC0_0_Handler + .word TCC0_1_Handler + .word TCC0_2_Handler + .word TCC0_3_Handler + .word TCC0_4_Handler + .word TCC0_5_Handler + .word TCC0_6_Handler + .word TCC1_0_Handler + .word TCC1_1_Handler + .word TCC1_2_Handler + .word TCC1_3_Handler + .word TCC1_4_Handler + .word TCC2_0_Handler + .word TCC2_1_Handler + .word TCC2_2_Handler + .word TCC2_3_Handler + .word TCC3_0_Handler + .word TCC3_1_Handler + .word TCC3_2_Handler + .word TCC4_0_Handler + .word TCC4_1_Handler + .word TCC4_2_Handler + .word TC0_Handler + .word TC1_Handler + .word TC2_Handler + .word TC3_Handler + .word TC4_Handler + .word TC5_Handler + .word Dummy_Handler /* Reserved */ + .word Dummy_Handler /* Reserved */ + .word PDEC_0_Handler + .word PDEC_1_Handler + .word PDEC_2_Handler + .word ADC0_0_Handler + .word ADC0_1_Handler + .word ADC1_0_Handler + .word ADC1_1_Handler + .word AC_Handler + .word DAC_0_Handler + .word DAC_1_Handler + .word DAC_2_Handler + .word DAC_3_Handler + .word DAC_4_Handler + .word I2S_Handler + .word PCC_Handler + .word AES_Handler + .word TRNG_Handler + .word ICM_Handler + .word Dummy_Handler /* Reserved */ + .word QSPI_Handler + .word SDHC0_Handler +_vectors_end: + +#ifdef VECTORS_IN_RAM + .section .vectors_ram, "ax" + .align 0 + .global _vectors_ram + +_vectors_ram: + .space _vectors_end - _vectors, 0 +#endif diff --git a/examples/device/device_composite/ses/ses_samd51/ATSAME51J19A_Vectors.s b/examples/device/device_composite/ses/ses_samd51/ATSAME51J19A_Vectors.s deleted file mode 100644 index 20ca0467..00000000 --- a/examples/device/device_composite/ses/ses_samd51/ATSAME51J19A_Vectors.s +++ /dev/null @@ -1,1223 +0,0 @@ -/***************************************************************************** - * SEGGER Microcontroller GmbH & Co. KG * - * Solutions for real time microcontroller applications * - ***************************************************************************** - * * - * (c) 2017 SEGGER Microcontroller GmbH & Co. KG * - * * - * Internet: www.segger.com Support: support@segger.com * - * * - *****************************************************************************/ - -/***************************************************************************** - * Preprocessor Definitions * - * ------------------------ * - * VECTORS_IN_RAM * - * * - * If defined, an area of RAM will large enough to store the vector table * - * will be reserved. * - * * - *****************************************************************************/ - - .syntax unified - .code 16 - - .section .init, "ax" - .align 0 - -/***************************************************************************** - * Default Exception Handlers * - *****************************************************************************/ - - .thumb_func - .weak NMI_Handler -NMI_Handler: - b . - - .thumb_func - .weak HardFault_Handler -HardFault_Handler: - b . - - .thumb_func - .weak SVC_Handler -SVC_Handler: - b . - - .thumb_func - .weak PendSV_Handler -PendSV_Handler: - b . - - .thumb_func - .weak SysTick_Handler -SysTick_Handler: - b . - - .thumb_func -Dummy_Handler: - b . - -#if defined(__OPTIMIZATION_SMALL) - - .weak PM_INTREQ_IRQHandler - .thumb_set PM_INTREQ_IRQHandler,Dummy_Handler - - .weak MCLK_INTREQ_IRQHandler - .thumb_set MCLK_INTREQ_IRQHandler,Dummy_Handler - - .weak OSCCTRL_INTREQ_0_IRQHandler - .thumb_set OSCCTRL_INTREQ_0_IRQHandler,Dummy_Handler - - .weak OSCCTRL_INTREQ_1_IRQHandler - .thumb_set OSCCTRL_INTREQ_1_IRQHandler,Dummy_Handler - - .weak OSCCTRL_INTREQ_2_IRQHandler - .thumb_set OSCCTRL_INTREQ_2_IRQHandler,Dummy_Handler - - .weak OSCCTRL_INTREQ_3_IRQHandler - .thumb_set OSCCTRL_INTREQ_3_IRQHandler,Dummy_Handler - - .weak OSCCTRL_INTREQ_4_IRQHandler - .thumb_set OSCCTRL_INTREQ_4_IRQHandler,Dummy_Handler - - .weak OSC32KCTRL_INTREQ_IRQHandler - .thumb_set OSC32KCTRL_INTREQ_IRQHandler,Dummy_Handler - - .weak SUPC_INTREQ_0_IRQHandler - .thumb_set SUPC_INTREQ_0_IRQHandler,Dummy_Handler - - .weak SUPC_INTREQ_1_IRQHandler - .thumb_set SUPC_INTREQ_1_IRQHandler,Dummy_Handler - - .weak WDT_INTREQ_IRQHandler - .thumb_set WDT_INTREQ_IRQHandler,Dummy_Handler - - .weak RTC_INTREQ_IRQHandler - .thumb_set RTC_INTREQ_IRQHandler,Dummy_Handler - - .weak EIC_INTREQ_0_IRQHandler - .thumb_set EIC_INTREQ_0_IRQHandler,Dummy_Handler - - .weak EIC_INTREQ_1_IRQHandler - .thumb_set EIC_INTREQ_1_IRQHandler,Dummy_Handler - - .weak EIC_INTREQ_2_IRQHandler - .thumb_set EIC_INTREQ_2_IRQHandler,Dummy_Handler - - .weak EIC_INTREQ_3_IRQHandler - .thumb_set EIC_INTREQ_3_IRQHandler,Dummy_Handler - - .weak EIC_INTREQ_4_IRQHandler - .thumb_set EIC_INTREQ_4_IRQHandler,Dummy_Handler - - .weak EIC_INTREQ_5_IRQHandler - .thumb_set EIC_INTREQ_5_IRQHandler,Dummy_Handler - - .weak EIC_INTREQ_6_IRQHandler - .thumb_set EIC_INTREQ_6_IRQHandler,Dummy_Handler - - .weak EIC_INTREQ_7_IRQHandler - .thumb_set EIC_INTREQ_7_IRQHandler,Dummy_Handler - - .weak EIC_INTREQ_8_IRQHandler - .thumb_set EIC_INTREQ_8_IRQHandler,Dummy_Handler - - .weak EIC_INTREQ_9_IRQHandler - .thumb_set EIC_INTREQ_9_IRQHandler,Dummy_Handler - - .weak EIC_INTREQ_10_IRQHandler - .thumb_set EIC_INTREQ_10_IRQHandler,Dummy_Handler - - .weak EIC_INTREQ_11_IRQHandler - .thumb_set EIC_INTREQ_11_IRQHandler,Dummy_Handler - - .weak EIC_INTREQ_12_IRQHandler - .thumb_set EIC_INTREQ_12_IRQHandler,Dummy_Handler - - .weak EIC_INTREQ_13_IRQHandler - .thumb_set EIC_INTREQ_13_IRQHandler,Dummy_Handler - - .weak EIC_INTREQ_14_IRQHandler - .thumb_set EIC_INTREQ_14_IRQHandler,Dummy_Handler - - .weak EIC_INTREQ_15_IRQHandler - .thumb_set EIC_INTREQ_15_IRQHandler,Dummy_Handler - - .weak FREQM_INTREQ_IRQHandler - .thumb_set FREQM_INTREQ_IRQHandler,Dummy_Handler - - .weak NVMCTRL_INTREQ_0_IRQHandler - .thumb_set NVMCTRL_INTREQ_0_IRQHandler,Dummy_Handler - - .weak NVMCTRL_INTREQ_1_IRQHandler - .thumb_set NVMCTRL_INTREQ_1_IRQHandler,Dummy_Handler - - .weak DMAC_INTREQ_0_IRQHandler - .thumb_set DMAC_INTREQ_0_IRQHandler,Dummy_Handler - - .weak DMAC_INTREQ_1_IRQHandler - .thumb_set DMAC_INTREQ_1_IRQHandler,Dummy_Handler - - .weak DMAC_INTREQ_2_IRQHandler - .thumb_set DMAC_INTREQ_2_IRQHandler,Dummy_Handler - - .weak DMAC_INTREQ_3_IRQHandler - .thumb_set DMAC_INTREQ_3_IRQHandler,Dummy_Handler - - .weak DMAC_INTREQ_4_IRQHandler - .thumb_set DMAC_INTREQ_4_IRQHandler,Dummy_Handler - - .weak EVSYS_INTREQ_0_IRQHandler - .thumb_set EVSYS_INTREQ_0_IRQHandler,Dummy_Handler - - .weak EVSYS_INTREQ_1_IRQHandler - .thumb_set EVSYS_INTREQ_1_IRQHandler,Dummy_Handler - - .weak EVSYS_INTREQ_2_IRQHandler - .thumb_set EVSYS_INTREQ_2_IRQHandler,Dummy_Handler - - .weak EVSYS_INTREQ_3_IRQHandler - .thumb_set EVSYS_INTREQ_3_IRQHandler,Dummy_Handler - - .weak EVSYS_INTREQ_4_IRQHandler - .thumb_set EVSYS_INTREQ_4_IRQHandler,Dummy_Handler - - .weak PAC_INTREQ_IRQHandler - .thumb_set PAC_INTREQ_IRQHandler,Dummy_Handler - - .weak TAL_INTREQ_0_IRQHandler - .thumb_set TAL_INTREQ_0_IRQHandler,Dummy_Handler - - .weak TAL_INTREQ_1_IRQHandler - .thumb_set TAL_INTREQ_1_IRQHandler,Dummy_Handler - - .weak RAMECC_INTREQ_IRQHandler - .thumb_set RAMECC_INTREQ_IRQHandler,Dummy_Handler - - .weak SERCOM0_INTREQ_0_IRQHandler - .thumb_set SERCOM0_INTREQ_0_IRQHandler,Dummy_Handler - - .weak SERCOM0_INTREQ_1_IRQHandler - .thumb_set SERCOM0_INTREQ_1_IRQHandler,Dummy_Handler - - .weak SERCOM0_INTREQ_2_IRQHandler - .thumb_set SERCOM0_INTREQ_2_IRQHandler,Dummy_Handler - - .weak SERCOM0_INTREQ_3_IRQHandler - .thumb_set SERCOM0_INTREQ_3_IRQHandler,Dummy_Handler - - .weak SERCOM1_INTREQ_0_IRQHandler - .thumb_set SERCOM1_INTREQ_0_IRQHandler,Dummy_Handler - - .weak SERCOM1_INTREQ_1_IRQHandler - .thumb_set SERCOM1_INTREQ_1_IRQHandler,Dummy_Handler - - .weak SERCOM1_INTREQ_2_IRQHandler - .thumb_set SERCOM1_INTREQ_2_IRQHandler,Dummy_Handler - - .weak SERCOM1_INTREQ_3_IRQHandler - .thumb_set SERCOM1_INTREQ_3_IRQHandler,Dummy_Handler - - .weak SERCOM2_INTREQ_0_IRQHandler - .thumb_set SERCOM2_INTREQ_0_IRQHandler,Dummy_Handler - - .weak SERCOM2_INTREQ_1_IRQHandler - .thumb_set SERCOM2_INTREQ_1_IRQHandler,Dummy_Handler - - .weak SERCOM2_INTREQ_2_IRQHandler - .thumb_set SERCOM2_INTREQ_2_IRQHandler,Dummy_Handler - - .weak SERCOM2_INTREQ_3_IRQHandler - .thumb_set SERCOM2_INTREQ_3_IRQHandler,Dummy_Handler - - .weak SERCOM3_INTREQ_0_IRQHandler - .thumb_set SERCOM3_INTREQ_0_IRQHandler,Dummy_Handler - - .weak SERCOM3_INTREQ_1_IRQHandler - .thumb_set SERCOM3_INTREQ_1_IRQHandler,Dummy_Handler - - .weak SERCOM3_INTREQ_2_IRQHandler - .thumb_set SERCOM3_INTREQ_2_IRQHandler,Dummy_Handler - - .weak SERCOM3_INTREQ_3_IRQHandler - .thumb_set SERCOM3_INTREQ_3_IRQHandler,Dummy_Handler - - .weak SERCOM4_INTREQ_0_IRQHandler - .thumb_set SERCOM4_INTREQ_0_IRQHandler,Dummy_Handler - - .weak SERCOM4_INTREQ_1_IRQHandler - .thumb_set SERCOM4_INTREQ_1_IRQHandler,Dummy_Handler - - .weak SERCOM4_INTREQ_2_IRQHandler - .thumb_set SERCOM4_INTREQ_2_IRQHandler,Dummy_Handler - - .weak SERCOM4_INTREQ_3_IRQHandler - .thumb_set SERCOM4_INTREQ_3_IRQHandler,Dummy_Handler - - .weak SERCOM5_INTREQ_0_IRQHandler - .thumb_set SERCOM5_INTREQ_0_IRQHandler,Dummy_Handler - - .weak SERCOM5_INTREQ_1_IRQHandler - .thumb_set SERCOM5_INTREQ_1_IRQHandler,Dummy_Handler - - .weak SERCOM5_INTREQ_2_IRQHandler - .thumb_set SERCOM5_INTREQ_2_IRQHandler,Dummy_Handler - - .weak SERCOM5_INTREQ_3_IRQHandler - .thumb_set SERCOM5_INTREQ_3_IRQHandler,Dummy_Handler - - .weak CAN0_INTREQ_IRQHandler - .thumb_set CAN0_INTREQ_IRQHandler,Dummy_Handler - - .weak CAN1_INTREQ_IRQHandler - .thumb_set CAN1_INTREQ_IRQHandler,Dummy_Handler - - .weak USB_INTREQ_0_IRQHandler - .thumb_set USB_INTREQ_0_IRQHandler,Dummy_Handler - - .weak USB_INTREQ_1_IRQHandler - .thumb_set USB_INTREQ_1_IRQHandler,Dummy_Handler - - .weak USB_INTREQ_2_IRQHandler - .thumb_set USB_INTREQ_2_IRQHandler,Dummy_Handler - - .weak USB_INTREQ_3_IRQHandler - .thumb_set USB_INTREQ_3_IRQHandler,Dummy_Handler - - .weak TCC0_INTREQ_0_IRQHandler - .thumb_set TCC0_INTREQ_0_IRQHandler,Dummy_Handler - - .weak TCC0_INTREQ_1_IRQHandler - .thumb_set TCC0_INTREQ_1_IRQHandler,Dummy_Handler - - .weak TCC0_INTREQ_2_IRQHandler - .thumb_set TCC0_INTREQ_2_IRQHandler,Dummy_Handler - - .weak TCC0_INTREQ_3_IRQHandler - .thumb_set TCC0_INTREQ_3_IRQHandler,Dummy_Handler - - .weak TCC0_INTREQ_4_IRQHandler - .thumb_set TCC0_INTREQ_4_IRQHandler,Dummy_Handler - - .weak TCC0_INTREQ_5_IRQHandler - .thumb_set TCC0_INTREQ_5_IRQHandler,Dummy_Handler - - .weak TCC0_INTREQ_6_IRQHandler - .thumb_set TCC0_INTREQ_6_IRQHandler,Dummy_Handler - - .weak TCC1_INTREQ_0_IRQHandler - .thumb_set TCC1_INTREQ_0_IRQHandler,Dummy_Handler - - .weak TCC1_INTREQ_1_IRQHandler - .thumb_set TCC1_INTREQ_1_IRQHandler,Dummy_Handler - - .weak TCC1_INTREQ_2_IRQHandler - .thumb_set TCC1_INTREQ_2_IRQHandler,Dummy_Handler - - .weak TCC1_INTREQ_3_IRQHandler - .thumb_set TCC1_INTREQ_3_IRQHandler,Dummy_Handler - - .weak TCC1_INTREQ_4_IRQHandler - .thumb_set TCC1_INTREQ_4_IRQHandler,Dummy_Handler - - .weak TCC2_INTREQ_0_IRQHandler - .thumb_set TCC2_INTREQ_0_IRQHandler,Dummy_Handler - - .weak TCC2_INTREQ_1_IRQHandler - .thumb_set TCC2_INTREQ_1_IRQHandler,Dummy_Handler - - .weak TCC2_INTREQ_2_IRQHandler - .thumb_set TCC2_INTREQ_2_IRQHandler,Dummy_Handler - - .weak TCC2_INTREQ_3_IRQHandler - .thumb_set TCC2_INTREQ_3_IRQHandler,Dummy_Handler - - .weak TCC3_INTREQ_0_IRQHandler - .thumb_set TCC3_INTREQ_0_IRQHandler,Dummy_Handler - - .weak TCC3_INTREQ_1_IRQHandler - .thumb_set TCC3_INTREQ_1_IRQHandler,Dummy_Handler - - .weak TCC3_INTREQ_2_IRQHandler - .thumb_set TCC3_INTREQ_2_IRQHandler,Dummy_Handler - - .weak TCC4_INTREQ_0_IRQHandler - .thumb_set TCC4_INTREQ_0_IRQHandler,Dummy_Handler - - .weak TCC4_INTREQ_1_IRQHandler - .thumb_set TCC4_INTREQ_1_IRQHandler,Dummy_Handler - - .weak TCC4_INTREQ_2_IRQHandler - .thumb_set TCC4_INTREQ_2_IRQHandler,Dummy_Handler - - .weak TC0_INTREQ_IRQHandler - .thumb_set TC0_INTREQ_IRQHandler,Dummy_Handler - - .weak TC1_INTREQ_IRQHandler - .thumb_set TC1_INTREQ_IRQHandler,Dummy_Handler - - .weak TC2_INTREQ_IRQHandler - .thumb_set TC2_INTREQ_IRQHandler,Dummy_Handler - - .weak TC3_INTREQ_IRQHandler - .thumb_set TC3_INTREQ_IRQHandler,Dummy_Handler - - .weak TC4_INTREQ_IRQHandler - .thumb_set TC4_INTREQ_IRQHandler,Dummy_Handler - - .weak TC5_INTREQ_IRQHandler - .thumb_set TC5_INTREQ_IRQHandler,Dummy_Handler - - .weak PDEC_INTREQ_0_IRQHandler - .thumb_set PDEC_INTREQ_0_IRQHandler,Dummy_Handler - - .weak PDEC_INTREQ_1_IRQHandler - .thumb_set PDEC_INTREQ_1_IRQHandler,Dummy_Handler - - .weak PDEC_INTREQ_2_IRQHandler - .thumb_set PDEC_INTREQ_2_IRQHandler,Dummy_Handler - - .weak ADC0_INTREQ_0_IRQHandler - .thumb_set ADC0_INTREQ_0_IRQHandler,Dummy_Handler - - .weak ADC0_INTREQ_1_IRQHandler - .thumb_set ADC0_INTREQ_1_IRQHandler,Dummy_Handler - - .weak ADC1_INTREQ_0_IRQHandler - .thumb_set ADC1_INTREQ_0_IRQHandler,Dummy_Handler - - .weak ADC1_INTREQ_1_IRQHandler - .thumb_set ADC1_INTREQ_1_IRQHandler,Dummy_Handler - - .weak AC_INTREQ_IRQHandler - .thumb_set AC_INTREQ_IRQHandler,Dummy_Handler - - .weak DAC_INTREQ_0_IRQHandler - .thumb_set DAC_INTREQ_0_IRQHandler,Dummy_Handler - - .weak DAC_INTREQ_1_IRQHandler - .thumb_set DAC_INTREQ_1_IRQHandler,Dummy_Handler - - .weak DAC_INTREQ_2_IRQHandler - .thumb_set DAC_INTREQ_2_IRQHandler,Dummy_Handler - - .weak DAC_INTREQ_3_IRQHandler - .thumb_set DAC_INTREQ_3_IRQHandler,Dummy_Handler - - .weak DAC_INTREQ_4_IRQHandler - .thumb_set DAC_INTREQ_4_IRQHandler,Dummy_Handler - - .weak I2S_INTREQ_IRQHandler - .thumb_set I2S_INTREQ_IRQHandler,Dummy_Handler - - .weak PCC_INTREQ_IRQHandler - .thumb_set PCC_INTREQ_IRQHandler,Dummy_Handler - - .weak AES_INTREQ_IRQHandler - .thumb_set AES_INTREQ_IRQHandler,Dummy_Handler - - .weak TRNG_INTREQ_IRQHandler - .thumb_set TRNG_INTREQ_IRQHandler,Dummy_Handler - - .weak ICM_INTREQ_IRQHandler - .thumb_set ICM_INTREQ_IRQHandler,Dummy_Handler - - .weak QSPI_INTREQ_IRQHandler - .thumb_set QSPI_INTREQ_IRQHandler,Dummy_Handler - - .weak SDHC0_INTREQ_IRQHandler - .thumb_set SDHC0_INTREQ_IRQHandler,Dummy_Handler - -#else - - .thumb_func - .weak PM_INTREQ_IRQHandler -PM_INTREQ_IRQHandler: - b . - - .thumb_func - .weak MCLK_INTREQ_IRQHandler -MCLK_INTREQ_IRQHandler: - b . - - .thumb_func - .weak OSCCTRL_INTREQ_0_IRQHandler -OSCCTRL_INTREQ_0_IRQHandler: - b . - - .thumb_func - .weak OSCCTRL_INTREQ_1_IRQHandler -OSCCTRL_INTREQ_1_IRQHandler: - b . - - .thumb_func - .weak OSCCTRL_INTREQ_2_IRQHandler -OSCCTRL_INTREQ_2_IRQHandler: - b . - - .thumb_func - .weak OSCCTRL_INTREQ_3_IRQHandler -OSCCTRL_INTREQ_3_IRQHandler: - b . - - .thumb_func - .weak OSCCTRL_INTREQ_4_IRQHandler -OSCCTRL_INTREQ_4_IRQHandler: - b . - - .thumb_func - .weak OSC32KCTRL_INTREQ_IRQHandler -OSC32KCTRL_INTREQ_IRQHandler: - b . - - .thumb_func - .weak SUPC_INTREQ_0_IRQHandler -SUPC_INTREQ_0_IRQHandler: - b . - - .thumb_func - .weak SUPC_INTREQ_1_IRQHandler -SUPC_INTREQ_1_IRQHandler: - b . - - .thumb_func - .weak WDT_INTREQ_IRQHandler -WDT_INTREQ_IRQHandler: - b . - - .thumb_func - .weak RTC_INTREQ_IRQHandler -RTC_INTREQ_IRQHandler: - b . - - .thumb_func - .weak EIC_INTREQ_0_IRQHandler -EIC_INTREQ_0_IRQHandler: - b . - - .thumb_func - .weak EIC_INTREQ_1_IRQHandler -EIC_INTREQ_1_IRQHandler: - b . - - .thumb_func - .weak EIC_INTREQ_2_IRQHandler -EIC_INTREQ_2_IRQHandler: - b . - - .thumb_func - .weak EIC_INTREQ_3_IRQHandler -EIC_INTREQ_3_IRQHandler: - b . - - .thumb_func - .weak EIC_INTREQ_4_IRQHandler -EIC_INTREQ_4_IRQHandler: - b . - - .thumb_func - .weak EIC_INTREQ_5_IRQHandler -EIC_INTREQ_5_IRQHandler: - b . - - .thumb_func - .weak EIC_INTREQ_6_IRQHandler -EIC_INTREQ_6_IRQHandler: - b . - - .thumb_func - .weak EIC_INTREQ_7_IRQHandler -EIC_INTREQ_7_IRQHandler: - b . - - .thumb_func - .weak EIC_INTREQ_8_IRQHandler -EIC_INTREQ_8_IRQHandler: - b . - - .thumb_func - .weak EIC_INTREQ_9_IRQHandler -EIC_INTREQ_9_IRQHandler: - b . - - .thumb_func - .weak EIC_INTREQ_10_IRQHandler -EIC_INTREQ_10_IRQHandler: - b . - - .thumb_func - .weak EIC_INTREQ_11_IRQHandler -EIC_INTREQ_11_IRQHandler: - b . - - .thumb_func - .weak EIC_INTREQ_12_IRQHandler -EIC_INTREQ_12_IRQHandler: - b . - - .thumb_func - .weak EIC_INTREQ_13_IRQHandler -EIC_INTREQ_13_IRQHandler: - b . - - .thumb_func - .weak EIC_INTREQ_14_IRQHandler -EIC_INTREQ_14_IRQHandler: - b . - - .thumb_func - .weak EIC_INTREQ_15_IRQHandler -EIC_INTREQ_15_IRQHandler: - b . - - .thumb_func - .weak FREQM_INTREQ_IRQHandler -FREQM_INTREQ_IRQHandler: - b . - - .thumb_func - .weak NVMCTRL_INTREQ_0_IRQHandler -NVMCTRL_INTREQ_0_IRQHandler: - b . - - .thumb_func - .weak NVMCTRL_INTREQ_1_IRQHandler -NVMCTRL_INTREQ_1_IRQHandler: - b . - - .thumb_func - .weak DMAC_INTREQ_0_IRQHandler -DMAC_INTREQ_0_IRQHandler: - b . - - .thumb_func - .weak DMAC_INTREQ_1_IRQHandler -DMAC_INTREQ_1_IRQHandler: - b . - - .thumb_func - .weak DMAC_INTREQ_2_IRQHandler -DMAC_INTREQ_2_IRQHandler: - b . - - .thumb_func - .weak DMAC_INTREQ_3_IRQHandler -DMAC_INTREQ_3_IRQHandler: - b . - - .thumb_func - .weak DMAC_INTREQ_4_IRQHandler -DMAC_INTREQ_4_IRQHandler: - b . - - .thumb_func - .weak EVSYS_INTREQ_0_IRQHandler -EVSYS_INTREQ_0_IRQHandler: - b . - - .thumb_func - .weak EVSYS_INTREQ_1_IRQHandler -EVSYS_INTREQ_1_IRQHandler: - b . - - .thumb_func - .weak EVSYS_INTREQ_2_IRQHandler -EVSYS_INTREQ_2_IRQHandler: - b . - - .thumb_func - .weak EVSYS_INTREQ_3_IRQHandler -EVSYS_INTREQ_3_IRQHandler: - b . - - .thumb_func - .weak EVSYS_INTREQ_4_IRQHandler -EVSYS_INTREQ_4_IRQHandler: - b . - - .thumb_func - .weak PAC_INTREQ_IRQHandler -PAC_INTREQ_IRQHandler: - b . - - .thumb_func - .weak TAL_INTREQ_0_IRQHandler -TAL_INTREQ_0_IRQHandler: - b . - - .thumb_func - .weak TAL_INTREQ_1_IRQHandler -TAL_INTREQ_1_IRQHandler: - b . - - .thumb_func - .weak RAMECC_INTREQ_IRQHandler -RAMECC_INTREQ_IRQHandler: - b . - - .thumb_func - .weak SERCOM0_INTREQ_0_IRQHandler -SERCOM0_INTREQ_0_IRQHandler: - b . - - .thumb_func - .weak SERCOM0_INTREQ_1_IRQHandler -SERCOM0_INTREQ_1_IRQHandler: - b . - - .thumb_func - .weak SERCOM0_INTREQ_2_IRQHandler -SERCOM0_INTREQ_2_IRQHandler: - b . - - .thumb_func - .weak SERCOM0_INTREQ_3_IRQHandler -SERCOM0_INTREQ_3_IRQHandler: - b . - - .thumb_func - .weak SERCOM1_INTREQ_0_IRQHandler -SERCOM1_INTREQ_0_IRQHandler: - b . - - .thumb_func - .weak SERCOM1_INTREQ_1_IRQHandler -SERCOM1_INTREQ_1_IRQHandler: - b . - - .thumb_func - .weak SERCOM1_INTREQ_2_IRQHandler -SERCOM1_INTREQ_2_IRQHandler: - b . - - .thumb_func - .weak SERCOM1_INTREQ_3_IRQHandler -SERCOM1_INTREQ_3_IRQHandler: - b . - - .thumb_func - .weak SERCOM2_INTREQ_0_IRQHandler -SERCOM2_INTREQ_0_IRQHandler: - b . - - .thumb_func - .weak SERCOM2_INTREQ_1_IRQHandler -SERCOM2_INTREQ_1_IRQHandler: - b . - - .thumb_func - .weak SERCOM2_INTREQ_2_IRQHandler -SERCOM2_INTREQ_2_IRQHandler: - b . - - .thumb_func - .weak SERCOM2_INTREQ_3_IRQHandler -SERCOM2_INTREQ_3_IRQHandler: - b . - - .thumb_func - .weak SERCOM3_INTREQ_0_IRQHandler -SERCOM3_INTREQ_0_IRQHandler: - b . - - .thumb_func - .weak SERCOM3_INTREQ_1_IRQHandler -SERCOM3_INTREQ_1_IRQHandler: - b . - - .thumb_func - .weak SERCOM3_INTREQ_2_IRQHandler -SERCOM3_INTREQ_2_IRQHandler: - b . - - .thumb_func - .weak SERCOM3_INTREQ_3_IRQHandler -SERCOM3_INTREQ_3_IRQHandler: - b . - - .thumb_func - .weak SERCOM4_INTREQ_0_IRQHandler -SERCOM4_INTREQ_0_IRQHandler: - b . - - .thumb_func - .weak SERCOM4_INTREQ_1_IRQHandler -SERCOM4_INTREQ_1_IRQHandler: - b . - - .thumb_func - .weak SERCOM4_INTREQ_2_IRQHandler -SERCOM4_INTREQ_2_IRQHandler: - b . - - .thumb_func - .weak SERCOM4_INTREQ_3_IRQHandler -SERCOM4_INTREQ_3_IRQHandler: - b . - - .thumb_func - .weak SERCOM5_INTREQ_0_IRQHandler -SERCOM5_INTREQ_0_IRQHandler: - b . - - .thumb_func - .weak SERCOM5_INTREQ_1_IRQHandler -SERCOM5_INTREQ_1_IRQHandler: - b . - - .thumb_func - .weak SERCOM5_INTREQ_2_IRQHandler -SERCOM5_INTREQ_2_IRQHandler: - b . - - .thumb_func - .weak SERCOM5_INTREQ_3_IRQHandler -SERCOM5_INTREQ_3_IRQHandler: - b . - - .thumb_func - .weak CAN0_INTREQ_IRQHandler -CAN0_INTREQ_IRQHandler: - b . - - .thumb_func - .weak CAN1_INTREQ_IRQHandler -CAN1_INTREQ_IRQHandler: - b . - - .thumb_func - .weak USB_INTREQ_0_IRQHandler -USB_INTREQ_0_IRQHandler: - b . - - .thumb_func - .weak USB_INTREQ_1_IRQHandler -USB_INTREQ_1_IRQHandler: - b . - - .thumb_func - .weak USB_INTREQ_2_IRQHandler -USB_INTREQ_2_IRQHandler: - b . - - .thumb_func - .weak USB_INTREQ_3_IRQHandler -USB_INTREQ_3_IRQHandler: - b . - - .thumb_func - .weak TCC0_INTREQ_0_IRQHandler -TCC0_INTREQ_0_IRQHandler: - b . - - .thumb_func - .weak TCC0_INTREQ_1_IRQHandler -TCC0_INTREQ_1_IRQHandler: - b . - - .thumb_func - .weak TCC0_INTREQ_2_IRQHandler -TCC0_INTREQ_2_IRQHandler: - b . - - .thumb_func - .weak TCC0_INTREQ_3_IRQHandler -TCC0_INTREQ_3_IRQHandler: - b . - - .thumb_func - .weak TCC0_INTREQ_4_IRQHandler -TCC0_INTREQ_4_IRQHandler: - b . - - .thumb_func - .weak TCC0_INTREQ_5_IRQHandler -TCC0_INTREQ_5_IRQHandler: - b . - - .thumb_func - .weak TCC0_INTREQ_6_IRQHandler -TCC0_INTREQ_6_IRQHandler: - b . - - .thumb_func - .weak TCC1_INTREQ_0_IRQHandler -TCC1_INTREQ_0_IRQHandler: - b . - - .thumb_func - .weak TCC1_INTREQ_1_IRQHandler -TCC1_INTREQ_1_IRQHandler: - b . - - .thumb_func - .weak TCC1_INTREQ_2_IRQHandler -TCC1_INTREQ_2_IRQHandler: - b . - - .thumb_func - .weak TCC1_INTREQ_3_IRQHandler -TCC1_INTREQ_3_IRQHandler: - b . - - .thumb_func - .weak TCC1_INTREQ_4_IRQHandler -TCC1_INTREQ_4_IRQHandler: - b . - - .thumb_func - .weak TCC2_INTREQ_0_IRQHandler -TCC2_INTREQ_0_IRQHandler: - b . - - .thumb_func - .weak TCC2_INTREQ_1_IRQHandler -TCC2_INTREQ_1_IRQHandler: - b . - - .thumb_func - .weak TCC2_INTREQ_2_IRQHandler -TCC2_INTREQ_2_IRQHandler: - b . - - .thumb_func - .weak TCC2_INTREQ_3_IRQHandler -TCC2_INTREQ_3_IRQHandler: - b . - - .thumb_func - .weak TCC3_INTREQ_0_IRQHandler -TCC3_INTREQ_0_IRQHandler: - b . - - .thumb_func - .weak TCC3_INTREQ_1_IRQHandler -TCC3_INTREQ_1_IRQHandler: - b . - - .thumb_func - .weak TCC3_INTREQ_2_IRQHandler -TCC3_INTREQ_2_IRQHandler: - b . - - .thumb_func - .weak TCC4_INTREQ_0_IRQHandler -TCC4_INTREQ_0_IRQHandler: - b . - - .thumb_func - .weak TCC4_INTREQ_1_IRQHandler -TCC4_INTREQ_1_IRQHandler: - b . - - .thumb_func - .weak TCC4_INTREQ_2_IRQHandler -TCC4_INTREQ_2_IRQHandler: - b . - - .thumb_func - .weak TC0_INTREQ_IRQHandler -TC0_INTREQ_IRQHandler: - b . - - .thumb_func - .weak TC1_INTREQ_IRQHandler -TC1_INTREQ_IRQHandler: - b . - - .thumb_func - .weak TC2_INTREQ_IRQHandler -TC2_INTREQ_IRQHandler: - b . - - .thumb_func - .weak TC3_INTREQ_IRQHandler -TC3_INTREQ_IRQHandler: - b . - - .thumb_func - .weak TC4_INTREQ_IRQHandler -TC4_INTREQ_IRQHandler: - b . - - .thumb_func - .weak TC5_INTREQ_IRQHandler -TC5_INTREQ_IRQHandler: - b . - - .thumb_func - .weak PDEC_INTREQ_0_IRQHandler -PDEC_INTREQ_0_IRQHandler: - b . - - .thumb_func - .weak PDEC_INTREQ_1_IRQHandler -PDEC_INTREQ_1_IRQHandler: - b . - - .thumb_func - .weak PDEC_INTREQ_2_IRQHandler -PDEC_INTREQ_2_IRQHandler: - b . - - .thumb_func - .weak ADC0_INTREQ_0_IRQHandler -ADC0_INTREQ_0_IRQHandler: - b . - - .thumb_func - .weak ADC0_INTREQ_1_IRQHandler -ADC0_INTREQ_1_IRQHandler: - b . - - .thumb_func - .weak ADC1_INTREQ_0_IRQHandler -ADC1_INTREQ_0_IRQHandler: - b . - - .thumb_func - .weak ADC1_INTREQ_1_IRQHandler -ADC1_INTREQ_1_IRQHandler: - b . - - .thumb_func - .weak AC_INTREQ_IRQHandler -AC_INTREQ_IRQHandler: - b . - - .thumb_func - .weak DAC_INTREQ_0_IRQHandler -DAC_INTREQ_0_IRQHandler: - b . - - .thumb_func - .weak DAC_INTREQ_1_IRQHandler -DAC_INTREQ_1_IRQHandler: - b . - - .thumb_func - .weak DAC_INTREQ_2_IRQHandler -DAC_INTREQ_2_IRQHandler: - b . - - .thumb_func - .weak DAC_INTREQ_3_IRQHandler -DAC_INTREQ_3_IRQHandler: - b . - - .thumb_func - .weak DAC_INTREQ_4_IRQHandler -DAC_INTREQ_4_IRQHandler: - b . - - .thumb_func - .weak I2S_INTREQ_IRQHandler -I2S_INTREQ_IRQHandler: - b . - - .thumb_func - .weak PCC_INTREQ_IRQHandler -PCC_INTREQ_IRQHandler: - b . - - .thumb_func - .weak AES_INTREQ_IRQHandler -AES_INTREQ_IRQHandler: - b . - - .thumb_func - .weak TRNG_INTREQ_IRQHandler -TRNG_INTREQ_IRQHandler: - b . - - .thumb_func - .weak ICM_INTREQ_IRQHandler -ICM_INTREQ_IRQHandler: - b . - - .thumb_func - .weak QSPI_INTREQ_IRQHandler -QSPI_INTREQ_IRQHandler: - b . - - .thumb_func - .weak SDHC0_INTREQ_IRQHandler -SDHC0_INTREQ_IRQHandler: - b . - -#endif - -/***************************************************************************** - * Vector Table * - *****************************************************************************/ - - .section .vectors, "ax" - .align 0 - .global _vectors - .extern __stack_end__ - .extern Reset_Handler - -_vectors: - .word __stack_end__ - .word Reset_Handler - .word NMI_Handler - .word HardFault_Handler - .word 0 /* Reserved */ - .word 0 /* Reserved */ - .word 0 /* Reserved */ - .word 0 /* Reserved */ - .word 0 /* Reserved */ - .word 0 /* Reserved */ - .word 0 /* Reserved */ - .word SVC_Handler - .word 0 /* Reserved */ - .word 0 /* Reserved */ - .word PendSV_Handler - .word SysTick_Handler - .word PM_INTREQ_IRQHandler - .word MCLK_INTREQ_IRQHandler - .word OSCCTRL_INTREQ_0_IRQHandler - .word OSCCTRL_INTREQ_1_IRQHandler - .word OSCCTRL_INTREQ_2_IRQHandler - .word OSCCTRL_INTREQ_3_IRQHandler - .word OSCCTRL_INTREQ_4_IRQHandler - .word OSC32KCTRL_INTREQ_IRQHandler - .word SUPC_INTREQ_0_IRQHandler - .word SUPC_INTREQ_1_IRQHandler - .word WDT_INTREQ_IRQHandler - .word RTC_INTREQ_IRQHandler - .word EIC_INTREQ_0_IRQHandler - .word EIC_INTREQ_1_IRQHandler - .word EIC_INTREQ_2_IRQHandler - .word EIC_INTREQ_3_IRQHandler - .word EIC_INTREQ_4_IRQHandler - .word EIC_INTREQ_5_IRQHandler - .word EIC_INTREQ_6_IRQHandler - .word EIC_INTREQ_7_IRQHandler - .word EIC_INTREQ_8_IRQHandler - .word EIC_INTREQ_9_IRQHandler - .word EIC_INTREQ_10_IRQHandler - .word EIC_INTREQ_11_IRQHandler - .word EIC_INTREQ_12_IRQHandler - .word EIC_INTREQ_13_IRQHandler - .word EIC_INTREQ_14_IRQHandler - .word EIC_INTREQ_15_IRQHandler - .word FREQM_INTREQ_IRQHandler - .word NVMCTRL_INTREQ_0_IRQHandler - .word NVMCTRL_INTREQ_1_IRQHandler - .word DMAC_INTREQ_0_IRQHandler - .word DMAC_INTREQ_1_IRQHandler - .word DMAC_INTREQ_2_IRQHandler - .word DMAC_INTREQ_3_IRQHandler - .word DMAC_INTREQ_4_IRQHandler - .word EVSYS_INTREQ_0_IRQHandler - .word EVSYS_INTREQ_1_IRQHandler - .word EVSYS_INTREQ_2_IRQHandler - .word EVSYS_INTREQ_3_IRQHandler - .word EVSYS_INTREQ_4_IRQHandler - .word PAC_INTREQ_IRQHandler - .word TAL_INTREQ_0_IRQHandler - .word TAL_INTREQ_1_IRQHandler - .word Dummy_Handler /* Reserved */ - .word RAMECC_INTREQ_IRQHandler - .word SERCOM0_INTREQ_0_IRQHandler - .word SERCOM0_INTREQ_1_IRQHandler - .word SERCOM0_INTREQ_2_IRQHandler - .word SERCOM0_INTREQ_3_IRQHandler - .word SERCOM1_INTREQ_0_IRQHandler - .word SERCOM1_INTREQ_1_IRQHandler - .word SERCOM1_INTREQ_2_IRQHandler - .word SERCOM1_INTREQ_3_IRQHandler - .word SERCOM2_INTREQ_0_IRQHandler - .word SERCOM2_INTREQ_1_IRQHandler - .word SERCOM2_INTREQ_2_IRQHandler - .word SERCOM2_INTREQ_3_IRQHandler - .word SERCOM3_INTREQ_0_IRQHandler - .word SERCOM3_INTREQ_1_IRQHandler - .word SERCOM3_INTREQ_2_IRQHandler - .word SERCOM3_INTREQ_3_IRQHandler - .word SERCOM4_INTREQ_0_IRQHandler - .word SERCOM4_INTREQ_1_IRQHandler - .word SERCOM4_INTREQ_2_IRQHandler - .word SERCOM4_INTREQ_3_IRQHandler - .word SERCOM5_INTREQ_0_IRQHandler - .word SERCOM5_INTREQ_1_IRQHandler - .word SERCOM5_INTREQ_2_IRQHandler - .word SERCOM5_INTREQ_3_IRQHandler - .word Dummy_Handler /* Reserved */ - .word Dummy_Handler /* Reserved */ - .word Dummy_Handler /* Reserved */ - .word Dummy_Handler /* Reserved */ - .word Dummy_Handler /* Reserved */ - .word Dummy_Handler /* Reserved */ - .word Dummy_Handler /* Reserved */ - .word Dummy_Handler /* Reserved */ - .word CAN0_INTREQ_IRQHandler - .word CAN1_INTREQ_IRQHandler - .word USB_INTREQ_0_IRQHandler - .word USB_INTREQ_1_IRQHandler - .word USB_INTREQ_2_IRQHandler - .word USB_INTREQ_3_IRQHandler - .word Dummy_Handler /* Reserved */ - .word TCC0_INTREQ_0_IRQHandler - .word TCC0_INTREQ_1_IRQHandler - .word TCC0_INTREQ_2_IRQHandler - .word TCC0_INTREQ_3_IRQHandler - .word TCC0_INTREQ_4_IRQHandler - .word TCC0_INTREQ_5_IRQHandler - .word TCC0_INTREQ_6_IRQHandler - .word TCC1_INTREQ_0_IRQHandler - .word TCC1_INTREQ_1_IRQHandler - .word TCC1_INTREQ_2_IRQHandler - .word TCC1_INTREQ_3_IRQHandler - .word TCC1_INTREQ_4_IRQHandler - .word TCC2_INTREQ_0_IRQHandler - .word TCC2_INTREQ_1_IRQHandler - .word TCC2_INTREQ_2_IRQHandler - .word TCC2_INTREQ_3_IRQHandler - .word TCC3_INTREQ_0_IRQHandler - .word TCC3_INTREQ_1_IRQHandler - .word TCC3_INTREQ_2_IRQHandler - .word TCC4_INTREQ_0_IRQHandler - .word TCC4_INTREQ_1_IRQHandler - .word TCC4_INTREQ_2_IRQHandler - .word TC0_INTREQ_IRQHandler - .word TC1_INTREQ_IRQHandler - .word TC2_INTREQ_IRQHandler - .word TC3_INTREQ_IRQHandler - .word TC4_INTREQ_IRQHandler - .word TC5_INTREQ_IRQHandler - .word Dummy_Handler /* Reserved */ - .word Dummy_Handler /* Reserved */ - .word PDEC_INTREQ_0_IRQHandler - .word PDEC_INTREQ_1_IRQHandler - .word PDEC_INTREQ_2_IRQHandler - .word ADC0_INTREQ_0_IRQHandler - .word ADC0_INTREQ_1_IRQHandler - .word ADC1_INTREQ_0_IRQHandler - .word ADC1_INTREQ_1_IRQHandler - .word AC_INTREQ_IRQHandler - .word DAC_INTREQ_0_IRQHandler - .word DAC_INTREQ_1_IRQHandler - .word DAC_INTREQ_2_IRQHandler - .word DAC_INTREQ_3_IRQHandler - .word DAC_INTREQ_4_IRQHandler - .word I2S_INTREQ_IRQHandler - .word PCC_INTREQ_IRQHandler - .word AES_INTREQ_IRQHandler - .word TRNG_INTREQ_IRQHandler - .word ICM_INTREQ_IRQHandler - .word Dummy_Handler /* Reserved */ - .word QSPI_INTREQ_IRQHandler - .word SDHC0_INTREQ_IRQHandler -_vectors_end: - -#ifdef VECTORS_IN_RAM - .section .vectors_ram, "ax" - .align 0 - .global _vectors_ram - -_vectors_ram: - .space _vectors_end - _vectors, 0 -#endif diff --git a/examples/device/device_composite/ses/ses_samd51/SAME51_Startup.s b/examples/device/device_composite/ses/ses_samd51/SAMD51_Startup.s similarity index 100% rename from examples/device/device_composite/ses/ses_samd51/SAME51_Startup.s rename to examples/device/device_composite/ses/ses_samd51/SAMD51_Startup.s diff --git a/examples/device/device_composite/ses/ses_samd51/SAMD51_Target.js b/examples/device/device_composite/ses/ses_samd51/SAMD51_Target.js new file mode 100644 index 00000000..20560af4 --- /dev/null +++ b/examples/device/device_composite/ses/ses_samd51/SAMD51_Target.js @@ -0,0 +1,19 @@ +/***************************************************************************** + * SEGGER Microcontroller GmbH & Co. KG * + * Solutions for real time microcontroller applications * + ***************************************************************************** + * * + * (c) 2017 SEGGER Microcontroller GmbH & Co. KG * + * * + * Internet: www.segger.com Support: support@segger.com * + * * + *****************************************************************************/ + +function Reset() { + TargetInterface.resetAndStop(); +} + +function EnableTrace(traceInterfaceType) { + // TODO: Enable trace +} + diff --git a/hw/bsp/board.h b/hw/bsp/board.h index fc835d31..2a946025 100644 --- a/hw/bsp/board.h +++ b/hw/bsp/board.h @@ -87,7 +87,7 @@ #elif defined BOARD_METRO_M4_EXPRESS #include "metro_m4_express/board_metro_m4_express.h" #elif defined BOARD_METRO_M0_EXPRESS - #include "metro_m4_express/board_metro_m0_express.h" + #include "metro_m0_express/board_metro_m0_express.h" #else #error BOARD is not defined or supported yet #endif diff --git a/hw/bsp/metro_m0_express/board_metro_m0_express.c b/hw/bsp/metro_m0_express/board_metro_m0_express.c index 0838dd2a..471aa4b2 100644 --- a/hw/bsp/metro_m0_express/board_metro_m0_express.c +++ b/hw/bsp/metro_m0_express/board_metro_m0_express.c @@ -36,12 +36,88 @@ */ /**************************************************************************/ +#include "bsp/board.h" + +#include "sam.h" +#include "hal/include/hal_gpio.h" +#include "hal/include/hal_init.h" +#include "hri/hri_nvmctrl_d21.h" + +#include "hpl/gclk/hpl_gclk_base.h" +#include "hpl_pm_config.h" +#include "hpl/pm/hpl_pm_base.h" + //--------------------------------------------------------------------+ // MACRO TYPEDEF CONSTANT ENUM DECLARATION //--------------------------------------------------------------------+ +#define LED_STATE_ON 1 +/* Referenced GCLKs, should be initialized firstly */ +#define _GCLK_INIT_1ST (1 << 0 | 1 << 1) + +/* Not referenced GCLKs, initialized last */ +#define _GCLK_INIT_LAST (~_GCLK_INIT_1ST) void board_init(void) { + // Clock init ( follow hpl_init.c ) + hri_nvmctrl_set_CTRLB_RWS_bf(NVMCTRL, 2); + _pm_init(); + _sysctrl_init_sources(); +#if _GCLK_INIT_1ST + _gclk_init_generators_by_fref(_GCLK_INIT_1ST); +#endif + _sysctrl_init_referenced_generators(); + _gclk_init_generators_by_fref(_GCLK_INIT_LAST); + + // Led init + gpio_set_pin_direction(BOARD_LED0, GPIO_DIRECTION_OUT); + gpio_set_pin_level(BOARD_LED0, 1-LED_STATE_ON); + +#if CFG_TUSB_OS == OPT_OS_NONE + // Tick init, samd SystemCoreClock may not correct + SysTick_Config(SystemCoreClock/1000); +#endif + + /* USB Clock init + * The USB module requires a GCLK_USB of 48 MHz ~ 0.25% clock + * for low speed and full speed operation. */ + _pm_enable_bus_clock(PM_BUS_APBB, USB); + _pm_enable_bus_clock(PM_BUS_AHB, USB); + _gclk_enable_channel(USB_GCLK_ID, GCLK_CLKCTRL_GEN_GCLK0_Val); + + // USB Pin Init + gpio_set_pin_direction(PIN_PA24, GPIO_DIRECTION_OUT); + gpio_set_pin_level(PIN_PA24, false); + gpio_set_pin_pull_mode(PIN_PA24, GPIO_PULL_OFF); + gpio_set_pin_direction(PIN_PA25, GPIO_DIRECTION_OUT); + gpio_set_pin_level(PIN_PA25, false); + gpio_set_pin_pull_mode(PIN_PA25, GPIO_PULL_OFF); + + gpio_set_pin_function(PIN_PA24, PINMUX_PA24G_USB_DM); + gpio_set_pin_function(PIN_PA25, PINMUX_PA25G_USB_DP); } + +void board_led_control(uint32_t led_id, bool state) +{ + gpio_set_pin_level(led_id, state ? LED_STATE_ON : (1-LED_STATE_ON)); +} + + +/*------------------------------------------------------------------*/ +/* TUSB HAL MILLISECOND + *------------------------------------------------------------------*/ +#if CFG_TUSB_OS == OPT_OS_NONE +volatile uint32_t system_ticks = 0; + +void SysTick_Handler (void) +{ + system_ticks++; +} + +uint32_t tusb_hal_millis(void) +{ + return board_tick2ms(system_ticks); +} +#endif diff --git a/hw/bsp/metro_m0_express/board_metro_m0_express.h b/hw/bsp/metro_m0_express/board_metro_m0_express.h index 4325514e..b727d144 100644 --- a/hw/bsp/metro_m0_express/board_metro_m0_express.h +++ b/hw/bsp/metro_m0_express/board_metro_m0_express.h @@ -43,7 +43,7 @@ #endif #define BOARD_LED_NUM 1 -#define BOARD_LED0 13 +#define BOARD_LED0 17 #ifdef __cplusplus } diff --git a/hw/bsp/metro_m4_express/board_metro_m4_express.c b/hw/bsp/metro_m4_express/board_metro_m4_express.c index 23b9e987..9d2bc2b7 100644 --- a/hw/bsp/metro_m4_express/board_metro_m4_express.c +++ b/hw/bsp/metro_m4_express/board_metro_m4_express.c @@ -41,30 +41,48 @@ #include "sam.h" #include "hal/include/hal_gpio.h" #include "hal/include/hal_init.h" -#include "peripheral_clk_config.h" - +#include "hpl/gclk/hpl_gclk_base.h" +#include "hpl_mclk_config.h" //--------------------------------------------------------------------+ // MACRO TYPEDEF CONSTANT ENUM DECLARATION //--------------------------------------------------------------------+ #define LED_STATE_ON 1 +/* Referenced GCLKs, should be initialized firstly */ +#define _GCLK_INIT_1ST 0xFFFFFFFF + +/* Not referenced GCLKs, initialized last */ +#define _GCLK_INIT_LAST (~_GCLK_INIT_1ST) + void board_init(void) { - init_mcu(); + // Clock init ( follow hpl_init.c ) + hri_nvmctrl_set_CTRLA_RWS_bf(NVMCTRL, 0); + _osc32kctrl_init_sources(); + _oscctrl_init_sources(); + _mclk_init(); +#if _GCLK_INIT_1ST + _gclk_init_generators_by_fref(_GCLK_INIT_1ST); +#endif + _oscctrl_init_referenced_generators(); + _gclk_init_generators_by_fref(_GCLK_INIT_LAST); + + // Led init gpio_set_pin_direction(BOARD_LED0, GPIO_DIRECTION_OUT); - gpio_set_pin_level(BOARD_LED0, 1-LED_STATE_ON); + gpio_set_pin_level(BOARD_LED0, 1 - LED_STATE_ON); + // Systick init #if CFG_TUSB_OS == OPT_OS_NONE - // Tick init - SysTick_Config(SystemCoreClock/1000); + // Tick init, samd SystemCoreClock may not correct + SysTick_Config(SystemCoreClock / 1000); #endif /* USB Clock init * The USB module requires a GCLK_USB of 48 MHz ~ 0.25% clock * for low speed and full speed operation. */ - hri_gclk_write_PCHCTRL_reg(GCLK, USB_GCLK_ID, CONF_GCLK_USB_SRC | GCLK_PCHCTRL_CHEN); + hri_gclk_write_PCHCTRL_reg(GCLK, USB_GCLK_ID, GCLK_PCHCTRL_GEN_GCLK1_Val | GCLK_PCHCTRL_CHEN); hri_mclk_set_AHBMASK_USB_bit(MCLK); hri_mclk_set_APBBMASK_USB_bit(MCLK); diff --git a/src/device/dcd.h b/src/device/dcd.h index bd0ea852..f07bda2d 100644 --- a/src/device/dcd.h +++ b/src/device/dcd.h @@ -124,10 +124,14 @@ void dcd_event_xfer_complete (uint8_t rhport, uint8_t ep_addr, uint32_t xferred_ /*------------------------------------------------------------------*/ /* Endpoint API - * Note: - * - Address of control endpoint OUT is 0x00, In is 0x80 - * - When stalling control endpoint both control OUT and IN must be stalled - * (according to USB spec, stalled control is only recovered with setup token) + * - open : Configure endpoint's registers + * - xfer : Submit a transfer. When complete dcd_event_xfer_complete + * must be called to notify the stack + * - busy : Check if endpoint transferring is complete (TODO remove) + * - stall : stall ep. When control endpoint (addr = 0) is stalled, + * both direction (IN & OUT) of control ep must be stalled. + * - clear_stall : clear stall + * - stalled : check if stalled ( TODO remove ) *------------------------------------------------------------------*/ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc); bool dcd_edpt_xfer (uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes); diff --git a/src/device/usbd.c b/src/device/usbd.c index eac1a6a2..f3960598 100644 --- a/src/device/usbd.c +++ b/src/device/usbd.c @@ -174,7 +174,7 @@ static bool process_set_config(uint8_t rhport, uint8_t config_number); static void const* get_descriptor(tusb_control_request_t const * p_request, uint16_t* desc_len); void usbd_control_reset (uint8_t rhport); -tusb_error_t usbd_control_xfer_cb (uint8_t rhport, uint8_t ep_addr, tusb_event_t event, uint32_t xferred_bytes); +bool usbd_control_xfer_cb (uint8_t rhport, uint8_t ep_addr, tusb_event_t event, uint32_t xferred_bytes); void usbd_control_set_complete_callback( bool (*fp) (uint8_t, tusb_control_request_t const * ) ); //--------------------------------------------------------------------+ @@ -338,7 +338,10 @@ static bool process_control_request(uint8_t rhport, tusb_control_request_t const switch ( p_request->bRequest ) { case TUSB_REQ_SET_ADDRESS: + // response with status first before changing device address + usbd_control_status(rhport, p_request); dcd_set_address(rhport, (uint8_t) p_request->wValue); + return true; // skip the rest break; case TUSB_REQ_GET_CONFIGURATION: @@ -362,7 +365,9 @@ static bool process_control_request(uint8_t rhport, tusb_control_request_t const if ( data_buf == NULL || data_len == 0 ) return false; break; - default: return false; + default: + TU_BREAKPOINT(); + return false; } usbd_control_xfer(rhport, p_request, data_buf, data_len); @@ -405,12 +410,15 @@ static bool process_control_request(uint8_t rhport, tusb_control_request_t const usbd_control_status(rhport, p_request); break; - default: return false; + default: + TU_BREAKPOINT(); + return false; } } else { //------------- Unsupported Request -------------// + TU_BREAKPOINT(); return false; } @@ -549,10 +557,13 @@ void dcd_event_handler(dcd_event_t const * event, bool in_isr) { case DCD_EVENT_BUS_RESET: case DCD_EVENT_UNPLUGGED: - case DCD_EVENT_SOF: osal_queue_send(_usbd_q, event, in_isr); break; + case DCD_EVENT_SOF: + // nothing to do now + break; + case DCD_EVENT_SUSPENDED: // TODO support suspended break; diff --git a/src/device/usbd_control.c b/src/device/usbd_control.c index a9687a3e..8564d1ae 100644 --- a/src/device/usbd_control.c +++ b/src/device/usbd_control.c @@ -126,7 +126,7 @@ bool usbd_control_xfer(uint8_t rhport, tusb_control_request_t const * request, v } // callback when a transaction complete on DATA stage of control endpoint -tusb_error_t usbd_control_xfer_cb (uint8_t rhport, uint8_t ep_addr, tusb_event_t event, uint32_t xferred_bytes) +bool usbd_control_xfer_cb (uint8_t rhport, uint8_t ep_addr, tusb_event_t event, uint32_t xferred_bytes) { if ( _control_state.request.bmRequestType_bit.direction == TUSB_DIR_OUT ) { @@ -151,7 +151,7 @@ tusb_error_t usbd_control_xfer_cb (uint8_t rhport, uint8_t ep_addr, tusb_event_t if ( is_ok ) { // Send status - TU_ASSERT( usbd_control_status(rhport, &_control_state.request), TUSB_ERROR_FAILED ); + TU_ASSERT( usbd_control_status(rhport, &_control_state.request) ); }else { // stall due to callback @@ -161,10 +161,10 @@ tusb_error_t usbd_control_xfer_cb (uint8_t rhport, uint8_t ep_addr, tusb_event_t else { // More data to transfer - TU_ASSERT(start_control_data_xact(rhport), TUSB_ERROR_FAILED); + TU_ASSERT( start_control_data_xact(rhport) ); } - return TUSB_ERROR_NONE; + return true; } #endif diff --git a/src/portable/microchip/samd21/dcd_samd21.c b/src/portable/microchip/samd21/dcd_samd21.c index 33cbc8d9..b31db547 100644 --- a/src/portable/microchip/samd21/dcd_samd21.c +++ b/src/portable/microchip/samd21/dcd_samd21.c @@ -41,28 +41,13 @@ #if TUSB_OPT_DEVICE_ENABLED && CFG_TUSB_MCU == OPT_MCU_SAMD21 #include "device/dcd.h" - -#include "device/usbd.h" -#include "device/usbd_pvt.h" // to use defer function helper - -#include "class/msc/msc_device.h" - #include "sam.h" /*------------------------------------------------------------------*/ /* MACRO TYPEDEF CONSTANT ENUM *------------------------------------------------------------------*/ -enum -{ - // Max allowed by USB specs - MAX_PACKET_SIZE = 64, -}; - -UsbDeviceDescBank sram_registers[8][2]; -ATTR_ALIGNED(4) uint8_t control_out_buffer[64]; -ATTR_ALIGNED(4) uint8_t control_in_buffer[64]; - -volatile uint32_t setup_count = 0; +static ATTR_ALIGNED(4) UsbDeviceDescBank sram_registers[8][2]; +static ATTR_ALIGNED(4) uint8_t _setup_packet[8]; // Setup the control endpoint 0. static void bus_reset(void) { @@ -76,8 +61,8 @@ static void bus_reset(void) { ep->EPCFG.reg = USB_DEVICE_EPCFG_EPTYPE0(0x1) | USB_DEVICE_EPCFG_EPTYPE1(0x1); ep->EPINTENSET.reg = USB_DEVICE_EPINTENSET_TRCPT0 | USB_DEVICE_EPINTENSET_TRCPT1 | USB_DEVICE_EPINTENSET_RXSTP; - dcd_edpt_xfer(0, 0, control_out_buffer, 64); - setup_count = 0; + // Prepare for setup packet + dcd_edpt_xfer(0, 0, _setup_packet, sizeof(_setup_packet)); } @@ -107,7 +92,7 @@ void dcd_disconnect (uint8_t rhport) void dcd_set_address (uint8_t rhport, uint8_t dev_addr) { (void) rhport; - dcd_edpt_xfer (0, TUSB_DIR_IN_MASK, NULL, 0); + // Wait for EP0 to finish before switching the address. while (USB->DEVICE.DeviceEndpoint[0].EPSTATUS.bit.BK1RDY == 1) {} USB->DEVICE.DADD.reg = USB_DEVICE_DADD_DADD(dev_addr) | USB_DEVICE_DADD_ADDEN; @@ -121,20 +106,9 @@ void dcd_set_config (uint8_t rhport, uint8_t config_num) } /*------------------------------------------------------------------*/ -/* Control +/* DCD Endpoint port *------------------------------------------------------------------*/ -bool dcd_control_xfer (uint8_t rhport, uint8_t dir, uint8_t * buffer, uint16_t length) -{ - (void) rhport; - uint8_t ep_addr = 0; - if (dir == TUSB_DIR_IN) { - ep_addr |= TUSB_DIR_IN_MASK; - } - - return dcd_edpt_xfer (rhport, ep_addr, buffer, length); -} - bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * desc_edpt) { (void) rhport; @@ -150,6 +124,10 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * desc_edpt) } size_value++; } + + // unsupported endpoint size + if ( size_value == 7 && desc_edpt->wMaxPacketSize.size != 1023 ) return false; + bank->PCKSIZE.bit.SIZE = size_value; UsbDeviceEndpoint* ep = &USB->DEVICE.DeviceEndpoint[epnum]; @@ -163,7 +141,6 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * desc_edpt) ep->EPCFG.bit.EPTYPE1 = desc_edpt->bmAttributes.xfer + 1; ep->EPINTENSET.bit.TRCPT1 = true; } - __ISB(); __DSB(); return true; } @@ -222,9 +199,12 @@ void dcd_edpt_stall (uint8_t rhport, uint8_t ep_addr) ep->EPSTATUSSET.reg = USB_DEVICE_EPSTATUSSET_STALLRQ1; } else { ep->EPSTATUSSET.reg = USB_DEVICE_EPSTATUSSET_STALLRQ0; - } - __ISB(); __DSB(); + // for control, stall both IN & OUT + if (ep_addr == 0) { + ep->EPSTATUSSET.reg = USB_DEVICE_EPSTATUSSET_STALLRQ1; + } + } } void dcd_edpt_clear_stall (uint8_t rhport, uint8_t ep_addr) @@ -266,8 +246,6 @@ static bool maybe_handle_setup_packet(void) { // This copies the data elsewhere so we can reuse the buffer. dcd_event_setup_received(0, (uint8_t*) sram_registers[0][0].ADDR.reg, true); - dcd_edpt_xfer(0, 0, control_out_buffer, 64); - setup_count += 1; return true; } return false; @@ -287,12 +265,14 @@ void maybe_transfer_complete(void) { uint32_t epintflag = ep->EPINTFLAG.reg; + uint16_t total_transfer_size; + // Handle IN completions if ((epintflag & USB_DEVICE_EPINTFLAG_TRCPT1) != 0) { ep->EPINTFLAG.reg = USB_DEVICE_EPINTFLAG_TRCPT1; UsbDeviceDescBank* bank = &sram_registers[epnum][TUSB_DIR_IN]; - uint16_t total_transfer_size = bank->PCKSIZE.bit.BYTE_COUNT; + total_transfer_size = bank->PCKSIZE.bit.BYTE_COUNT; uint8_t ep_addr = epnum | TUSB_DIR_IN_MASK; dcd_event_xfer_complete(0, ep_addr, total_transfer_size, DCD_XFER_SUCCESS, true); @@ -303,13 +283,15 @@ void maybe_transfer_complete(void) { ep->EPINTFLAG.reg = USB_DEVICE_EPINTFLAG_TRCPT0; UsbDeviceDescBank* bank = &sram_registers[epnum][TUSB_DIR_OUT]; - uint16_t total_transfer_size = bank->PCKSIZE.bit.BYTE_COUNT; + total_transfer_size = bank->PCKSIZE.bit.BYTE_COUNT; uint8_t ep_addr = epnum; dcd_event_xfer_complete(0, ep_addr, total_transfer_size, DCD_XFER_SUCCESS, true); - if (epnum == 0) { - dcd_edpt_xfer(0, 0, control_out_buffer, 64); - } + } + + // just finished status stage (total size = 0), prepare for next setup packet + if (epnum == 0 && total_transfer_size == 0) { + dcd_edpt_xfer(0, 0, _setup_packet, sizeof(_setup_packet)); } } } diff --git a/src/portable/microchip/samd21/hal_samd21.c b/src/portable/microchip/samd21/hal_samd21.c index 524840be..0df8cfb9 100644 --- a/src/portable/microchip/samd21/hal_samd21.c +++ b/src/portable/microchip/samd21/hal_samd21.c @@ -44,12 +44,6 @@ #include "tusb_hal.h" -/*------------------------------------------------------------------*/ -/* MACRO TYPEDEF CONSTANT ENUM - *------------------------------------------------------------------*/ -#define USB_NVIC_PRIO 7 - -void tusb_hal_nrf_power_event(uint32_t event); /*------------------------------------------------------------------*/ /* TUSB HAL diff --git a/src/portable/microchip/samd51/dcd_samd51.c b/src/portable/microchip/samd51/dcd_samd51.c index e67fbd29..6fff12ba 100644 --- a/src/portable/microchip/samd51/dcd_samd51.c +++ b/src/portable/microchip/samd51/dcd_samd51.c @@ -41,26 +41,13 @@ #if TUSB_OPT_DEVICE_ENABLED && CFG_TUSB_MCU == OPT_MCU_SAMD51 #include "device/dcd.h" - -#include "device/usbd.h" -#include "device/usbd_pvt.h" // to use defer function helper - #include "sam.h" /*------------------------------------------------------------------*/ /* MACRO TYPEDEF CONSTANT ENUM *------------------------------------------------------------------*/ -enum -{ - // Max allowed by USB specs - MAX_PACKET_SIZE = 64, -}; - -UsbDeviceDescBank sram_registers[8][2]; -ATTR_ALIGNED(4) uint8_t control_out_buffer[64]; -ATTR_ALIGNED(4) uint8_t control_in_buffer[64]; - -volatile uint32_t setup_count = 0; +static UsbDeviceDescBank sram_registers[8][2]; +static ATTR_ALIGNED(4) uint8_t _setup_packet[8]; // Setup the control endpoint 0. static void bus_reset(void) { @@ -74,8 +61,8 @@ static void bus_reset(void) { ep->EPCFG.reg = USB_DEVICE_EPCFG_EPTYPE0(0x1) | USB_DEVICE_EPCFG_EPTYPE1(0x1); ep->EPINTENSET.reg = USB_DEVICE_EPINTENSET_TRCPT0 | USB_DEVICE_EPINTENSET_TRCPT1 | USB_DEVICE_EPINTENSET_RXSTP; - dcd_edpt_xfer(0, 0, control_out_buffer, 64); - setup_count = 0; + // Prepare for setup packet + dcd_edpt_xfer(0, 0, _setup_packet, sizeof(_setup_packet)); } @@ -105,7 +92,7 @@ void dcd_disconnect (uint8_t rhport) void dcd_set_address (uint8_t rhport, uint8_t dev_addr) { (void) rhport; - dcd_edpt_xfer (0, TUSB_DIR_IN_MASK, NULL, 0); + // Wait for EP0 to finish before switching the address. while (USB->DEVICE.DeviceEndpoint[0].EPSTATUS.bit.BK1RDY == 1) {} USB->DEVICE.DADD.reg = USB_DEVICE_DADD_DADD(dev_addr) | USB_DEVICE_DADD_ADDEN; @@ -119,20 +106,9 @@ void dcd_set_config (uint8_t rhport, uint8_t config_num) } /*------------------------------------------------------------------*/ -/* Control +/* DCD Endpoint port *------------------------------------------------------------------*/ -bool dcd_control_xfer (uint8_t rhport, uint8_t dir, uint8_t * buffer, uint16_t length) -{ - (void) rhport; - uint8_t ep_addr = 0; - if (dir == TUSB_DIR_IN) { - ep_addr |= TUSB_DIR_IN_MASK; - } - - return dcd_edpt_xfer (rhport, ep_addr, buffer, length); -} - bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * desc_edpt) { (void) rhport; @@ -148,6 +124,10 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * desc_edpt) } size_value++; } + + // unsupported endpoint size + if ( size_value == 7 && desc_edpt->wMaxPacketSize.size != 1023 ) return false; + bank->PCKSIZE.bit.SIZE = size_value; UsbDeviceEndpoint* ep = &USB->DEVICE.DeviceEndpoint[epnum]; @@ -161,7 +141,6 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * desc_edpt) ep->EPCFG.bit.EPTYPE1 = desc_edpt->bmAttributes.xfer + 1; ep->EPINTENSET.bit.TRCPT1 = true; } - __ISB(); __DSB(); return true; } @@ -219,9 +198,12 @@ void dcd_edpt_stall (uint8_t rhport, uint8_t ep_addr) ep->EPSTATUSSET.reg = USB_DEVICE_EPSTATUSSET_STALLRQ1; } else { ep->EPSTATUSSET.reg = USB_DEVICE_EPSTATUSSET_STALLRQ0; - } - __ISB(); __DSB(); + // for control, stall both IN & OUT + if (ep_addr == 0) { + ep->EPSTATUSSET.reg = USB_DEVICE_EPSTATUSSET_STALLRQ1; + } + } } void dcd_edpt_clear_stall (uint8_t rhport, uint8_t ep_addr) @@ -260,13 +242,9 @@ static bool maybe_handle_setup_packet(void) { if (USB->DEVICE.DeviceEndpoint[0].EPINTFLAG.bit.RXSTP) { USB->DEVICE.DeviceEndpoint[0].EPINTFLAG.reg = USB_DEVICE_EPINTFLAG_RXSTP; - // uint8_t* buf = (uint8_t*) sram_registers[0][0].ADDR.reg; - // - // if (buf[6] == 0x12) asm("bkpt"); + // This copies the data elsewhere so we can reuse the buffer. dcd_event_setup_received(0, (uint8_t*) sram_registers[0][0].ADDR.reg, true); - dcd_edpt_xfer(0, 0, control_out_buffer, 64); - setup_count += 1; return true; } return false; @@ -308,9 +286,6 @@ void USB_1_Handler(void) { } void transfer_complete(uint8_t direction) { - // uint8_t* buf = (uint8_t*) sram_registers[0][0].ADDR.reg; - // - // if (buf[6] == 0x12 || setup_count == 2) asm("bkpt"); uint32_t epints = USB->DEVICE.EPINTSMRY.reg; for (uint8_t epnum = 0; epnum < USB_EPT_NUM; epnum++) { if ((epints & (1 << epnum)) == 0) { @@ -330,9 +305,12 @@ void transfer_complete(uint8_t direction) { ep_addr |= TUSB_DIR_IN_MASK; } dcd_event_xfer_complete(0, ep_addr, total_transfer_size, DCD_XFER_SUCCESS, true); - if (epnum == 0 && direction == TUSB_DIR_OUT) { - dcd_edpt_xfer(0, 0, control_out_buffer, 64); + + // just finished status stage (total size = 0), prepare for next setup packet + if (epnum == 0 && total_transfer_size == 0) { + dcd_edpt_xfer(0, 0, _setup_packet, sizeof(_setup_packet)); } + if (direction == TUSB_DIR_IN) { ep->EPINTFLAG.reg = USB_DEVICE_EPINTFLAG_TRCPT1; } else {