From 0ff7d609f0268d4abcec9c6ba2f3e24104a3fd96 Mon Sep 17 00:00:00 2001 From: hathach Date: Sat, 9 Mar 2019 01:04:26 +0700 Subject: [PATCH 01/12] add flash target for stm32 board using stm32cubeprogammger cli --- examples/device/cdc_msc_hid/Makefile | 4 +++- hw/bsp/stm32f407g_disc1/board.mk | 7 +++++++ 2 files changed, 10 insertions(+), 1 deletion(-) diff --git a/examples/device/cdc_msc_hid/Makefile b/examples/device/cdc_msc_hid/Makefile index 5d968e85..a8430b4a 100644 --- a/examples/device/cdc_msc_hid/Makefile +++ b/examples/device/cdc_msc_hid/Makefile @@ -95,6 +95,8 @@ SRC_S := $(SRC_S:.S=.s) OBJ += $(addprefix $(BUILD)/obj/, $(SRC_C:.c=.o)) OBJ += $(addprefix $(BUILD)/obj/, $(SRC_S:.s=.o)) +# Set all as default goal +.DEFAULT_GOAL := all all: $(BUILD)/$(BOARD)-firmware.bin size OBJ_DIRS = $(sort $(dir $(OBJ))) @@ -108,7 +110,7 @@ $(BUILD)/$(BOARD)-firmware.elf: $(OBJ) $(BUILD)/$(BOARD)-firmware.bin: $(BUILD)/$(BOARD)-firmware.elf @echo CREATE $@ - $(OBJCOPY) -O binary -j .vectors -j .text -j .data $^ $@ + @$(OBJCOPY) -O binary -j .vectors -j .text -j .data $^ $@ # We set vpath to point to the top of the tree so that the source files # can be located. By following this scheme, it allows a single build rule diff --git a/hw/bsp/stm32f407g_disc1/board.mk b/hw/bsp/stm32f407g_disc1/board.mk index bc839672..0fc35cee 100644 --- a/hw/bsp/stm32f407g_disc1/board.mk +++ b/hw/bsp/stm32f407g_disc1/board.mk @@ -25,3 +25,10 @@ INC += \ VENDOR = st CHIP_FAMILY = stm32f4 + +# Path to STM32 Cube Programmer CLI +STM32Prog = STM32_Programmer_CLI + +# flash target to download +flash: $(BUILD)/$(BOARD)-firmware.elf + $(STM32Prog) --connect port=swd --write $< --go From ddfc32f5ec7b586c40b8964863d4b19cd5b83185 Mon Sep 17 00:00:00 2001 From: hathach Date: Sun, 10 Mar 2019 01:24:13 +0700 Subject: [PATCH 02/12] adding segger project for stm32f4 --- .../ses/stm32f4/STM32F407VG_MemoryMap.xml | 6 + .../ses/stm32f4/STM32F40x_Registers.xml | 13923 ++++++++++++++++ .../ses/stm32f4/STM32F40x_Vectors.s | 817 + .../ses/stm32f4/STM32F4xx_Startup.s | 125 + .../ses/stm32f4/STM32F4xx_Target.js | 19 + .../ses/stm32f4/flash_placement.xml | 37 + .../cdc_msc_hid/ses/stm32f4/stm32f4.emProject | 91 + .../cdc_msc_hid/ses/stm32f4/thumb_crt0.s | 415 + hw/bsp/stm32f407g_disc1/board.mk | 16 +- 9 files changed, 15447 insertions(+), 2 deletions(-) create mode 100644 examples/device/cdc_msc_hid/ses/stm32f4/STM32F407VG_MemoryMap.xml create mode 100644 examples/device/cdc_msc_hid/ses/stm32f4/STM32F40x_Registers.xml create mode 100644 examples/device/cdc_msc_hid/ses/stm32f4/STM32F40x_Vectors.s create mode 100644 examples/device/cdc_msc_hid/ses/stm32f4/STM32F4xx_Startup.s create mode 100644 examples/device/cdc_msc_hid/ses/stm32f4/STM32F4xx_Target.js create mode 100644 examples/device/cdc_msc_hid/ses/stm32f4/flash_placement.xml create mode 100644 examples/device/cdc_msc_hid/ses/stm32f4/stm32f4.emProject create mode 100644 examples/device/cdc_msc_hid/ses/stm32f4/thumb_crt0.s diff --git a/examples/device/cdc_msc_hid/ses/stm32f4/STM32F407VG_MemoryMap.xml b/examples/device/cdc_msc_hid/ses/stm32f4/STM32F407VG_MemoryMap.xml new file mode 100644 index 00000000..54f86de7 --- /dev/null +++ b/examples/device/cdc_msc_hid/ses/stm32f4/STM32F407VG_MemoryMap.xml @@ -0,0 +1,6 @@ + + + + + + diff --git a/examples/device/cdc_msc_hid/ses/stm32f4/STM32F40x_Registers.xml b/examples/device/cdc_msc_hid/ses/stm32f4/STM32F40x_Registers.xml new file mode 100644 index 00000000..a11cf730 --- /dev/null +++ b/examples/device/cdc_msc_hid/ses/stm32f4/STM32F40x_Registers.xml @@ -0,0 +1,13923 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + 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+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/examples/device/cdc_msc_hid/ses/stm32f4/STM32F40x_Vectors.s b/examples/device/cdc_msc_hid/ses/stm32f4/STM32F40x_Vectors.s new file mode 100644 index 00000000..e9e0392b --- /dev/null +++ b/examples/device/cdc_msc_hid/ses/stm32f4/STM32F40x_Vectors.s @@ -0,0 +1,817 @@ +/***************************************************************************** + * SEGGER Microcontroller GmbH & Co. KG * + * Solutions for real time microcontroller applications * + ***************************************************************************** + * * + * (c) 2017 SEGGER Microcontroller GmbH & Co. KG * + * * + * Internet: www.segger.com Support: support@segger.com * + * * + *****************************************************************************/ + +/***************************************************************************** + * Preprocessor Definitions * + * ------------------------ * + * VECTORS_IN_RAM * + * * + * If defined, an area of RAM will large enough to store the vector table * + * will be reserved. * + * * + *****************************************************************************/ + + .syntax unified + .code 16 + + .section .init, "ax" + .align 0 + +/***************************************************************************** + * Default Exception Handlers * + *****************************************************************************/ + + .thumb_func + .weak NMI_Handler +NMI_Handler: + b . + + .thumb_func + .weak HardFault_Handler +HardFault_Handler: + b . + + .thumb_func + .weak SVC_Handler +SVC_Handler: + b . + + .thumb_func + .weak PendSV_Handler +PendSV_Handler: + b . + + .thumb_func + .weak SysTick_Handler +SysTick_Handler: + b . + + .thumb_func +Dummy_Handler: + b . + +#if defined(__OPTIMIZATION_SMALL) + + .weak WWDG_IRQHandler + .thumb_set WWDG_IRQHandler,Dummy_Handler + + .weak PVD_IRQHandler + .thumb_set PVD_IRQHandler,Dummy_Handler + + .weak TAMP_STAMP_IRQHandler + .thumb_set TAMP_STAMP_IRQHandler,Dummy_Handler + + .weak RTC_WKUP_IRQHandler + .thumb_set RTC_WKUP_IRQHandler,Dummy_Handler + + .weak RCC_IRQHandler + .thumb_set RCC_IRQHandler,Dummy_Handler + + .weak EXTI0_IRQHandler + .thumb_set EXTI0_IRQHandler,Dummy_Handler + + .weak EXTI1_IRQHandler + .thumb_set EXTI1_IRQHandler,Dummy_Handler + + .weak EXTI2_IRQHandler + .thumb_set EXTI2_IRQHandler,Dummy_Handler + + .weak EXTI3_IRQHandler + .thumb_set EXTI3_IRQHandler,Dummy_Handler + + .weak EXTI4_IRQHandler + .thumb_set EXTI4_IRQHandler,Dummy_Handler + + .weak DMA1_Stream0_IRQHandler + .thumb_set DMA1_Stream0_IRQHandler,Dummy_Handler + + .weak DMA1_Stream1_IRQHandler + .thumb_set DMA1_Stream1_IRQHandler,Dummy_Handler + + .weak DMA1_Stream2_IRQHandler + .thumb_set DMA1_Stream2_IRQHandler,Dummy_Handler + + .weak DMA1_Stream3_IRQHandler + .thumb_set DMA1_Stream3_IRQHandler,Dummy_Handler + + .weak DMA1_Stream4_IRQHandler + .thumb_set DMA1_Stream4_IRQHandler,Dummy_Handler + + .weak DMA1_Stream5_IRQHandler + .thumb_set DMA1_Stream5_IRQHandler,Dummy_Handler + + .weak DMA1_Stream6_IRQHandler + .thumb_set DMA1_Stream6_IRQHandler,Dummy_Handler + + .weak ADC_IRQHandler + .thumb_set ADC_IRQHandler,Dummy_Handler + + .weak CAN1_TX_IRQHandler + .thumb_set CAN1_TX_IRQHandler,Dummy_Handler + + .weak CAN1_RX0_IRQHandler + .thumb_set CAN1_RX0_IRQHandler,Dummy_Handler + + .weak CAN1_RX1_IRQHandler + .thumb_set CAN1_RX1_IRQHandler,Dummy_Handler + + .weak CAN1_SCE_IRQHandler + .thumb_set CAN1_SCE_IRQHandler,Dummy_Handler + + .weak EXTI9_5_IRQHandler + .thumb_set EXTI9_5_IRQHandler,Dummy_Handler + + .weak TIM1_BRK_TIM9_IRQHandler + .thumb_set TIM1_BRK_TIM9_IRQHandler,Dummy_Handler + + .weak TIM1_UP_TIM10_IRQHandler + .thumb_set TIM1_UP_TIM10_IRQHandler,Dummy_Handler + + .weak TIM1_TRG_COM_TIM11_IRQHandler + .thumb_set TIM1_TRG_COM_TIM11_IRQHandler,Dummy_Handler + + .weak TIM1_CC_IRQHandler + .thumb_set TIM1_CC_IRQHandler,Dummy_Handler + + .weak TIM2_IRQHandler + .thumb_set TIM2_IRQHandler,Dummy_Handler + + .weak TIM3_IRQHandler + .thumb_set TIM3_IRQHandler,Dummy_Handler + + .weak TIM4_IRQHandler + .thumb_set TIM4_IRQHandler,Dummy_Handler + + .weak I2C1_EV_IRQHandler + .thumb_set I2C1_EV_IRQHandler,Dummy_Handler + + .weak I2C1_ER_IRQHandler + .thumb_set I2C1_ER_IRQHandler,Dummy_Handler + + .weak I2C2_EV_IRQHandler + .thumb_set I2C2_EV_IRQHandler,Dummy_Handler + + .weak I2C2_ER_IRQHandler + .thumb_set I2C2_ER_IRQHandler,Dummy_Handler + + .weak SPI1_IRQHandler + .thumb_set SPI1_IRQHandler,Dummy_Handler + + .weak SPI2_IRQHandler + .thumb_set SPI2_IRQHandler,Dummy_Handler + + .weak USART1_IRQHandler + .thumb_set USART1_IRQHandler,Dummy_Handler + + .weak USART2_IRQHandler + .thumb_set USART2_IRQHandler,Dummy_Handler + + .weak USART3_IRQHandler + .thumb_set USART3_IRQHandler,Dummy_Handler + + .weak EXTI15_10_IRQHandler + .thumb_set EXTI15_10_IRQHandler,Dummy_Handler + + .weak RTC_Alarm_IRQHandler + .thumb_set RTC_Alarm_IRQHandler,Dummy_Handler + + .weak OTG_FS_WKUP_IRQHandler + .thumb_set OTG_FS_WKUP_IRQHandler,Dummy_Handler + + .weak TIM8_BRK_TIM12_IRQHandler + .thumb_set TIM8_BRK_TIM12_IRQHandler,Dummy_Handler + + .weak TIM8_UP_TIM13_IRQHandler + .thumb_set TIM8_UP_TIM13_IRQHandler,Dummy_Handler + + .weak TIM8_TRG_COM_TIM14_IRQHandler + .thumb_set TIM8_TRG_COM_TIM14_IRQHandler,Dummy_Handler + + .weak TIM8_CC_IRQHandler + .thumb_set TIM8_CC_IRQHandler,Dummy_Handler + + .weak DMA1_Stream7_IRQHandler + .thumb_set DMA1_Stream7_IRQHandler,Dummy_Handler + + .weak FSMC_IRQHandler + .thumb_set FSMC_IRQHandler,Dummy_Handler + + .weak SDIO_IRQHandler + .thumb_set SDIO_IRQHandler,Dummy_Handler + + .weak TIM5_IRQHandler + .thumb_set TIM5_IRQHandler,Dummy_Handler + + .weak SPI3_IRQHandler + .thumb_set SPI3_IRQHandler,Dummy_Handler + + .weak UART4_IRQHandler + .thumb_set UART4_IRQHandler,Dummy_Handler + + .weak UART5_IRQHandler + .thumb_set UART5_IRQHandler,Dummy_Handler + + .weak TIM6_DAC_IRQHandler + .thumb_set TIM6_DAC_IRQHandler,Dummy_Handler + + .weak TIM7_IRQHandler + .thumb_set TIM7_IRQHandler,Dummy_Handler + + .weak DMA2_Stream0_IRQHandler + .thumb_set DMA2_Stream0_IRQHandler,Dummy_Handler + + .weak DMA2_Stream1_IRQHandler + .thumb_set DMA2_Stream1_IRQHandler,Dummy_Handler + + .weak DMA2_Stream2_IRQHandler + .thumb_set DMA2_Stream2_IRQHandler,Dummy_Handler + + .weak DMA2_Stream3_IRQHandler + .thumb_set DMA2_Stream3_IRQHandler,Dummy_Handler + + .weak DMA2_Stream4_IRQHandler + .thumb_set DMA2_Stream4_IRQHandler,Dummy_Handler + + .weak ETH_IRQHandler + .thumb_set ETH_IRQHandler,Dummy_Handler + + .weak ETH_WKUP_IRQHandler + .thumb_set ETH_WKUP_IRQHandler,Dummy_Handler + + .weak CAN2_TX_IRQHandler + .thumb_set CAN2_TX_IRQHandler,Dummy_Handler + + .weak CAN2_RX0_IRQHandler + .thumb_set CAN2_RX0_IRQHandler,Dummy_Handler + + .weak CAN2_RX1_IRQHandler + .thumb_set CAN2_RX1_IRQHandler,Dummy_Handler + + .weak CAN2_SCE_IRQHandler + .thumb_set CAN2_SCE_IRQHandler,Dummy_Handler + + .weak OTG_FS_IRQHandler + .thumb_set OTG_FS_IRQHandler,Dummy_Handler + + .weak DMA2_Stream5_IRQHandler + .thumb_set DMA2_Stream5_IRQHandler,Dummy_Handler + + .weak DMA2_Stream6_IRQHandler + .thumb_set DMA2_Stream6_IRQHandler,Dummy_Handler + + .weak DMA2_Stream7_IRQHandler + .thumb_set DMA2_Stream7_IRQHandler,Dummy_Handler + + .weak USART6_IRQHandler + .thumb_set USART6_IRQHandler,Dummy_Handler + + .weak I2C3_EV_IRQHandler + .thumb_set I2C3_EV_IRQHandler,Dummy_Handler + + .weak I2C3_ER_IRQHandler + .thumb_set I2C3_ER_IRQHandler,Dummy_Handler + + .weak OTG_HS_EP1_OUT_IRQHandler + .thumb_set OTG_HS_EP1_OUT_IRQHandler,Dummy_Handler + + .weak OTG_HS_EP1_IN_IRQHandler + .thumb_set OTG_HS_EP1_IN_IRQHandler,Dummy_Handler + + .weak OTG_HS_WKUP_IRQHandler + .thumb_set OTG_HS_WKUP_IRQHandler,Dummy_Handler + + .weak OTG_HS_IRQHandler + .thumb_set OTG_HS_IRQHandler,Dummy_Handler + + .weak DCMI_IRQHandler + .thumb_set DCMI_IRQHandler,Dummy_Handler + + .weak FPU_IRQHandler + .thumb_set FPU_IRQHandler,Dummy_Handler + +#else + + .thumb_func + .weak WWDG_IRQHandler +WWDG_IRQHandler: + b . + + .thumb_func + .weak PVD_IRQHandler +PVD_IRQHandler: + b . + + .thumb_func + .weak TAMP_STAMP_IRQHandler +TAMP_STAMP_IRQHandler: + b . + + .thumb_func + .weak RTC_WKUP_IRQHandler +RTC_WKUP_IRQHandler: + b . + + .thumb_func + .weak RCC_IRQHandler +RCC_IRQHandler: + b . + + .thumb_func + .weak EXTI0_IRQHandler +EXTI0_IRQHandler: + b . + + .thumb_func + .weak EXTI1_IRQHandler +EXTI1_IRQHandler: + b . + + .thumb_func + .weak EXTI2_IRQHandler +EXTI2_IRQHandler: + b . + + .thumb_func + .weak EXTI3_IRQHandler +EXTI3_IRQHandler: + b . + + .thumb_func + .weak EXTI4_IRQHandler +EXTI4_IRQHandler: + b . + + .thumb_func + .weak DMA1_Stream0_IRQHandler +DMA1_Stream0_IRQHandler: + b . + + .thumb_func + .weak DMA1_Stream1_IRQHandler +DMA1_Stream1_IRQHandler: + b . + + .thumb_func + .weak DMA1_Stream2_IRQHandler +DMA1_Stream2_IRQHandler: + b . + + .thumb_func + .weak DMA1_Stream3_IRQHandler +DMA1_Stream3_IRQHandler: + b . + + .thumb_func + .weak DMA1_Stream4_IRQHandler +DMA1_Stream4_IRQHandler: + b . + + .thumb_func + .weak DMA1_Stream5_IRQHandler +DMA1_Stream5_IRQHandler: + b . + + .thumb_func + .weak DMA1_Stream6_IRQHandler +DMA1_Stream6_IRQHandler: + b . + + .thumb_func + .weak ADC_IRQHandler +ADC_IRQHandler: + b . + + .thumb_func + .weak CAN1_TX_IRQHandler +CAN1_TX_IRQHandler: + b . + + .thumb_func + .weak CAN1_RX0_IRQHandler +CAN1_RX0_IRQHandler: + b . + + .thumb_func + .weak CAN1_RX1_IRQHandler +CAN1_RX1_IRQHandler: + b . + + .thumb_func + .weak CAN1_SCE_IRQHandler +CAN1_SCE_IRQHandler: + b . + + .thumb_func + .weak EXTI9_5_IRQHandler +EXTI9_5_IRQHandler: + b . + + .thumb_func + .weak TIM1_BRK_TIM9_IRQHandler +TIM1_BRK_TIM9_IRQHandler: + b . + + .thumb_func + .weak TIM1_UP_TIM10_IRQHandler +TIM1_UP_TIM10_IRQHandler: + b . + + .thumb_func + .weak TIM1_TRG_COM_TIM11_IRQHandler +TIM1_TRG_COM_TIM11_IRQHandler: + b . + + .thumb_func + .weak TIM1_CC_IRQHandler +TIM1_CC_IRQHandler: + b . + + .thumb_func + .weak TIM2_IRQHandler +TIM2_IRQHandler: + b . + + .thumb_func + .weak TIM3_IRQHandler +TIM3_IRQHandler: + b . + + .thumb_func + .weak TIM4_IRQHandler +TIM4_IRQHandler: + b . + + .thumb_func + .weak I2C1_EV_IRQHandler +I2C1_EV_IRQHandler: + b . + + .thumb_func + .weak I2C1_ER_IRQHandler +I2C1_ER_IRQHandler: + b . + + .thumb_func + .weak I2C2_EV_IRQHandler +I2C2_EV_IRQHandler: + b . + + .thumb_func + .weak I2C2_ER_IRQHandler +I2C2_ER_IRQHandler: + b . + + .thumb_func + .weak SPI1_IRQHandler +SPI1_IRQHandler: + b . + + .thumb_func + .weak SPI2_IRQHandler +SPI2_IRQHandler: + b . + + .thumb_func + .weak USART1_IRQHandler +USART1_IRQHandler: + b . + + .thumb_func + .weak USART2_IRQHandler +USART2_IRQHandler: + b . + + .thumb_func + .weak USART3_IRQHandler +USART3_IRQHandler: + b . + + .thumb_func + .weak EXTI15_10_IRQHandler +EXTI15_10_IRQHandler: + b . + + .thumb_func + .weak RTC_Alarm_IRQHandler +RTC_Alarm_IRQHandler: + b . + + .thumb_func + .weak OTG_FS_WKUP_IRQHandler +OTG_FS_WKUP_IRQHandler: + b . + + .thumb_func + .weak TIM8_BRK_TIM12_IRQHandler +TIM8_BRK_TIM12_IRQHandler: + b . + + .thumb_func + .weak TIM8_UP_TIM13_IRQHandler +TIM8_UP_TIM13_IRQHandler: + b . + + .thumb_func + .weak TIM8_TRG_COM_TIM14_IRQHandler +TIM8_TRG_COM_TIM14_IRQHandler: + b . + + .thumb_func + .weak TIM8_CC_IRQHandler +TIM8_CC_IRQHandler: + b . + + .thumb_func + .weak DMA1_Stream7_IRQHandler +DMA1_Stream7_IRQHandler: + b . + + .thumb_func + .weak FSMC_IRQHandler +FSMC_IRQHandler: + b . + + .thumb_func + .weak SDIO_IRQHandler +SDIO_IRQHandler: + b . + + .thumb_func + .weak TIM5_IRQHandler +TIM5_IRQHandler: + b . + + .thumb_func + .weak SPI3_IRQHandler +SPI3_IRQHandler: + b . + + .thumb_func + .weak UART4_IRQHandler +UART4_IRQHandler: + b . + + .thumb_func + .weak UART5_IRQHandler +UART5_IRQHandler: + b . + + .thumb_func + .weak TIM6_DAC_IRQHandler +TIM6_DAC_IRQHandler: + b . + + .thumb_func + .weak TIM7_IRQHandler +TIM7_IRQHandler: + b . + + .thumb_func + .weak DMA2_Stream0_IRQHandler +DMA2_Stream0_IRQHandler: + b . + + .thumb_func + .weak DMA2_Stream1_IRQHandler +DMA2_Stream1_IRQHandler: + b . + + .thumb_func + .weak DMA2_Stream2_IRQHandler +DMA2_Stream2_IRQHandler: + b . + + .thumb_func + .weak DMA2_Stream3_IRQHandler +DMA2_Stream3_IRQHandler: + b . + + .thumb_func + .weak DMA2_Stream4_IRQHandler +DMA2_Stream4_IRQHandler: + b . + + .thumb_func + .weak ETH_IRQHandler +ETH_IRQHandler: + b . + + .thumb_func + .weak ETH_WKUP_IRQHandler +ETH_WKUP_IRQHandler: + b . + + .thumb_func + .weak CAN2_TX_IRQHandler +CAN2_TX_IRQHandler: + b . + + .thumb_func + .weak CAN2_RX0_IRQHandler +CAN2_RX0_IRQHandler: + b . + + .thumb_func + .weak CAN2_RX1_IRQHandler +CAN2_RX1_IRQHandler: + b . + + .thumb_func + .weak CAN2_SCE_IRQHandler +CAN2_SCE_IRQHandler: + b . + + .thumb_func + .weak OTG_FS_IRQHandler +OTG_FS_IRQHandler: + b . + + .thumb_func + .weak DMA2_Stream5_IRQHandler +DMA2_Stream5_IRQHandler: + b . + + .thumb_func + .weak DMA2_Stream6_IRQHandler +DMA2_Stream6_IRQHandler: + b . + + .thumb_func + .weak DMA2_Stream7_IRQHandler +DMA2_Stream7_IRQHandler: + b . + + .thumb_func + .weak USART6_IRQHandler +USART6_IRQHandler: + b . + + .thumb_func + .weak I2C3_EV_IRQHandler +I2C3_EV_IRQHandler: + b . + + .thumb_func + .weak I2C3_ER_IRQHandler +I2C3_ER_IRQHandler: + b . + + .thumb_func + .weak OTG_HS_EP1_OUT_IRQHandler +OTG_HS_EP1_OUT_IRQHandler: + b . + + .thumb_func + .weak OTG_HS_EP1_IN_IRQHandler +OTG_HS_EP1_IN_IRQHandler: + b . + + .thumb_func + .weak OTG_HS_WKUP_IRQHandler +OTG_HS_WKUP_IRQHandler: + b . + + .thumb_func + .weak OTG_HS_IRQHandler +OTG_HS_IRQHandler: + b . + + .thumb_func + .weak DCMI_IRQHandler +DCMI_IRQHandler: + b . + + .thumb_func + .weak FPU_IRQHandler +FPU_IRQHandler: + b . + +#endif + +/***************************************************************************** + * Vector Table * + *****************************************************************************/ + + .section .vectors, "ax" + .align 0 + .global _vectors + .extern __stack_end__ + .extern Reset_Handler + +_vectors: + .word __stack_end__ + .word Reset_Handler + .word NMI_Handler + .word HardFault_Handler + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word SVC_Handler + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word PendSV_Handler + .word SysTick_Handler + .word WWDG_IRQHandler + .word PVD_IRQHandler + .word TAMP_STAMP_IRQHandler + .word RTC_WKUP_IRQHandler + .word Dummy_Handler /* Reserved */ + .word RCC_IRQHandler + .word EXTI0_IRQHandler + .word EXTI1_IRQHandler + .word EXTI2_IRQHandler + .word EXTI3_IRQHandler + .word EXTI4_IRQHandler + .word DMA1_Stream0_IRQHandler + .word DMA1_Stream1_IRQHandler + .word DMA1_Stream2_IRQHandler + .word DMA1_Stream3_IRQHandler + .word DMA1_Stream4_IRQHandler + .word DMA1_Stream5_IRQHandler + .word DMA1_Stream6_IRQHandler + .word ADC_IRQHandler + .word CAN1_TX_IRQHandler + .word CAN1_RX0_IRQHandler + .word CAN1_RX1_IRQHandler + .word CAN1_SCE_IRQHandler + .word EXTI9_5_IRQHandler + .word TIM1_BRK_TIM9_IRQHandler + .word TIM1_UP_TIM10_IRQHandler + .word TIM1_TRG_COM_TIM11_IRQHandler + .word TIM1_CC_IRQHandler + .word TIM2_IRQHandler + .word TIM3_IRQHandler + .word TIM4_IRQHandler + .word I2C1_EV_IRQHandler + .word I2C1_ER_IRQHandler + .word I2C2_EV_IRQHandler + .word I2C2_ER_IRQHandler + .word SPI1_IRQHandler + .word SPI2_IRQHandler + .word USART1_IRQHandler + .word USART2_IRQHandler + .word USART3_IRQHandler + .word EXTI15_10_IRQHandler + .word RTC_Alarm_IRQHandler + .word OTG_FS_WKUP_IRQHandler + .word TIM8_BRK_TIM12_IRQHandler + .word TIM8_UP_TIM13_IRQHandler + .word TIM8_TRG_COM_TIM14_IRQHandler + .word TIM8_CC_IRQHandler + .word DMA1_Stream7_IRQHandler + .word FSMC_IRQHandler + .word SDIO_IRQHandler + .word TIM5_IRQHandler + .word SPI3_IRQHandler + .word UART4_IRQHandler + .word UART5_IRQHandler + .word TIM6_DAC_IRQHandler + .word TIM7_IRQHandler + .word DMA2_Stream0_IRQHandler + .word DMA2_Stream1_IRQHandler + .word DMA2_Stream2_IRQHandler + .word DMA2_Stream3_IRQHandler + .word DMA2_Stream4_IRQHandler + .word ETH_IRQHandler + .word ETH_WKUP_IRQHandler + .word CAN2_TX_IRQHandler + .word CAN2_RX0_IRQHandler + .word CAN2_RX1_IRQHandler + .word CAN2_SCE_IRQHandler + .word OTG_FS_IRQHandler + .word DMA2_Stream5_IRQHandler + .word DMA2_Stream6_IRQHandler + .word DMA2_Stream7_IRQHandler + .word USART6_IRQHandler + .word I2C3_EV_IRQHandler + .word I2C3_ER_IRQHandler + .word OTG_HS_EP1_OUT_IRQHandler + .word OTG_HS_EP1_IN_IRQHandler + .word OTG_HS_WKUP_IRQHandler + .word OTG_HS_IRQHandler + .word DCMI_IRQHandler + .word Dummy_Handler /* Reserved */ + .word Dummy_Handler /* Reserved */ + .word FPU_IRQHandler +_vectors_end: + +#ifdef VECTORS_IN_RAM + .section .vectors_ram, "ax" + .align 0 + .global _vectors_ram + +_vectors_ram: + .space _vectors_end - _vectors, 0 +#endif diff --git a/examples/device/cdc_msc_hid/ses/stm32f4/STM32F4xx_Startup.s b/examples/device/cdc_msc_hid/ses/stm32f4/STM32F4xx_Startup.s new file mode 100644 index 00000000..42415cbb --- /dev/null +++ b/examples/device/cdc_msc_hid/ses/stm32f4/STM32F4xx_Startup.s @@ -0,0 +1,125 @@ +/***************************************************************************** + * SEGGER Microcontroller GmbH & Co. KG * + * Solutions for real time microcontroller applications * + ***************************************************************************** + * * + * (c) 2017 SEGGER Microcontroller GmbH & Co. KG * + * * + * Internet: www.segger.com Support: support@segger.com * + * * + *****************************************************************************/ + +/***************************************************************************** + * Preprocessor Definitions * + * ------------------------ * + * NO_FPU_ENABLE * + * * + * If defined, FPU will not be enabled. * + * * + * NO_STACK_INIT * + * * + * If defined, the stack pointer will not be initialised. * + * * + * NO_SYSTEM_INIT * + * * + * If defined, the SystemInit() function will not be called. By default * + * SystemInit() is called after reset to enable the clocks and memories to * + * be initialised prior to any C startup initialisation. * + * * + * NO_VTOR_CONFIG * + * * + * If defined, the vector table offset register will not be configured. * + * * + * MEMORY_INIT * + * * + * If defined, the MemoryInit() function will be called. By default * + * MemoryInit() is called after SystemInit() to enable an external memory * + * controller. * + * * + * STACK_INIT_VAL * + * * + * If defined, specifies the initial stack pointer value. If undefined, * + * the stack pointer will be initialised to point to the end of the * + * RAM segment. * + * * + * VECTORS_IN_RAM * + * * + * If defined, the exception vectors will be copied from Flash to RAM. * + * * + *****************************************************************************/ + + .syntax unified + + .global Reset_Handler + .extern _vectors + + .section .init, "ax" + .thumb_func + + .equ VTOR_REG, 0xE000ED08 + .equ FPU_CPACR_REG, 0xE000ED88 + +#ifndef STACK_INIT_VAL +#define STACK_INIT_VAL __RAM_segment_end__ +#endif + +Reset_Handler: +#ifndef NO_STACK_INIT + /* Initialise main stack */ + ldr r0, =STACK_INIT_VAL + bic r0, #0x7 + mov sp, r0 +#endif + +#ifndef NO_SYSTEM_INIT + /* Initialise system */ + ldr r0, =SystemInit + blx r0 +#endif + +#ifdef MEMORY_INIT + ldr r0, =MemoryInit + blx r0 +#endif + +#ifdef VECTORS_IN_RAM + /* Copy exception vectors into RAM */ + ldr r0, =__vectors_start__ + ldr r1, =__vectors_end__ + ldr r2, =__vectors_ram_start__ +1: + cmp r0, r1 + beq 2f + ldr r3, [r0] + str r3, [r2] + adds r0, r0, #4 + adds r2, r2, #4 + b 1b +2: +#endif + +#ifndef NO_VTOR_CONFIG + /* Configure vector table offset register */ + ldr r0, =VTOR_REG +#ifdef VECTORS_IN_RAM + ldr r1, =_vectors_ram +#else + ldr r1, =_vectors +#endif + str r1, [r0] +#endif + +#if (defined(__ARM_ARCH_FPV4_SP_D16__) || defined(__ARM_ARCH_FPV5_D16__)) && !defined(NO_FPU_ENABLE) + /* Enable FPU */ + ldr r0, =FPU_CPACR_REG + ldr r1, [r0] + orr r1, r1, #(0xF << 20) + str r1, [r0] + dsb + isb +#endif + + /* Jump to program start */ + b _start + + diff --git a/examples/device/cdc_msc_hid/ses/stm32f4/STM32F4xx_Target.js b/examples/device/cdc_msc_hid/ses/stm32f4/STM32F4xx_Target.js new file mode 100644 index 00000000..20560af4 --- /dev/null +++ b/examples/device/cdc_msc_hid/ses/stm32f4/STM32F4xx_Target.js @@ -0,0 +1,19 @@ +/***************************************************************************** + * SEGGER Microcontroller GmbH & Co. KG * + * Solutions for real time microcontroller applications * + ***************************************************************************** + * * + * (c) 2017 SEGGER Microcontroller GmbH & Co. KG * + * * + * Internet: www.segger.com Support: support@segger.com * + * * + *****************************************************************************/ + +function Reset() { + TargetInterface.resetAndStop(); +} + +function EnableTrace(traceInterfaceType) { + // TODO: Enable trace +} + diff --git a/examples/device/cdc_msc_hid/ses/stm32f4/flash_placement.xml b/examples/device/cdc_msc_hid/ses/stm32f4/flash_placement.xml new file mode 100644 index 00000000..79bedc53 --- /dev/null +++ b/examples/device/cdc_msc_hid/ses/stm32f4/flash_placement.xml @@ -0,0 +1,37 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/examples/device/cdc_msc_hid/ses/stm32f4/stm32f4.emProject b/examples/device/cdc_msc_hid/ses/stm32f4/stm32f4.emProject new file mode 100644 index 00000000..3eb2632c --- /dev/null +++ b/examples/device/cdc_msc_hid/ses/stm32f4/stm32f4.emProject @@ -0,0 +1,91 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/examples/device/cdc_msc_hid/ses/stm32f4/thumb_crt0.s b/examples/device/cdc_msc_hid/ses/stm32f4/thumb_crt0.s new file mode 100644 index 00000000..17f88e0c --- /dev/null +++ b/examples/device/cdc_msc_hid/ses/stm32f4/thumb_crt0.s @@ -0,0 +1,415 @@ +// ********************************************************************** +// * SEGGER Microcontroller GmbH * +// * The Embedded Experts * +// ********************************************************************** +// * * +// * (c) 2014 - 2018 SEGGER Microcontroller GmbH * +// * (c) 2001 - 2018 Rowley Associates Limited * +// * * +// * www.segger.com Support: support@segger.com * +// * * +// ********************************************************************** +// * * +// * All rights reserved. * +// * * +// * Redistribution and use in source and binary forms, with or * +// * without modification, are permitted provided that the following * +// * conditions are met: * +// * * +// * - Redistributions of source code must retain the above copyright * +// * notice, this list of conditions and the following disclaimer. * +// * * +// * - Neither the name of SEGGER Microcontroller GmbH * +// * nor the names of its contributors may be used to endorse or * +// * promote products derived from this software without specific * +// * prior written permission. * +// * * +// * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND * +// * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, * +// * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF * +// * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * +// * DISCLAIMED. * +// * IN NO EVENT SHALL SEGGER Microcontroller GmbH BE LIABLE FOR * +// * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * +// * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT * +// * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; * +// * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * +// * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * +// * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * +// * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * +// * DAMAGE. * +// * * +// ********************************************************************** +// +// +// Preprocessor Definitions +// ------------------------ +// APP_ENTRY_POINT +// +// Defines the application entry point function, if undefined this setting +// defaults to "main". +// +// INITIALIZE_STACK +// +// If defined, the contents of the stack will be initialized to a the +// value 0xCC. +// +// INITIALIZE_SECONDARY_SECTIONS +// +// If defined, the .data2, .text2, .rodata2 and .bss2 sections will be initialized. +// +// INITIALIZE_TCM_SECTIONS +// +// If defined, the .data_tcm, .text_tcm, .rodata_tcm and .bss_tcm sections +// will be initialized. +// +// INITIALIZE_USER_SECTIONS +// +// If defined, the function InitializeUserMemorySections will be called prior +// to entering main in order to allow the user to initialize any user defined +// memory sections. +// +// FULL_LIBRARY +// +// If defined then +// - argc, argv are setup by the debug_getargs. +// - the exit symbol is defined and executes on return from main. +// - the exit symbol calls destructors, atexit functions and then debug_exit. +// +// If not defined then +// - argc and argv are zero. +// - the exit symbol is defined, executes on return from main and loops +// + +#ifndef APP_ENTRY_POINT +#define APP_ENTRY_POINT main +#endif + +#ifndef ARGSSPACE +#define ARGSSPACE 128 +#endif + .syntax unified + + .global _start + .extern APP_ENTRY_POINT + .global exit + .weak exit + +#ifdef INITIALIZE_USER_SECTIONS + .extern InitializeUserMemorySections +#endif + + .section .init, "ax" + .code 16 + .balign 2 + .thumb_func + +_start: + /* Set up main stack if size > 0 */ + ldr r1, =__stack_end__ + ldr r0, =__stack_start__ + subs r2, r1, r0 + beq 1f +#ifdef __ARM_EABI__ + movs r2, #0x7 + bics r1, r2 +#endif + mov sp, r1 +#ifdef INITIALIZE_STACK + movs r2, #0xCC + ldr r0, =__stack_start__ + bl memory_set +#endif +1: + + /* Set up process stack if size > 0 */ + ldr r1, =__stack_process_end__ + ldr r0, =__stack_process_start__ + subs r2, r1, r0 + beq 1f +#ifdef __ARM_EABI__ + movs r2, #0x7 + bics r1, r2 +#endif + msr psp, r1 + movs r2, #2 + msr control, r2 +#ifdef INITIALIZE_STACK + movs r2, #0xCC + bl memory_set +#endif +1: + + /* Copy initialized memory sections into RAM (if necessary). */ + ldr r0, =__data_load_start__ + ldr r1, =__data_start__ + ldr r2, =__data_end__ + bl memory_copy + ldr r0, =__text_load_start__ + ldr r1, =__text_start__ + ldr r2, =__text_end__ + bl memory_copy + ldr r0, =__fast_load_start__ + ldr r1, =__fast_start__ + ldr r2, =__fast_end__ + bl memory_copy + ldr r0, =__ctors_load_start__ + ldr r1, =__ctors_start__ + ldr r2, =__ctors_end__ + bl memory_copy + ldr r0, =__dtors_load_start__ + ldr r1, =__dtors_start__ + ldr r2, =__dtors_end__ + bl memory_copy + ldr r0, =__rodata_load_start__ + ldr r1, =__rodata_start__ + ldr r2, =__rodata_end__ + bl memory_copy + ldr r0, =__tdata_load_start__ + ldr r1, =__tdata_start__ + ldr r2, =__tdata_end__ + bl memory_copy +#ifdef INITIALIZE_SECONDARY_SECTIONS + ldr r0, =__data2_load_start__ + ldr r1, =__data2_start__ + ldr r2, =__data2_end__ + bl memory_copy + ldr r0, =__text2_load_start__ + ldr r1, =__text2_start__ + ldr r2, =__text2_end__ + bl memory_copy + ldr r0, =__rodata2_load_start__ + ldr r1, =__rodata2_start__ + ldr r2, =__rodata2_end__ + bl memory_copy +#endif /* #ifdef INITIALIZE_SECONDARY_SECTIONS */ +#ifdef INITIALIZE_TCM_SECTIONS + ldr r0, =__data_tcm_load_start__ + ldr r1, =__data_tcm_start__ + ldr r2, =__data_tcm_end__ + bl memory_copy + ldr r0, =__text_tcm_load_start__ + ldr r1, =__text_tcm_start__ + ldr r2, =__text_tcm_end__ + bl memory_copy + ldr r0, =__rodata_tcm_load_start__ + ldr r1, =__rodata_tcm_start__ + ldr r2, =__rodata_tcm_end__ + bl memory_copy +#endif /* #ifdef INITIALIZE_TCM_SECTIONS */ + + /* Zero the bss. */ + ldr r0, =__bss_start__ + ldr r1, =__bss_end__ + movs r2, #0 + bl memory_set + ldr r0, =__tbss_start__ + ldr r1, =__tbss_end__ + movs r2, #0 + bl memory_set +#ifdef INITIALIZE_SECONDARY_SECTIONS + ldr r0, =__bss2_start__ + ldr r1, =__bss2_end__ + mov r2, #0 + bl memory_set +#endif /* #ifdef INITIALIZE_SECONDARY_SECTIONS */ +#ifdef INITIALIZE_TCM_SECTIONS + ldr r0, =__bss_tcm_start__ + ldr r1, =__bss_tcm_end__ + mov r2, #0 + bl memory_set +#endif /* #ifdef INITIALIZE_TCM_SECTIONS */ + + /* Initialize the heap */ + ldr r0, = __heap_start__ + ldr r1, = __heap_end__ + subs r1, r1, r0 + cmp r1, #8 + blt 1f + movs r2, #0 + str r2, [r0] + adds r0, r0, #4 + str r1, [r0] +1: + +#ifdef INITIALIZE_USER_SECTIONS + ldr r2, =InitializeUserMemorySections + blx r2 +#endif + + /* Call constructors */ + ldr r0, =__ctors_start__ + ldr r1, =__ctors_end__ +ctor_loop: + cmp r0, r1 + beq ctor_end + ldr r2, [r0] + adds r0, #4 + push {r0-r1} + blx r2 + pop {r0-r1} + b ctor_loop +ctor_end: + + /* Setup initial call frame */ + movs r0, #0 + mov lr, r0 + mov r12, sp + + .type start, function +start: + /* Jump to application entry point */ +#ifdef FULL_LIBRARY + movs r0, #ARGSSPACE + ldr r1, =args + ldr r2, =debug_getargs + blx r2 + ldr r1, =args +#else + movs r0, #0 + movs r1, #0 +#endif + ldr r2, =APP_ENTRY_POINT + blx r2 + + .thumb_func +exit: +#ifdef FULL_LIBRARY + mov r5, r0 // save the exit parameter/return result + + /* Call destructors */ + ldr r0, =__dtors_start__ + ldr r1, =__dtors_end__ +dtor_loop: + cmp r0, r1 + beq dtor_end + ldr r2, [r0] + add r0, #4 + push {r0-r1} + blx r2 + pop {r0-r1} + b dtor_loop +dtor_end: + + /* Call atexit functions */ + ldr r2, =_execute_at_exit_fns + blx r2 + + /* Call debug_exit with return result/exit parameter */ + mov r0, r5 + ldr r2, =debug_exit + blx r2 +#endif + + /* Returned from application entry point, loop forever. */ +exit_loop: + b exit_loop + + .thumb_func +memory_copy: + cmp r0, r1 + beq 2f + subs r2, r2, r1 + beq 2f +1: + ldrb r3, [r0] + adds r0, r0, #1 + strb r3, [r1] + adds r1, r1, #1 + subs r2, r2, #1 + bne 1b +2: + bx lr + + .thumb_func +memory_set: + cmp r0, r1 + beq 1f + strb r2, [r0] + adds r0, r0, #1 + b memory_set +1: + bx lr + + // default C/C++ library helpers + +.macro HELPER helper_name + .section .text.\helper_name, "ax", %progbits + .balign 2 + .global \helper_name + .weak \helper_name +\helper_name: + .thumb_func +.endm + +.macro JUMPTO name +#if defined(__thumb__) && !defined(__thumb2__) + mov r12, r0 + ldr r0, =\name + push {r0} + mov r0, r12 + pop {pc} +#else + b \name +#endif +.endm + +HELPER __aeabi_read_tp + ldr r0, =__tbss_start__-8 + bx lr +HELPER abort + b . +HELPER __assert + b . +HELPER __aeabi_assert + b . +HELPER __sync_synchronize + bx lr +HELPER __getchar + JUMPTO debug_getchar +HELPER __putchar + JUMPTO debug_putchar +HELPER __open + JUMPTO debug_fopen +HELPER __close + JUMPTO debug_fclose +HELPER __write + mov r3, r0 + mov r0, r1 + movs r1, #1 + JUMPTO debug_fwrite +HELPER __read + mov r3, r0 + mov r0, r1 + movs r1, #1 + JUMPTO debug_fread +HELPER __seek + push {r4, lr} + mov r4, r0 + bl debug_fseek + cmp r0, #0 + bne 1f + mov r0, r4 + bl debug_ftell + pop {r4, pc} +1: + ldr r0, =-1 + pop {r4, pc} + // char __user_locale_name_buffer[]; + .section .bss.__user_locale_name_buffer, "aw", %nobits + .global __user_locale_name_buffer + .weak __user_locale_name_buffer + __user_locale_name_buffer: + .word 0x0 + +#ifdef FULL_LIBRARY + .bss +args: + .space ARGSSPACE +#endif + + /* Setup attibutes of stack and heap sections so they don't take up room in the elf file */ + .section .stack, "wa", %nobits + .section .stack_process, "wa", %nobits + .section .heap, "wa", %nobits + diff --git a/hw/bsp/stm32f407g_disc1/board.mk b/hw/bsp/stm32f407g_disc1/board.mk index 0fc35cee..e20c0cb0 100644 --- a/hw/bsp/stm32f407g_disc1/board.mk +++ b/hw/bsp/stm32f407g_disc1/board.mk @@ -27,8 +27,20 @@ VENDOR = st CHIP_FAMILY = stm32f4 # Path to STM32 Cube Programmer CLI -STM32Prog = STM32_Programmer_CLI +ifeq ($(OS),Windows_NT) + STM32Prog = C:/Program Files/STMicroelectronics/STM32Cube/STM32CubeProgrammer/bin/STM32_Programmer_CLI +else + UNAME_S := $(shell uname -s) + + ifeq ($(UNAME_S),Linux) + STM32Prog = $(HOME)/STMicroelectronics/STM32Cube/STM32CubeProgrammer/bin/STM32_Programmer_CLI + endif + + ifeq ($(UNAME_S),Darwin) + STM32Prog = STM32_Programmer_CLI + endif +endif -# flash target to download +# flash target using on-board stlink flash: $(BUILD)/$(BOARD)-firmware.elf $(STM32Prog) --connect port=swd --write $< --go From 195a44172a964b377330bc7f269b611bb920fdc7 Mon Sep 17 00:00:00 2001 From: hathach Date: Wed, 13 Mar 2019 16:54:10 +0700 Subject: [PATCH 03/12] update stm32 dcd stall control endpoint --- hw/bsp/stm32f407g_disc1/board.mk | 3 +- .../stm32f407g_disc1/board_stm32f407g_disc1.c | 2 - src/portable/st/stm32f4/dcd_stm32f4.c | 52 ++++++++------ src/portable/st/stm32f4/hal_stm32f4.c | 69 ------------------- 4 files changed, 33 insertions(+), 93 deletions(-) delete mode 100644 src/portable/st/stm32f4/hal_stm32f4.c diff --git a/hw/bsp/stm32f407g_disc1/board.mk b/hw/bsp/stm32f407g_disc1/board.mk index e20c0cb0..cbd6005d 100644 --- a/hw/bsp/stm32f407g_disc1/board.mk +++ b/hw/bsp/stm32f407g_disc1/board.mk @@ -41,6 +41,7 @@ else endif endif -# flash target using on-board stlink +# flash target using on-board stlink or jlink flash: $(BUILD)/$(BOARD)-firmware.elf $(STM32Prog) --connect port=swd --write $< --go + #JLinkExe \ No newline at end of file diff --git a/hw/bsp/stm32f407g_disc1/board_stm32f407g_disc1.c b/hw/bsp/stm32f407g_disc1/board_stm32f407g_disc1.c index ea9c779d..fc872e83 100644 --- a/hw/bsp/stm32f407g_disc1/board_stm32f407g_disc1.c +++ b/hw/bsp/stm32f407g_disc1/board_stm32f407g_disc1.c @@ -45,8 +45,6 @@ //--------------------------------------------------------------------+ // MACRO TYPEDEF CONSTANT ENUM DECLARATION //--------------------------------------------------------------------+ -#define LED_STATE_ON 1 - void board_init(void) { // Init the LED on PD14 diff --git a/src/portable/st/stm32f4/dcd_stm32f4.c b/src/portable/st/stm32f4/dcd_stm32f4.c index be5a99d0..e3b7b2db 100644 --- a/src/portable/st/stm32f4/dcd_stm32f4.c +++ b/src/portable/st/stm32f4/dcd_stm32f4.c @@ -310,36 +310,46 @@ void dcd_edpt_stall (uint8_t rhport, uint8_t ep_addr) uint8_t const dir = tu_edpt_dir(ep_addr); if(dir == TUSB_DIR_IN) { - // Stop transmitting packets and NAK IN xfers. - in_ep[epnum].DIEPCTL |= USB_OTG_DIEPCTL_SNAK; - while((in_ep[epnum].DIEPINT & USB_OTG_DIEPINT_INEPNE) == 0); + // Only disable currently enabled non-control endpoint + if ( (epnum == 0) || !(in_ep[epnum].DIEPCTL & USB_OTG_DIEPCTL_EPENA) ){ + in_ep[epnum].DIEPCTL |= (USB_OTG_DIEPCTL_SNAK | USB_OTG_DIEPCTL_STALL); + }else { + // Stop transmitting packets and NAK IN xfers. + in_ep[epnum].DIEPCTL |= USB_OTG_DIEPCTL_SNAK; + while((in_ep[epnum].DIEPINT & USB_OTG_DIEPINT_INEPNE) == 0); - // Disable the endpoint. Note that both SNAK and STALL are set here. - in_ep[epnum].DIEPCTL |= (USB_OTG_DIEPCTL_SNAK | USB_OTG_DIEPCTL_STALL | \ - USB_OTG_DIEPCTL_EPDIS); - while((in_ep[epnum].DIEPINT & USB_OTG_DIEPINT_EPDISD_Msk) == 0); - in_ep[epnum].DIEPINT = USB_OTG_DIEPINT_EPDISD; + // Disable the endpoint. Note that both SNAK and STALL are set here. + in_ep[epnum].DIEPCTL |= (USB_OTG_DIEPCTL_SNAK | USB_OTG_DIEPCTL_STALL | \ + USB_OTG_DIEPCTL_EPDIS); + while((in_ep[epnum].DIEPINT & USB_OTG_DIEPINT_EPDISD_Msk) == 0); + in_ep[epnum].DIEPINT = USB_OTG_DIEPINT_EPDISD; + } // Flush the FIFO, and wait until we have confirmed it cleared. USB_OTG_FS->GRSTCTL |= ((epnum - 1) << USB_OTG_GRSTCTL_TXFNUM_Pos); USB_OTG_FS->GRSTCTL |= USB_OTG_GRSTCTL_TXFFLSH; while((USB_OTG_FS->GRSTCTL & USB_OTG_GRSTCTL_TXFFLSH_Msk) != 0); } else { - // Asserting GONAK is required to STALL an OUT endpoint. - // Simpler to use polling here, we don't use the "B"OUTNAKEFF interrupt - // anyway, and it can't be cleared by user code. If this while loop never - // finishes, we have bigger problems than just the stack. - dev->DCTL |= USB_OTG_DCTL_SGONAK; - while((USB_OTG_FS->GINTSTS & USB_OTG_GINTSTS_BOUTNAKEFF_Msk) == 0); + // Only disable currently enabled non-control endpoint + if ( (epnum == 0) || !(out_ep[epnum].DOEPCTL & USB_OTG_DOEPCTL_EPENA) ){ + out_ep[epnum].DOEPCTL |= USB_OTG_DIEPCTL_STALL; + }else { + // Asserting GONAK is required to STALL an OUT endpoint. + // Simpler to use polling here, we don't use the "B"OUTNAKEFF interrupt + // anyway, and it can't be cleared by user code. If this while loop never + // finishes, we have bigger problems than just the stack. + dev->DCTL |= USB_OTG_DCTL_SGONAK; + while((USB_OTG_FS->GINTSTS & USB_OTG_GINTSTS_BOUTNAKEFF_Msk) == 0); - // Ditto here- disable the endpoint. Note that only STALL and not SNAK - // is set here. - out_ep[epnum].DOEPCTL |= (USB_OTG_DOEPCTL_STALL | USB_OTG_DOEPCTL_EPDIS); - while((out_ep[epnum].DOEPINT & USB_OTG_DOEPINT_EPDISD_Msk) == 0); - out_ep[epnum].DOEPINT = USB_OTG_DOEPINT_EPDISD; + // Ditto here- disable the endpoint. Note that only STALL and not SNAK + // is set here. + out_ep[epnum].DOEPCTL |= (USB_OTG_DOEPCTL_STALL | USB_OTG_DOEPCTL_EPDIS); + while((out_ep[epnum].DOEPINT & USB_OTG_DOEPINT_EPDISD_Msk) == 0); + out_ep[epnum].DOEPINT = USB_OTG_DOEPINT_EPDISD; - // Allow other OUT endpoints to keep receiving. - dev->DCTL |= USB_OTG_DCTL_CGONAK; + // Allow other OUT endpoints to keep receiving. + dev->DCTL |= USB_OTG_DCTL_CGONAK; + } } } diff --git a/src/portable/st/stm32f4/hal_stm32f4.c b/src/portable/st/stm32f4/hal_stm32f4.c deleted file mode 100644 index 68d17b59..00000000 --- a/src/portable/st/stm32f4/hal_stm32f4.c +++ /dev/null @@ -1,69 +0,0 @@ -/**************************************************************************/ -/*! - @file hal_nrf5x.c - @author hathach - - @section LICENSE - - Software License Agreement (BSD License) - - Copyright (c) 2018, hathach (tinyusb.org) - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions are met: - 1. Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - 2. Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the - documentation and/or other materials provided with the distribution. - 3. Neither the name of the copyright holders nor the - names of its contributors may be used to endorse or promote products - derived from this software without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS ''AS IS'' AND ANY - EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER BE LIABLE FOR ANY - DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - - This file is part of the tinyusb stack. -*/ -/**************************************************************************/ - -#include "tusb_option.h" - -#if TUSB_OPT_DEVICE_ENABLED && CFG_TUSB_MCU == OPT_MCU_STM32F4 - -#include "stm32f4xx.h" - -#include "tusb_hal.h" - -/*------------------------------------------------------------------*/ -/* TUSB HAL - *------------------------------------------------------------------*/ -bool tusb_hal_init(void) -{ - - tusb_hal_int_enable(0); - return true; -} - -void tusb_hal_int_enable(uint8_t rhport) -{ - (void) rhport; - NVIC_EnableIRQ(OTG_FS_IRQn); -} - -void tusb_hal_int_disable(uint8_t rhport) -{ - (void) rhport; - NVIC_DisableIRQ(OTG_FS_IRQn); -} - -#endif From eda56769b9126460f7721a9b3f04d4e4f6efd60d Mon Sep 17 00:00:00 2001 From: hathach Date: Wed, 13 Mar 2019 23:14:48 +0700 Subject: [PATCH 04/12] dcd_set_address include status response, usbd control stall both control in and out --- README.md | 5 ++-- .../cdc_msc_hid/ses/cdc_msc_hid.emProject | 1 + examples/device/cdc_msc_hid/src/tusb_config.h | 2 +- hw/bsp/mcb1800/board_mcb1800.c | 23 ++++++++++++------- hw/bsp/readme.md | 10 +++++--- src/device/dcd.h | 10 +++++--- src/device/usbd.c | 4 ++-- src/device/usbd_control.c | 4 +++- src/device/usbd_pvt.h | 2 +- src/portable/microchip/samd21/dcd_samd21.c | 9 +++----- src/portable/microchip/samd51/dcd_samd51.c | 9 +++----- src/portable/nordic/nrf5x/dcd_nrf5x.c | 2 +- .../nxp/lpc11_13_15/dcd_lpc11_13_15.c | 16 ++++--------- src/portable/nxp/lpc17_40/dcd_lpc17_40.c | 6 +++-- src/portable/nxp/lpc18_43/dcd_lpc18_43.c | 12 ++++------ src/portable/st/stm32f4/dcd_stm32f4.c | 3 +++ 16 files changed, 63 insertions(+), 55 deletions(-) diff --git a/README.md b/README.md index a165001b..4133173c 100644 --- a/README.md +++ b/README.md @@ -45,9 +45,10 @@ Currently the following OS are supported with tinyusb out of the box with a simp The stack supports the following MCUs + - **Nordic:** nRF52840 - **NXP:** LPC11Uxx, LPC13xx, LPC175x_6x, LPC177x_8x, LPC40xx, LPC43xx - **MicroChip:** SAMD21, SAMD51 (device only) - - **Nordic:** nRF52840 + - **ST* STM32F4 [Here is the list of supported Boards](hw/bsp/readme.md) @@ -64,8 +65,8 @@ The stack is developed with GCC compiler, and should be compilable with others. TinyUSB is currently used by these other projects: * [Adafruit nRF52 Arduino](https://github.com/adafruit/Adafruit_nRF52_Arduino) +* [Adafruit nRF52 Bootloader](https://github.com/adafruit/Adafruit_nRF52_Bootloader) * [CircuitPython](https://github.com/adafruit/circuitpython) -* [nRF52840 UF2 Bootloader](https://github.com/adafruit/Adafruit_nRF52_Bootloader) ## Porting diff --git a/examples/device/cdc_msc_hid/ses/cdc_msc_hid.emProject b/examples/device/cdc_msc_hid/ses/cdc_msc_hid.emProject index 9d0672b8..c02f7a58 100644 --- a/examples/device/cdc_msc_hid/ses/cdc_msc_hid.emProject +++ b/examples/device/cdc_msc_hid/ses/cdc_msc_hid.emProject @@ -9,4 +9,5 @@ + diff --git a/examples/device/cdc_msc_hid/src/tusb_config.h b/examples/device/cdc_msc_hid/src/tusb_config.h index 3f748c3f..bd9e9e06 100644 --- a/examples/device/cdc_msc_hid/src/tusb_config.h +++ b/examples/device/cdc_msc_hid/src/tusb_config.h @@ -97,7 +97,7 @@ // #define CFG_TUD_DESC_PID 0x0001 // LPC 17xx and 40xx endpoint type (bulk/interrupt/iso) are fixed by its number -// Therefor we need to force endpoint number to correct type on lpc17xx +// Therefore we need to force endpoint number to correct type on lpc17xx #if CFG_TUSB_MCU == OPT_MCU_LPC175X_6X || CFG_TUSB_MCU == OPT_MCU_LPC177X_8X || CFG_TUSB_MCU == OPT_MCU_LPC40XX #define CFG_TUD_DESC_CDC_EPNUM_NOTIF 1 #define CFG_TUD_DESC_CDC_EPNUM 2 diff --git a/hw/bsp/mcb1800/board_mcb1800.c b/hw/bsp/mcb1800/board_mcb1800.c index a321ffe6..e76b19a9 100644 --- a/hw/bsp/mcb1800/board_mcb1800.c +++ b/hw/bsp/mcb1800/board_mcb1800.c @@ -88,14 +88,14 @@ static const PINMUX_GRP_T pinclockmuxing[] = // Invoked by startup code void SystemInit(void) { - /* Setup system level pin muxing */ - Chip_SCU_SetPinMuxing(pinmuxing, sizeof(pinmuxing) / sizeof(PINMUX_GRP_T)); + /* Setup system level pin muxing */ + Chip_SCU_SetPinMuxing(pinmuxing, sizeof(pinmuxing) / sizeof(PINMUX_GRP_T)); - /* Clock pins only, group field not used */ - for (int i = 0; i < (sizeof(pinclockmuxing) / sizeof(pinclockmuxing[0])); i++) - { - Chip_SCU_ClockPinMuxSet(pinclockmuxing[i].pinnum, pinclockmuxing[i].modefunc); - } + /* Clock pins only, group field not used */ + for (uint32_t i = 0; i < (sizeof(pinclockmuxing) / sizeof(pinclockmuxing[0])); i++) + { + Chip_SCU_ClockPinMuxSet(pinclockmuxing[i].pinnum, pinclockmuxing[i].modefunc); + } Chip_SetupXtalClocking(); } @@ -115,7 +115,7 @@ void board_init(void) const uint8_t ledports[] = {6, 6, 6, 6, 6, 4, 4, 4}; const uint8_t ledbits[] = {24, 25, 26, 27, 28, 12, 13, 14}; - for (int i = 0; i < (sizeof(ledports) / sizeof(ledports[0])); i++) + for (uint32_t i = 0; i < (sizeof(ledports) / sizeof(ledports[0])); i++) { Chip_GPIO_SetPinDIROutput(LPC_GPIO_PORT, ledports[i], ledbits[i]); Chip_GPIO_SetPinState(LPC_GPIO_PORT, LED_PORT, LED_PIN, false); @@ -197,10 +197,14 @@ void board_led_control(bool state) } //------------- Buttons -------------// +/* static bool button_read(uint8_t id) { + (void) id; // return !TU_BIT_TEST( GPIO_ReadValue(buttons[id].gpio_port), buttons[id].gpio_pin ); // button is active low + return false; } +*/ uint32_t board_buttons(void) { @@ -216,9 +220,12 @@ uint32_t board_buttons(void) uint8_t board_uart_getchar(void) { //return UART_ReceiveByte(BOARD_UART_PORT); + return 0; } + void board_uart_putchar(uint8_t c) { + (void) c; //UART_Send(BOARD_UART_PORT, &c, 1, BLOCKING); } diff --git a/hw/bsp/readme.md b/hw/bsp/readme.md index b4105046..03cd9e08 100644 --- a/hw/bsp/readme.md +++ b/hw/bsp/readme.md @@ -4,7 +4,11 @@ This code base already had supported for a handful of following boards -### NXP MCU ### +### Nordic nRF5x ### + +- [nRF52840-DK (aka pca10056)](https://www.nordicsemi.com/Software-and-Tools/Development-Kits/nRF52840-DK) + +### NXP LPC ### - [LPCXpresso 11U68](https://www.nxp.com/support/developer-resources/evaluation-and-development-boards/lpcxpresso-boards/lpcxpresso-board-for-lpc11u68:OM13058) - [LPCXpresso 1347](https://www.nxp.com/support/developer-resources/evaluation-and-development-boards/lpcxpresso-boards/lpcxpresso-board-for-lpc1347:OM13045) @@ -18,9 +22,9 @@ This code base already had supported for a handful of following boards - [Adafruit Metro M0 Express](https://www.adafruit.com/product/3505) - [Adafruit Metro M4 Express](https://www.adafruit.com/product/3382) -### Nordic nRF52840 ### +### ST STM32 ### -- [nRF52840-DK (aka pca10056)](https://www.nordicsemi.com/eng/Products/nRF52840-DK) +- [STM32F4DISCOVERY](https://www.st.com/en/evaluation-tools/stm32f4discovery.html) ## Add your own board ## diff --git a/src/device/dcd.h b/src/device/dcd.h index abd85a70..46c11ff1 100644 --- a/src/device/dcd.h +++ b/src/device/dcd.h @@ -94,10 +94,16 @@ TU_VERIFY_STATIC(sizeof(dcd_event_t) <= 12, "size is not correct"); *------------------------------------------------------------------*/ bool dcd_init (uint8_t rhport); +// Enable device interrupt void dcd_int_enable (uint8_t rhport); + +// Disable device interrupt void dcd_int_disable(uint8_t rhport); +// Receive Set Address request, mcu port must also include status IN response void dcd_set_address(uint8_t rhport, uint8_t dev_addr); + +// Receive Set Config request void dcd_set_config (uint8_t rhport, uint8_t config_num); // Get current frame number @@ -118,15 +124,13 @@ void dcd_event_setup_received(uint8_t rhport, uint8_t const * setup, bool in_isr // helper to send transfer complete event void dcd_event_xfer_complete (uint8_t rhport, uint8_t ep_addr, uint32_t xferred_bytes, uint8_t result, bool in_isr); - /*------------------------------------------------------------------*/ /* Endpoint API * - open : Configure endpoint's registers * - xfer : Submit a transfer. When complete dcd_event_xfer_complete * must be called to notify the stack * - busy : Check if endpoint transferring is complete (TODO remove) - * - stall : stall ep. When control endpoint (addr = 0) is stalled, - * both direction (IN & OUT) of control ep must be stalled. + * - stall : stall endpoint * - clear_stall : clear stall * - stalled : check if stalled ( TODO remove ) *------------------------------------------------------------------*/ diff --git a/src/device/usbd.c b/src/device/usbd.c index 5baea846..d07c78c1 100644 --- a/src/device/usbd.c +++ b/src/device/usbd.c @@ -336,8 +336,8 @@ static bool process_control_request(uint8_t rhport, tusb_control_request_t const switch ( p_request->bRequest ) { case TUSB_REQ_SET_ADDRESS: - // response with status first before changing device address - usbd_control_status(rhport, p_request); + // DCD must include zero-length status response since depending on mcu, + // status could be sent either before or after changing device address dcd_set_address(rhport, (uint8_t) p_request->wValue); return true; // skip the rest break; diff --git a/src/device/usbd_control.c b/src/device/usbd_control.c index ae7e894b..f06c44f0 100644 --- a/src/device/usbd_control.c +++ b/src/device/usbd_control.c @@ -74,7 +74,9 @@ void usbd_control_reset (uint8_t rhport) void usbd_control_stall(uint8_t rhport) { - dcd_edpt_stall(rhport, 0); + // when stalling control endpoint both IN and OUt will be stalled + dcd_edpt_stall(rhport, EDPT_CTRL_OUT); + dcd_edpt_stall(rhport, EDPT_CTRL_IN); } bool usbd_control_status(uint8_t rhport, tusb_control_request_t const * request) diff --git a/src/device/usbd_pvt.h b/src/device/usbd_pvt.h index 06951673..14f880e7 100644 --- a/src/device/usbd_pvt.h +++ b/src/device/usbd_pvt.h @@ -61,7 +61,7 @@ bool usbd_control_xfer(uint8_t rhport, tusb_control_request_t const * request, v // Send STATUS (zero length) packet bool usbd_control_status(uint8_t rhport, tusb_control_request_t const * request); -// Stall control endpoint until new setup packet arrived +// Stall control endpoint (both IN and OUT) until new setup packet arrived void usbd_control_stall(uint8_t rhport); /*------------------------------------------------------------------*/ diff --git a/src/portable/microchip/samd21/dcd_samd21.c b/src/portable/microchip/samd21/dcd_samd21.c index 6140812b..130825f7 100644 --- a/src/portable/microchip/samd21/dcd_samd21.c +++ b/src/portable/microchip/samd21/dcd_samd21.c @@ -110,10 +110,12 @@ void dcd_int_disable(uint8_t rhport) void dcd_set_address (uint8_t rhport, uint8_t dev_addr) { - (void) rhport; + // Response with status first before changing device address + dcd_edpt_xfer(rhport, tu_edpt_addr(0, TUSB_DIR_IN), NULL, 0); // Wait for EP0 to finish before switching the address. while (USB->DEVICE.DeviceEndpoint[0].EPSTATUS.bit.BK1RDY == 1) {} + USB->DEVICE.DADD.reg = USB_DEVICE_DADD_DADD(dev_addr) | USB_DEVICE_DADD_ADDEN; } @@ -230,11 +232,6 @@ void dcd_edpt_stall (uint8_t rhport, uint8_t ep_addr) ep->EPSTATUSSET.reg = USB_DEVICE_EPSTATUSSET_STALLRQ1; } else { ep->EPSTATUSSET.reg = USB_DEVICE_EPSTATUSSET_STALLRQ0; - - // for control, stall both IN & OUT - if (ep_addr == 0) { - ep->EPSTATUSSET.reg = USB_DEVICE_EPSTATUSSET_STALLRQ1; - } } } diff --git a/src/portable/microchip/samd51/dcd_samd51.c b/src/portable/microchip/samd51/dcd_samd51.c index 1de3fadb..27c5c4db 100644 --- a/src/portable/microchip/samd51/dcd_samd51.c +++ b/src/portable/microchip/samd51/dcd_samd51.c @@ -115,10 +115,12 @@ void dcd_int_disable(uint8_t rhport) void dcd_set_address (uint8_t rhport, uint8_t dev_addr) { - (void) rhport; + // Response with status first before changing device address + dcd_edpt_xfer(rhport, tu_edpt_addr(0, TUSB_DIR_IN), NULL, 0); // Wait for EP0 to finish before switching the address. while (USB->DEVICE.DeviceEndpoint[0].EPSTATUS.bit.BK1RDY == 1) {} + USB->DEVICE.DADD.reg = USB_DEVICE_DADD_DADD(dev_addr) | USB_DEVICE_DADD_ADDEN; } @@ -234,11 +236,6 @@ void dcd_edpt_stall (uint8_t rhport, uint8_t ep_addr) ep->EPSTATUSSET.reg = USB_DEVICE_EPSTATUSSET_STALLRQ1; } else { ep->EPSTATUSSET.reg = USB_DEVICE_EPSTATUSSET_STALLRQ0; - - // for control, stall both IN & OUT - if (ep_addr == 0) { - ep->EPSTATUSSET.reg = USB_DEVICE_EPSTATUSSET_STALLRQ1; - } } } diff --git a/src/portable/nordic/nrf5x/dcd_nrf5x.c b/src/portable/nordic/nrf5x/dcd_nrf5x.c index 49984eae..1280fe7c 100644 --- a/src/portable/nordic/nrf5x/dcd_nrf5x.c +++ b/src/portable/nordic/nrf5x/dcd_nrf5x.c @@ -211,7 +211,7 @@ void dcd_set_address (uint8_t rhport, uint8_t dev_addr) { (void) rhport; (void) dev_addr; - // Set Address is automatically update by hw controller + // Set Address is automatically update by hw controller, nothing to do } void dcd_set_config (uint8_t rhport, uint8_t config_num) diff --git a/src/portable/nxp/lpc11_13_15/dcd_lpc11_13_15.c b/src/portable/nxp/lpc11_13_15/dcd_lpc11_13_15.c index a9ba5e33..36dcf88f 100644 --- a/src/portable/nxp/lpc11_13_15/dcd_lpc11_13_15.c +++ b/src/portable/nxp/lpc11_13_15/dcd_lpc11_13_15.c @@ -159,7 +159,8 @@ void dcd_set_config(uint8_t rhport, uint8_t config_num) void dcd_set_address(uint8_t rhport, uint8_t dev_addr) { - (void) rhport; + // Response with status first before changing device address + dcd_edpt_xfer(rhport, tu_edpt_addr(0, TUSB_DIR_IN), NULL, 0); LPC_USB->DEVCMDSTAT &= ~CMDSTAT_DEVICE_ADDR_MASK; LPC_USB->DEVCMDSTAT |= dev_addr; @@ -196,16 +197,9 @@ void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr) { (void) rhport; - if ( tu_edpt_number(ep_addr) == 0 ) - { - // TODO cannot able to STALL Control OUT endpoint !!!!! FIXME try some walk-around - _dcd.ep[0][0].stall = _dcd.ep[1][0].stall = 1; - } - else - { - uint8_t const ep_id = ep_addr2id(ep_addr); - _dcd.ep[ep_id][0].stall = 1; - } + // TODO cannot able to STALL Control OUT endpoint !!!!! FIXME try some walk-around + uint8_t const ep_id = ep_addr2id(ep_addr); + _dcd.ep[ep_id][0].stall = 1; } bool dcd_edpt_stalled(uint8_t rhport, uint8_t ep_addr) diff --git a/src/portable/nxp/lpc17_40/dcd_lpc17_40.c b/src/portable/nxp/lpc17_40/dcd_lpc17_40.c index e3286b1c..e0ccbf96 100644 --- a/src/portable/nxp/lpc17_40/dcd_lpc17_40.c +++ b/src/portable/nxp/lpc17_40/dcd_lpc17_40.c @@ -199,7 +199,7 @@ bool dcd_init(uint8_t rhport) NVIC_ClearPendingIRQ(USB_IRQn); NVIC_EnableIRQ(USB_IRQn); - return TUSB_ERROR_NONE; + return true; } void dcd_int_enable(uint8_t rhport) @@ -216,7 +216,9 @@ void dcd_int_disable(uint8_t rhport) void dcd_set_address(uint8_t rhport, uint8_t dev_addr) { - (void) rhport; + // Response with status first before changing device address + dcd_edpt_xfer(rhport, tu_edpt_addr(0, TUSB_DIR_IN), NULL, 0); + sie_write(SIE_CMDCODE_SET_ADDRESS, 1, 0x80 | dev_addr); // 7th bit is : device_enable } diff --git a/src/portable/nxp/lpc18_43/dcd_lpc18_43.c b/src/portable/nxp/lpc18_43/dcd_lpc18_43.c index 65b0728e..7731b3f0 100644 --- a/src/portable/nxp/lpc18_43/dcd_lpc18_43.c +++ b/src/portable/nxp/lpc18_43/dcd_lpc18_43.c @@ -164,6 +164,9 @@ void dcd_int_disable(uint8_t rhport) void dcd_set_address(uint8_t rhport, uint8_t dev_addr) { + // Response with status first before changing device address + dcd_edpt_xfer(rhport, tu_edpt_addr(0, TUSB_DIR_IN), NULL, 0); + LPC_USB[rhport]->DEVICEADDR = (dev_addr << 25) | TU_BIT(24); } @@ -214,14 +217,7 @@ void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr) uint8_t const epnum = tu_edpt_number(ep_addr); uint8_t const dir = tu_edpt_dir(ep_addr); - if ( epnum == 0) - { - // Stall both Control IN and OUT - LPC_USB[rhport]->ENDPTCTRL[epnum] |= ( (ENDPTCTRL_MASK_STALL << 16) || (ENDPTCTRL_MASK_STALL << 0) ); - }else - { - LPC_USB[rhport]->ENDPTCTRL[epnum] |= ENDPTCTRL_MASK_STALL << (dir ? 16 : 0); - } + LPC_USB[rhport]->ENDPTCTRL[epnum] |= ENDPTCTRL_MASK_STALL << (dir ? 16 : 0); } bool dcd_edpt_stalled (uint8_t rhport, uint8_t ep_addr) diff --git a/src/portable/st/stm32f4/dcd_stm32f4.c b/src/portable/st/stm32f4/dcd_stm32f4.c index e3b7b2db..dace9ed3 100644 --- a/src/portable/st/stm32f4/dcd_stm32f4.c +++ b/src/portable/st/stm32f4/dcd_stm32f4.c @@ -182,6 +182,9 @@ void dcd_set_address (uint8_t rhport, uint8_t dev_addr) USB_OTG_DeviceTypeDef * dev = DEVICE_BASE; dev->DCFG |= (dev_addr << USB_OTG_DCFG_DAD_Pos) & USB_OTG_DCFG_DAD_Msk; + + // Response with status after changing device address + dcd_edpt_xfer(rhport, tu_edpt_addr(0, TUSB_DIR_IN), NULL, 0); } void dcd_set_config (uint8_t rhport, uint8_t config_num) From 5e92d670153eb7e4afdf4102875d4443c609ff42 Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 15 Mar 2019 18:43:09 +0700 Subject: [PATCH 05/12] stm32 update TX Fifo for edpt IN, both CDC + MSC work great - call dcd_event_xfer_complete() when enough bytes received - add dcd_get_frame_number() --- src/common/tusb_common.h | 12 ++--- src/portable/st/stm32f4/dcd_stm32f4.c | 67 +++++++++++++++++++++++---- 2 files changed, 65 insertions(+), 14 deletions(-) diff --git a/src/common/tusb_common.h b/src/common/tusb_common.h index 22eddd91..fcdafb09 100644 --- a/src/common/tusb_common.h +++ b/src/common/tusb_common.h @@ -171,14 +171,14 @@ static inline uint16_t tu_u16_le2be(uint16_t u16) } // Min -static inline uint8_t tu_min8(uint8_t x, uint8_t y) { return (x < y) ? x : y; } -static inline uint16_t tu_min16(uint16_t x, uint16_t y) { return (x < y) ? x : y; } -static inline uint32_t tu_min32(uint32_t x, uint32_t y) { return (x < y) ? x : y; } +static inline uint8_t tu_min8 (uint8_t x, uint8_t y ) { return (x < y) ? x : y; } +static inline uint16_t tu_min16 (uint16_t x, uint16_t y) { return (x < y) ? x : y; } +static inline uint32_t tu_min32 (uint32_t x, uint32_t y) { return (x < y) ? x : y; } // Max -static inline uint8_t tu_max8(uint8_t x, uint8_t y) { return (x > y) ? x : y; } -static inline uint16_t tu_max16(uint16_t x, uint16_t y) { return (x > y) ? x : y; } -static inline uint32_t tu_max32(uint32_t x, uint32_t y) { return (x > y) ? x : y; } +static inline uint8_t tu_max8 (uint8_t x, uint8_t y ) { return (x > y) ? x : y; } +static inline uint16_t tu_max16 (uint16_t x, uint16_t y) { return (x > y) ? x : y; } +static inline uint32_t tu_max32 (uint32_t x, uint32_t y) { return (x > y) ? x : y; } // Align static inline uint32_t tu_align32 (uint32_t value) { return (value & 0xFFFFFFE0UL); } diff --git a/src/portable/st/stm32f4/dcd_stm32f4.c b/src/portable/st/stm32f4/dcd_stm32f4.c index dace9ed3..086f33f1 100644 --- a/src/portable/st/stm32f4/dcd_stm32f4.c +++ b/src/portable/st/stm32f4/dcd_stm32f4.c @@ -50,7 +50,7 @@ #define DEVICE_BASE (USB_OTG_DeviceTypeDef *) (USB_OTG_FS_PERIPH_BASE + USB_OTG_DEVICE_BASE) #define OUT_EP_BASE (USB_OTG_OUTEndpointTypeDef *) (USB_OTG_FS_PERIPH_BASE + USB_OTG_OUT_ENDPOINT_BASE) #define IN_EP_BASE (USB_OTG_INEndpointTypeDef *) (USB_OTG_FS_PERIPH_BASE + USB_OTG_IN_ENDPOINT_BASE) -#define FIFO_BASE(_x) (uint32_t *) (USB_OTG_FS_PERIPH_BASE + USB_OTG_FIFO_BASE + _x * USB_OTG_FIFO_SIZE) +#define FIFO_BASE(_x) (uint32_t *) (USB_OTG_FS_PERIPH_BASE + USB_OTG_FIFO_BASE + (_x) * USB_OTG_FIFO_SIZE) static ATTR_ALIGNED(4) uint32_t _setup_packet[6]; static uint8_t _setup_offs; // We store up to 3 setup packets. @@ -80,20 +80,39 @@ static void bus_reset(void) { dev->DOEPMSK |= USB_OTG_DOEPMSK_STUPM | USB_OTG_DOEPMSK_XFRCM; dev->DIEPMSK |= USB_OTG_DIEPMSK_TOM | USB_OTG_DIEPMSK_XFRCM; + // Peripheral FIFO architecture (Rev18 RM 29.11) + // + // --------------- 312.5 ( 1250 bytes ) + // | IN FIFO 3 | + // --------------- y + x + 16 + GRXFSIZ + // | IN FIFO 2 | + // --------------- x + 16 + GRXFSIZ + // | IN FIFO 1 | + // --------------- 16 + GRXFSIZ + // | IN FIFO 0 | + // --------------- GRXFSIZ + // | OUT FIFO | + // | ( Shared ) | + // --------------- 0 + // // FIFO sizes are set up by the following rules (each word 32-bits): - // OUT FIFO uses (based on page 1354 of Rev 17 of reference manual): + // All EP OUT shared a unique OUT FIFO which uses (based on page 1354 of Rev 17 of reference manual): // * 10 locations in hardware for setup packets + setup control words // (up to 3 setup packets). // * 2 locations for OUT endpoint control words. - // * 64 bytes for maximum control packet size. + // * 16 + 1 (data + info) for largest packet size of 64 bytes. // * 1 location for global NAK (not required/used here). - // IN FIFO uses 64 bytes for maximum control packet size. // // However, for OUT FIFO, 10 + 2 + 16 = 28 doesn't seem to work (TODO: why?). // Minimum that works in practice is 35, so allocate 40 32-bit locations // as a buffer. - USB_OTG_FS->GRXFSIZ = 40; - USB_OTG_FS->DIEPTXF0_HNPTXFSIZ |= (16 << USB_OTG_TX0FD_Pos); // 16 32-bit words = 64 bytes + // + // It is recommended to allocate 2 times the largest packet size, therefore + // Recommended value = 10 + 1 + 2 x (16+1) = 45 --> Let's make it 50 + USB_OTG_FS->GRXFSIZ = 50; + + // Control IN uses FIFO 0 with 64 bytes ( 16 32-bit word ) + USB_OTG_FS->DIEPTXF0_HNPTXFSIZ = (16 << USB_OTG_TX0FD_Pos) | (USB_OTG_FS->GRXFSIZ & 0x0000ffffUL); out_ep[0].DOEPTSIZ |= (1 << USB_OTG_DOEPTSIZ_STUPCNT_Pos); @@ -194,6 +213,15 @@ void dcd_set_config (uint8_t rhport, uint8_t config_num) // Nothing to do } +uint32_t dcd_get_frame_number(uint8_t rhport) +{ + (void) rhport; + + USB_OTG_DeviceTypeDef * dev = DEVICE_BASE; + + return (dev->DSTS & USB_OTG_DSTS_FNSOF_Msk) >> USB_OTG_DSTS_FNSOF_Pos; +} + /*------------------------------------------------------------------*/ /* DCD Endpoint port *------------------------------------------------------------------*/ @@ -222,13 +250,34 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * desc_edpt) desc_edpt->wMaxPacketSize.size << USB_OTG_DOEPCTL_MPSIZ_Pos; dev->DAINTMSK |= (1 << (USB_OTG_DAINTMSK_OEPM_Pos + epnum)); } else { + // Peripheral FIFO architecture (Rev18 RM 29.11) + // + // --------------- 312.5 ( 1250 bytes ) + // | IN FIFO 3 | + // --------------- y + x + 16 + GRXFSIZ + // | IN FIFO 2 | + // --------------- x + 16 + GRXFSIZ + // | IN FIFO 1 | + // --------------- 16 + GRXFSIZ + // | IN FIFO 0 | + // --------------- GRXFSIZ + // | OUT FIFO | + // | ( Shared ) | + // --------------- 0 + // + // Since OUT FIFO = 50, FIFO0 = 16, average of FIFOx = (312-50-16) / 3 = 82 ~ 80 + in_ep[epnum].DIEPCTL |= (1 << USB_OTG_DIEPCTL_USBAEP_Pos) | \ (epnum - 1) << USB_OTG_DIEPCTL_TXFNUM_Pos | \ desc_edpt->bmAttributes.xfer << USB_OTG_DIEPCTL_EPTYP_Pos | \ + (desc_edpt->bmAttributes.xfer != TUSB_XFER_ISOCHRONOUS ? USB_OTG_DOEPCTL_SD0PID_SEVNFRM : 0) | \ desc_edpt->wMaxPacketSize.size << USB_OTG_DIEPCTL_MPSIZ_Pos; dev->DAINTMSK |= (1 << (USB_OTG_DAINTMSK_IEPM_Pos + epnum)); - USB_OTG_FS->DIEPTXF[epnum - 1] = (40 << USB_OTG_DIEPTXF_INEPTXFD_Pos) | (epnum * 0x100); + // Both TXFD and TXSA are in unit of 32-bit words + uint16_t const fifo_size = 80; + uint32_t const fifo_offset = (USB_OTG_FS->GRXFSIZ & 0x0000ffff) + 16 + fifo_size*(epnum-1); + USB_OTG_FS->DIEPTXF[epnum - 1] = (80 << USB_OTG_DIEPTXF_INEPTXFD_Pos) | fifo_offset; } return true; @@ -587,7 +636,9 @@ static void handle_epout_ints(USB_OTG_DeviceTypeDef * dev, USB_OTG_OUTEndpointTy // on a packet-basis. The core can internally handle multiple OUT // packets; it would be more efficient to only trigger XFRC on a // completed transfer for non-0 endpoints. - if(xfer->short_packet) { + + // Transfer complete if short packet or total len is transferred + if(xfer->short_packet || (xfer->queued_len == xfer->total_len)) { xfer->short_packet = false; dcd_event_xfer_complete(0, n, xfer->queued_len, XFER_RESULT_SUCCESS, true); } else { From e49efde730d215a64ae4469a2cc1b4f36baa3544 Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 15 Mar 2019 18:48:14 +0700 Subject: [PATCH 06/12] update ses project file --- .../cdc_msc_hid/ses/stm32f4/stm32f4.emProject | 16 +++++----------- 1 file changed, 5 insertions(+), 11 deletions(-) diff --git a/examples/device/cdc_msc_hid/ses/stm32f4/stm32f4.emProject b/examples/device/cdc_msc_hid/ses/stm32f4/stm32f4.emProject index 3eb2632c..71119a87 100644 --- a/examples/device/cdc_msc_hid/ses/stm32f4/stm32f4.emProject +++ b/examples/device/cdc_msc_hid/ses/stm32f4/stm32f4.emProject @@ -19,7 +19,7 @@ arm_target_device_name="STM32F407VG" arm_target_interface_type="SWD" c_preprocessor_definitions="STM32F407xx;__STM32F4xx_FAMILY;__STM32F407_SUBFAMILY;ARM_MATH_CM4;FLASH_PLACEMENT=1;CFG_TUSB_MCU=OPT_MCU_STM32F4;HSE_VALUE=8000000;BOARD_STM32F407G_DISC1" - c_user_include_directories="../../src;$(rootDir)/src;$(rootDir)/hw;$(ProjectDir)/STM32F4xx/CMSIS/Device/Include;$(rootDir)/hw/mcu/st/cmsis" + c_user_include_directories="../../src;$(rootDir)/src;$(rootDir)/hw;$(rootDir)/hw/mcu/st/cmsis;$(rootDir)/hw/mcu/st/stm32lib/CMSIS/STM32F4xx/Include" debug_register_definition_file="$(ProjectDir)/STM32F40x_Registers.xml" debug_target_connection="J-Link" gcc_entry_point="Reset_Handler" @@ -31,15 +31,6 @@ project_type="Executable" target_reset_script="Reset();" target_trace_initialize_script="EnableTrace("$(TraceInterfaceType)")" /> - - - - - - @@ -78,7 +69,10 @@ - + + + + From d56e7fd9131a5c1a1c2035f846f0afeaf844412d Mon Sep 17 00:00:00 2001 From: hathach Date: Sat, 16 Mar 2019 01:34:26 +0700 Subject: [PATCH 07/12] adding flash (jlink) --- examples/device/cdc_msc_hid/Makefile | 18 ++++++++++++++++++ hw/bsp/stm32f407g_disc1/board.mk | 5 ++--- 2 files changed, 20 insertions(+), 3 deletions(-) diff --git a/examples/device/cdc_msc_hid/Makefile b/examples/device/cdc_msc_hid/Makefile index a8430b4a..21dd059c 100644 --- a/examples/device/cdc_msc_hid/Makefile +++ b/examples/device/cdc_msc_hid/Makefile @@ -111,6 +111,10 @@ $(BUILD)/$(BOARD)-firmware.elf: $(OBJ) $(BUILD)/$(BOARD)-firmware.bin: $(BUILD)/$(BOARD)-firmware.elf @echo CREATE $@ @$(OBJCOPY) -O binary -j .vectors -j .text -j .data $^ $@ + +$(BUILD)/$(BOARD)-firmware.hex: $(BUILD)/$(BOARD)-firmware.elf + @echo CREATE $@ + @$(OBJCOPY) -O ihex $^ $@ # We set vpath to point to the top of the tree so that the source files # can be located. By following this scheme, it allows a single build rule @@ -139,6 +143,20 @@ $(BUILD)/obj/%.o: %.S @echo AS $(notdir $@) @$(CC) -x assembler-with-cpp $(ASFLAGS) -c -o $@ $< +# Flash binary using Jlink +ifeq ($(OS),Windows_NT) + JLINKEXE = JLink.exe +else + JLINKEXE = JLinkExe +endif + +flash: $(BUILD)/$(BOARD)-firmware.hex + @echo halt > $(BUILD)/$(BOARD).jlink + @echo loadfile $^ >> $(BUILD)/$(BOARD).jlink + @echo go >> $(BUILD)/$(BOARD).jlink + @echo exit >> $(BUILD)/$(BOARD).jlink + #$(JLINKEXE) -device stm32f407vg -if swd -speed auto -CommandFile $(BUILD)/$(BOARD).jlink + size: $(BUILD)/$(BOARD)-firmware.elf -@echo '' @$(SIZE) $< diff --git a/hw/bsp/stm32f407g_disc1/board.mk b/hw/bsp/stm32f407g_disc1/board.mk index cbd6005d..d7fdd9e1 100644 --- a/hw/bsp/stm32f407g_disc1/board.mk +++ b/hw/bsp/stm32f407g_disc1/board.mk @@ -41,7 +41,6 @@ else endif endif -# flash target using on-board stlink or jlink -flash: $(BUILD)/$(BOARD)-firmware.elf +# flash target using on-board stlink +flash-stlink: $(BUILD)/$(BOARD)-firmware.elf $(STM32Prog) --connect port=swd --write $< --go - #JLinkExe \ No newline at end of file From e39b4199b00777c84badf67c70b7251b3cfe481a Mon Sep 17 00:00:00 2001 From: hathach Date: Sat, 16 Mar 2019 02:25:56 +0700 Subject: [PATCH 08/12] add stm32f4 board to travis build --- .travis.yml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/.travis.yml b/.travis.yml index 1d804dd8..6a9fb454 100644 --- a/.travis.yml +++ b/.travis.yml @@ -19,3 +19,5 @@ before_script: script: - make -j2 -C examples/device/cdc_msc_hid BOARD=metro_m0_express - make -j2 -C examples/device/cdc_msc_hid BOARD=metro_m4_express + - make -j2 -C examples/device/cdc_msc_hid BOARD=stm32f407g_disc1 + From f932cf38547be27de8978e69385bbdf555d2f109 Mon Sep 17 00:00:00 2001 From: hathach Date: Sun, 17 Mar 2019 15:07:49 +0700 Subject: [PATCH 09/12] stm32 update fifo in comment --- src/portable/st/stm32f4/dcd_stm32f4.c | 14 +++++--------- 1 file changed, 5 insertions(+), 9 deletions(-) diff --git a/src/portable/st/stm32f4/dcd_stm32f4.c b/src/portable/st/stm32f4/dcd_stm32f4.c index 086f33f1..c197eaea 100644 --- a/src/portable/st/stm32f4/dcd_stm32f4.c +++ b/src/portable/st/stm32f4/dcd_stm32f4.c @@ -82,7 +82,7 @@ static void bus_reset(void) { // Peripheral FIFO architecture (Rev18 RM 29.11) // - // --------------- 312.5 ( 1250 bytes ) + // --------------- 320 ( 1280 bytes ) // | IN FIFO 3 | // --------------- y + x + 16 + GRXFSIZ // | IN FIFO 2 | @@ -100,15 +100,11 @@ static void bus_reset(void) { // * 10 locations in hardware for setup packets + setup control words // (up to 3 setup packets). // * 2 locations for OUT endpoint control words. - // * 16 + 1 (data + info) for largest packet size of 64 bytes. + // * 16 for largest packet size of 64 bytes. ( TODO Highspeed is 512 bytes) // * 1 location for global NAK (not required/used here). // - // However, for OUT FIFO, 10 + 2 + 16 = 28 doesn't seem to work (TODO: why?). - // Minimum that works in practice is 35, so allocate 40 32-bit locations - // as a buffer. - // // It is recommended to allocate 2 times the largest packet size, therefore - // Recommended value = 10 + 1 + 2 x (16+1) = 45 --> Let's make it 50 + // Recommended value = 10 + 1 + 2 x (16+2) = 47 --> Let's make it 50 USB_OTG_FS->GRXFSIZ = 50; // Control IN uses FIFO 0 with 64 bytes ( 16 32-bit word ) @@ -252,7 +248,7 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * desc_edpt) } else { // Peripheral FIFO architecture (Rev18 RM 29.11) // - // --------------- 312.5 ( 1250 bytes ) + // --------------- 320 ( 1280 bytes ) // | IN FIFO 3 | // --------------- y + x + 16 + GRXFSIZ // | IN FIFO 2 | @@ -265,7 +261,7 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * desc_edpt) // | ( Shared ) | // --------------- 0 // - // Since OUT FIFO = 50, FIFO0 = 16, average of FIFOx = (312-50-16) / 3 = 82 ~ 80 + // Since OUT FIFO = 50, FIFO 0 = 16, average of FIFOx = (312-50-16) / 3 = 82 ~ 80 in_ep[epnum].DIEPCTL |= (1 << USB_OTG_DIEPCTL_USBAEP_Pos) | \ (epnum - 1) << USB_OTG_DIEPCTL_TXFNUM_Pos | \ From 11eed2f0260c8f71ae14c01403f49bcf2bcf47bd Mon Sep 17 00:00:00 2001 From: hathach Date: Sun, 17 Mar 2019 15:42:57 +0700 Subject: [PATCH 10/12] update flash-jlink target for m0 and m4 board --- examples/device/cdc_msc_hid/Makefile | 14 ++++++++++---- hw/bsp/metro_m0_express/board.mk | 5 +++++ hw/bsp/metro_m4_express/board.mk | 5 +++++ hw/bsp/stm32f407g_disc1/board.mk | 4 +++- 4 files changed, 23 insertions(+), 5 deletions(-) diff --git a/examples/device/cdc_msc_hid/Makefile b/examples/device/cdc_msc_hid/Makefile index 21dd059c..84f31388 100644 --- a/examples/device/cdc_msc_hid/Makefile +++ b/examples/device/cdc_msc_hid/Makefile @@ -21,7 +21,6 @@ include $(TOP)/hw/bsp/$(BOARD)/board.mk CC = $(CROSS_COMPILE)gcc CXX = $(CROSS_COMPILE)g++ -LD = $(CROSS_COMPILE)ld OBJCOPY = $(CROSS_COMPILE)objcopy SIZE = $(CROSS_COMPILE)size MKDIR = mkdir @@ -106,7 +105,7 @@ $(OBJ_DIRS): $(BUILD)/$(BOARD)-firmware.elf: $(OBJ) @echo LINK $@ - @$(CC) -o $@ $(LDFLAGS) $^ -Wl,--start-group $(LIBS) -Wl,--end-group + $(CC) -o $@ $(LDFLAGS) $^ -Wl,--start-group $(LIBS) -Wl,--end-group $(BUILD)/$(BOARD)-firmware.bin: $(BUILD)/$(BOARD)-firmware.elf @echo CREATE $@ @@ -136,6 +135,7 @@ vpath %.s . $(TOP) $(BUILD)/obj/%.o: %.s @echo AS $(notdir $@) $(AS) -o $@ $< + #$(CC) -x assembler-with-cpp $(ASFLAGS) -c -o $@ $< # ASM sources upper case .S vpath %.S . $(TOP) @@ -150,12 +150,18 @@ else JLINKEXE = JLinkExe endif -flash: $(BUILD)/$(BOARD)-firmware.hex +# default jlink interface is swd +ifeq ($(JLINK_IF),) + JLINK_IF = swd +endif + +flash-jlink: $(BUILD)/$(BOARD)-firmware.hex @echo halt > $(BUILD)/$(BOARD).jlink @echo loadfile $^ >> $(BUILD)/$(BOARD).jlink + @echo r >> $(BUILD)/$(BOARD).jlink @echo go >> $(BUILD)/$(BOARD).jlink @echo exit >> $(BUILD)/$(BOARD).jlink - #$(JLINKEXE) -device stm32f407vg -if swd -speed auto -CommandFile $(BUILD)/$(BOARD).jlink + $(JLINKEXE) -device $(JLINK_DEVICE) -if $(JLINK_IF) -speed auto -CommandFile $(BUILD)/$(BOARD).jlink size: $(BUILD)/$(BOARD)-firmware.elf -@echo '' diff --git a/hw/bsp/metro_m0_express/board.mk b/hw/bsp/metro_m0_express/board.mk index f1dfa4cd..559d50ad 100644 --- a/hw/bsp/metro_m0_express/board.mk +++ b/hw/bsp/metro_m0_express/board.mk @@ -33,3 +33,8 @@ INC += \ VENDOR = microchip CHIP_FAMILY = samd21 + +JLINK_DEVICE = ATSAMD21G18 + +# flash using jlink +flash: flash-jlink diff --git a/hw/bsp/metro_m4_express/board.mk b/hw/bsp/metro_m4_express/board.mk index b5127221..b0938c7b 100644 --- a/hw/bsp/metro_m4_express/board.mk +++ b/hw/bsp/metro_m4_express/board.mk @@ -32,3 +32,8 @@ INC += \ VENDOR = microchip CHIP_FAMILY = samd51 + +JLINK_DEVICE = ATSAMD51J19 + +# flash using jlink +flash: flash-jlink diff --git a/hw/bsp/stm32f407g_disc1/board.mk b/hw/bsp/stm32f407g_disc1/board.mk index d7fdd9e1..ddf280c6 100644 --- a/hw/bsp/stm32f407g_disc1/board.mk +++ b/hw/bsp/stm32f407g_disc1/board.mk @@ -26,6 +26,8 @@ INC += \ VENDOR = st CHIP_FAMILY = stm32f4 +JLINK_DEVICE = stm32f407vg + # Path to STM32 Cube Programmer CLI ifeq ($(OS),Windows_NT) STM32Prog = C:/Program Files/STMicroelectronics/STM32Cube/STM32CubeProgrammer/bin/STM32_Programmer_CLI @@ -42,5 +44,5 @@ else endif # flash target using on-board stlink -flash-stlink: $(BUILD)/$(BOARD)-firmware.elf +flash: $(BUILD)/$(BOARD)-firmware.elf $(STM32Prog) --connect port=swd --write $< --go From 0fcd263df32eb4901512430f659ee1bf35b6624b Mon Sep 17 00:00:00 2001 From: hathach Date: Tue, 19 Mar 2019 16:41:00 +0700 Subject: [PATCH 11/12] stm32f place startup*.o first in linking order due to gcc flto bug ref: https://bugs.launchpad.net/gcc-arm-embedded/+bug/1747966 --- examples/device/cdc_msc_hid/Makefile | 10 +++++----- hw/bsp/stm32f407g_disc1/STM32F407VGTx_FLASH.ld | 6 +++--- 2 files changed, 8 insertions(+), 8 deletions(-) diff --git a/examples/device/cdc_msc_hid/Makefile b/examples/device/cdc_msc_hid/Makefile index 84f31388..0071301f 100644 --- a/examples/device/cdc_msc_hid/Makefile +++ b/examples/device/cdc_msc_hid/Makefile @@ -62,9 +62,9 @@ else endif CFLAGS += $(INC) -Wall -Werror -std=gnu11 -nostdlib -DBOARD_$(shell echo $(BOARD) | tr a-z\- A-Z_) - LDFLAGS += $(CFLAGS) -nostartfiles -fshort-enums -Wl,-T,$(TOP)/$(LD_FILE) -Wl,-Map=$@.map -Wl,-cref -Wl,-gc-sections -specs=nosys.specs -specs=nano.specs -LIBS := -lgcc -lc -lm -lnosys + +LIBS = -lgcc -lc -lm -lnosys EXAMPLE_SOURCE += \ src/main.c \ @@ -91,8 +91,8 @@ SRC_C += $(LIB_SOURCE) # Assembly files can be name with upper case .S, convert it to .s SRC_S := $(SRC_S:.S=.s) -OBJ += $(addprefix $(BUILD)/obj/, $(SRC_C:.c=.o)) OBJ += $(addprefix $(BUILD)/obj/, $(SRC_S:.s=.o)) +OBJ += $(addprefix $(BUILD)/obj/, $(SRC_C:.c=.o)) # Set all as default goal .DEFAULT_GOAL := all @@ -134,8 +134,7 @@ $(BUILD)/obj/%.o: %.c vpath %.s . $(TOP) $(BUILD)/obj/%.o: %.s @echo AS $(notdir $@) - $(AS) -o $@ $< - #$(CC) -x assembler-with-cpp $(ASFLAGS) -c -o $@ $< + @$(CC) -x assembler-with-cpp $(ASFLAGS) -c -o $@ $< # ASM sources upper case .S vpath %.S . $(TOP) @@ -155,6 +154,7 @@ ifeq ($(JLINK_IF),) JLINK_IF = swd endif +# Flash using jlink flash-jlink: $(BUILD)/$(BOARD)-firmware.hex @echo halt > $(BUILD)/$(BOARD).jlink @echo loadfile $^ >> $(BUILD)/$(BOARD).jlink diff --git a/hw/bsp/stm32f407g_disc1/STM32F407VGTx_FLASH.ld b/hw/bsp/stm32f407g_disc1/STM32F407VGTx_FLASH.ld index 4f8a997d..c4160272 100644 --- a/hw/bsp/stm32f407g_disc1/STM32F407VGTx_FLASH.ld +++ b/hw/bsp/stm32f407g_disc1/STM32F407VGTx_FLASH.ld @@ -41,9 +41,9 @@ _Min_Stack_Size = 0x4000; /* required amount of stack */ /* Specify the memory areas */ MEMORY { -RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K -CCMRAM (rw) : ORIGIN = 0x10000000, LENGTH = 64K -FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 1024K + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K + CCMRAM (rw) : ORIGIN = 0x10000000, LENGTH = 64K + FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 1024K } /* Define output sections */ From 1062910348add38ae84cb74604e9dbd36198d71d Mon Sep 17 00:00:00 2001 From: hathach Date: Tue, 19 Mar 2019 16:51:41 +0700 Subject: [PATCH 12/12] readme clean up --- README.md | 8 ++++---- hw/bsp/readme.md | 2 +- 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/README.md b/README.md index 4133173c..18267254 100644 --- a/README.md +++ b/README.md @@ -45,10 +45,10 @@ Currently the following OS are supported with tinyusb out of the box with a simp The stack supports the following MCUs - - **Nordic:** nRF52840 - - **NXP:** LPC11Uxx, LPC13xx, LPC175x_6x, LPC177x_8x, LPC40xx, LPC43xx - - **MicroChip:** SAMD21, SAMD51 (device only) - - **ST* STM32F4 +- **Nordic:** nRF52840 +- **NXP:** LPC11Uxx, LPC13xx, LPC175x_6x, LPC177x_8x, LPC40xx, LPC43xx +- **MicroChip:** SAMD21, SAMD51 (device only) +- **ST:** STM32F4 [Here is the list of supported Boards](hw/bsp/readme.md) diff --git a/hw/bsp/readme.md b/hw/bsp/readme.md index 03cd9e08..02edce91 100644 --- a/hw/bsp/readme.md +++ b/hw/bsp/readme.md @@ -24,7 +24,7 @@ This code base already had supported for a handful of following boards ### ST STM32 ### -- [STM32F4DISCOVERY](https://www.st.com/en/evaluation-tools/stm32f4discovery.html) +- [STM32F4 Discovery](https://www.st.com/en/evaluation-tools/stm32f4discovery.html) ## Add your own board ##